Properly handle EVEX register aliases
gas/ * config/tc-i386.c (parse_register): Set need_vrex. gas/testsuite/ * gas/i386/x86-64-equ.d: New. * gas/i386/x86-64-equ.s: New. * gas/i386/i386.exp: Run x86-64-equ.
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@ -1,3 +1,7 @@
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2014-07-17 Ilya Tocar <ilya.tocar@intel.com>
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* config/tc-i386.c (parse_register): Set need_vrex.
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2014-07-15 Jiong Wang <jiong.wang@arm.com>
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* config/tc-arm.c (add_to_lit_pool): Use "inst.operands[1].imm" for
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@ -9428,6 +9428,8 @@ parse_register (char *reg_string, char **end_op)
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know (e->X_add_number >= 0
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&& (valueT) e->X_add_number < i386_regtab_size);
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r = i386_regtab + e->X_add_number;
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if ((r->reg_flags & RegVRex))
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i.need_vrex = 1;
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*end_op = input_line_pointer;
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}
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*input_line_pointer = c;
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@ -1,3 +1,9 @@
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2014-07-17 Ilya Tocar <ilya.tocar@intel.com>
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* gas/i386/x86-64-equ.d: New.
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* gas/i386/x86-64-equ.s: New.
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* gas/i386/i386.exp: Run x86-64-equ.
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2014-07-12 David Majnemer <david.majnemer@gmail.com>
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* gas/pe/set.s, * gas/pe/set.d: New test.
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@ -576,6 +576,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-prefetchwt1"
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run_dump_test "x86-64-prefetchwt1-intel"
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run_dump_test "x86-64-se1"
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run_dump_test "x86-64-equ"
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if { ![istarget "*-*-aix*"]
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&& ![istarget "*-*-beos*"]
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11
gas/testsuite/gas/i386/x86-64-equ.d
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11
gas/testsuite/gas/i386/x86-64-equ.d
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#objdump: -drw
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#name: evex equates
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.*: +file format .*
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Disassembly of section .text:
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0+000 <_start>:
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[ ]*[a-f0-9]+: 62 e1 76 08 58 c8 vaddss %xmm0,%xmm1,%xmm17
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[ ]*[a-f0-9]+: 62 b1 76 08 58 c1 vaddss %xmm17,%xmm1,%xmm0
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#pass
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10
gas/testsuite/gas/i386/x86-64-equ.s
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10
gas/testsuite/gas/i386/x86-64-equ.s
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.text
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_start:
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.set ACC, %xmm17
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vaddss %xmm0,%xmm1,ACC
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.intel_syntax noprefix
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.set ACC, xmm17
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vaddss xmm0,xmm1,ACC
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