2013-10-08  Jan Beulich <jbeulich@suse.com>

	* gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
	LR/PC check.

gas/testsuite/
2013-10-08  Jan Beulich <jbeulich@suse.com>

	* gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests.
	* gas/arm/thumb-w-good.d: Update accordingly.
This commit is contained in:
Jan Beulich 2013-10-08 08:55:41 +00:00
parent 38d7754573
commit d3bfe16eaf
5 changed files with 23 additions and 5 deletions

View File

@ -1,3 +1,8 @@
2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
LR/PC check.
2013-10-08 Nick Clifton <nickc@redhat.com>
* config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias

View File

@ -11672,12 +11672,11 @@ do_t_push_pop (void)
_("expression too complex"));
mask = inst.operands[0].imm;
if ((mask & ~0xff) == 0)
if (inst.size_req != 4 && (mask & ~0xff) == 0)
inst.instruction = THUMB_OP16 (inst.instruction) | mask;
else if ((inst.instruction == T_MNEM_push
&& (mask & ~0xff) == 1 << REG_LR)
|| (inst.instruction == T_MNEM_pop
&& (mask & ~0xff) == 1 << REG_PC))
else if (inst.size_req != 4
&& (mask & ~0xff) == (1 << (inst.instruction == T_MNEM_push
? REG_LR : REG_PC)))
{
inst.instruction = THUMB_OP16 (inst.instruction);
inst.instruction |= THUMB_PP_PC_LR;

View File

@ -1,3 +1,8 @@
2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests.
* gas/arm/thumb-w-good.d: Update accordingly.
2013-10-08 Nick Clifton <nickc@redhat.com>
* gas/msp430/bad.s: New test: Checks erroneous size extensions.

View File

@ -7,3 +7,7 @@
Disassembly of section .text:
00000000 <.text> f7ff fffe bl 00000000 <foo>
00000004 <.text\+0x4> f3ef 8000 mrs r0, CPSR
00000008 <.text\+0x8> f84d 0d04 (str(\.w)? r0, \[sp, #-4\]!|push(\.w)? \{r0\})
0000000c <.text\+0xc> e92d 4001 (stmdb(\.w)? sp!,|push(\.w)?)[ ]+\{r0, lr\}
00000010 <.text\+0x10> f85d 0b04 (ldr(\.w)? r0, \[sp\], #4|pop(\.w)? \{r0\})
00000014 <.text\+0x14> e8bd 8001 (ldmia(\.w)? sp!,|pop(\.w)?)[ ]+\{r0, pc\}

View File

@ -5,3 +5,8 @@ bl.w foo
.arch armv6-m
mrs.w r0, apsr
.arch armv6t2
push.w {r0}
push.w {r0, lr}
pop.w {r0}
pop.w {r0, pc}