* config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for
    local targets in Thumb mode.

    gas/testsuite/
    * gas/arm/bl-local-2.s: New test.
    * gas/arm/bl-local-2.d: New.
This commit is contained in:
Julian Brown 2012-11-28 16:53:01 +00:00
parent 945bf71318
commit d406f3e430
5 changed files with 79 additions and 7 deletions

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@ -1,3 +1,8 @@
2012-11-28 Julian Brown <julian@codesourcery.com>
* config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for
local targets in Thumb mode.
2012-11-23 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (sticky): New var.

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@ -22040,18 +22040,18 @@ md_apply_fix (fixS * fixP,
thumb_bl_common:
#ifdef OBJ_ELF
if (EF_ARM_EABI_VERSION (meabi_flags) >= EF_ARM_EABI_VER4
&& fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
fixP->fx_r_type = BFD_RELOC_THUMB_PCREL_BRANCH23;
#endif
if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
/* For a BLX instruction, make sure that the relocation is rounded up
to a word boundary. This follows the semantics of the instruction
which specifies that bit 1 of the target address will come from bit
1 of the base address. */
value = (value + 1) & ~ 1;
value = (value + 3) & ~ 3;
#ifdef OBJ_ELF
if (EF_ARM_EABI_VERSION (meabi_flags) >= EF_ARM_EABI_VER4
&& fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
fixP->fx_r_type = BFD_RELOC_THUMB_PCREL_BRANCH23;
#endif
if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
{

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@ -1,3 +1,8 @@
2012-11-28 Julian Brown <julian@codesourcery.com>
* gas/arm/bl-local-2.s: New test.
* gas/arm/bl-local-2.d: New.
2012-11-27 Roland McGrath <mcgrathr@google.com>
* lib/gas-defs.exp (run_dump_test): If as options include

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@ -0,0 +1,21 @@
#name: bl local conversion to blx
#objdump: -drw --prefix-addresses --show-raw-insn
#as:
.*: file format .*
Disassembly of section \.text:
0+00 <[^>]+> e12fff1e bx lr
0+04 <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+06 <[^>]+> f7ff effc blx 0+ <myfunction>
0+0a <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+0c <[^>]+> f7ff eff8 blx 0+ <myfunction>
0+10 <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+12 <[^>]+> f7ff eff6 blx 0+ <myfunction>
0+16 <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+18 <[^>]+> f7ff eff2 blx 0+ <myfunction>
0+1c <[^>]+> 4770 bx lr
0+1e <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+20 <[^>]+> fafffffd blx 0000001c <mythumbfunction>

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@ -0,0 +1,41 @@
.arch armv5te
.text
.align 2
.code 32
.type myfunction, %function
myfunction:
bx r14
.text
.align 2
.code 16
.thumb_func
.global caller
.type caller, %function
caller:
nop
bl myfunction
nop
bl myfunction
nop
bl myfunction
nop
bl myfunction
.text
.align 2
.code 16
.type mythumbfunction, %function
.thumb_func
mythumbfunction:
bx r14
.text
.align 2
.code 32
.global armcaller
.type armcaller, %function
armcaller:
bl mythumbfunction