Add missing fpcmp instructions, and add missing fcmp/fpcmp tests.
* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for gt, ge, ngt, and nge. * ia64-asmtab.c: Regenerate.
This commit is contained in:
Jim Wilson
parent
139368c9f3
commit
d48ad4f3b6
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@ -1,5 +1,8 @@
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2000-09-22 Jim Wilson <wilson@cygnus.com>
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* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests.
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* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
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* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
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* gas/ia64/dv-waw-err.s: Likewise.
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* gas/ia64/dv-imply.d: Regenerate.
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File diff suppressed because it is too large
Load Diff
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@ -51,9 +51,20 @@ print "\tfselect f4 = f5, f6, f7\n\n";
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@cmp = ( ".eq", ".lt", ".le", ".unord", ".gt", ".ge", ".neq", ".nlt",
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".nle", ".ngt", ".nge", ".ord" );
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@fctype = ( "", ".unc" );
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foreach $c (@cmp) {
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foreach $u (@fctype) {
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foreach $s (@sf) {
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print "\tfcmp${c}${u}${s} p3, p4 = f4, f5\n";
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}
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}
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print "\n";
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}
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# Floating Point Class
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foreach $u ( "", ".unc" ) {
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foreach $u (@fctype) {
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foreach $c ( '@nat', '@qnan', '@snan', '@pos', '@neg', '@unorm',
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'@norm', '@inf', '0x1ff' ) {
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foreach $m ( ".m", ".nm" ) {
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@ -93,7 +104,7 @@ foreach $i ( "fmin", "fmax", "famin", "famax",
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foreach $c (@cmp) {
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foreach $s (@sf) {
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print "\tfcmp${c}${u}${s} p3, p4 = f4, f5\n";
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print "\tfpcmp${c}${s} f3 = f4, f5\n";
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}
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print "\n";
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}
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@ -188,6 +188,138 @@ _start:
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fselect f4 = f5, f6, f7
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fcmp.eq p3, p4 = f4, f5
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fcmp.eq.s0 p3, p4 = f4, f5
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fcmp.eq.s1 p3, p4 = f4, f5
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fcmp.eq.s2 p3, p4 = f4, f5
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fcmp.eq.s3 p3, p4 = f4, f5
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fcmp.eq.unc p3, p4 = f4, f5
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fcmp.eq.unc.s0 p3, p4 = f4, f5
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fcmp.eq.unc.s1 p3, p4 = f4, f5
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fcmp.eq.unc.s2 p3, p4 = f4, f5
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fcmp.eq.unc.s3 p3, p4 = f4, f5
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fcmp.lt p3, p4 = f4, f5
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fcmp.lt.s0 p3, p4 = f4, f5
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fcmp.lt.s1 p3, p4 = f4, f5
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fcmp.lt.s2 p3, p4 = f4, f5
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fcmp.lt.s3 p3, p4 = f4, f5
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fcmp.lt.unc p3, p4 = f4, f5
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fcmp.lt.unc.s0 p3, p4 = f4, f5
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fcmp.lt.unc.s1 p3, p4 = f4, f5
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fcmp.lt.unc.s2 p3, p4 = f4, f5
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fcmp.lt.unc.s3 p3, p4 = f4, f5
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fcmp.le p3, p4 = f4, f5
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fcmp.le.s0 p3, p4 = f4, f5
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fcmp.le.s1 p3, p4 = f4, f5
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fcmp.le.s2 p3, p4 = f4, f5
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fcmp.le.s3 p3, p4 = f4, f5
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fcmp.le.unc p3, p4 = f4, f5
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fcmp.le.unc.s0 p3, p4 = f4, f5
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fcmp.le.unc.s1 p3, p4 = f4, f5
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fcmp.le.unc.s2 p3, p4 = f4, f5
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fcmp.le.unc.s3 p3, p4 = f4, f5
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fcmp.unord p3, p4 = f4, f5
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fcmp.unord.s0 p3, p4 = f4, f5
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fcmp.unord.s1 p3, p4 = f4, f5
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fcmp.unord.s2 p3, p4 = f4, f5
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fcmp.unord.s3 p3, p4 = f4, f5
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fcmp.unord.unc p3, p4 = f4, f5
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fcmp.unord.unc.s0 p3, p4 = f4, f5
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fcmp.unord.unc.s1 p3, p4 = f4, f5
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fcmp.unord.unc.s2 p3, p4 = f4, f5
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fcmp.unord.unc.s3 p3, p4 = f4, f5
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fcmp.gt p3, p4 = f4, f5
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fcmp.gt.s0 p3, p4 = f4, f5
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fcmp.gt.s1 p3, p4 = f4, f5
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fcmp.gt.s2 p3, p4 = f4, f5
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fcmp.gt.s3 p3, p4 = f4, f5
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fcmp.gt.unc p3, p4 = f4, f5
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fcmp.gt.unc.s0 p3, p4 = f4, f5
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fcmp.gt.unc.s1 p3, p4 = f4, f5
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fcmp.gt.unc.s2 p3, p4 = f4, f5
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fcmp.gt.unc.s3 p3, p4 = f4, f5
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fcmp.ge p3, p4 = f4, f5
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fcmp.ge.s0 p3, p4 = f4, f5
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fcmp.ge.s1 p3, p4 = f4, f5
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fcmp.ge.s2 p3, p4 = f4, f5
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fcmp.ge.s3 p3, p4 = f4, f5
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fcmp.ge.unc p3, p4 = f4, f5
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fcmp.ge.unc.s0 p3, p4 = f4, f5
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fcmp.ge.unc.s1 p3, p4 = f4, f5
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fcmp.ge.unc.s2 p3, p4 = f4, f5
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fcmp.ge.unc.s3 p3, p4 = f4, f5
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fcmp.neq p3, p4 = f4, f5
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fcmp.neq.s0 p3, p4 = f4, f5
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fcmp.neq.s1 p3, p4 = f4, f5
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fcmp.neq.s2 p3, p4 = f4, f5
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fcmp.neq.s3 p3, p4 = f4, f5
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fcmp.neq.unc p3, p4 = f4, f5
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fcmp.neq.unc.s0 p3, p4 = f4, f5
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fcmp.neq.unc.s1 p3, p4 = f4, f5
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fcmp.neq.unc.s2 p3, p4 = f4, f5
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fcmp.neq.unc.s3 p3, p4 = f4, f5
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fcmp.nlt p3, p4 = f4, f5
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fcmp.nlt.s0 p3, p4 = f4, f5
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fcmp.nlt.s1 p3, p4 = f4, f5
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fcmp.nlt.s2 p3, p4 = f4, f5
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fcmp.nlt.s3 p3, p4 = f4, f5
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fcmp.nlt.unc p3, p4 = f4, f5
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fcmp.nlt.unc.s0 p3, p4 = f4, f5
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fcmp.nlt.unc.s1 p3, p4 = f4, f5
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fcmp.nlt.unc.s2 p3, p4 = f4, f5
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fcmp.nlt.unc.s3 p3, p4 = f4, f5
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fcmp.nle p3, p4 = f4, f5
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fcmp.nle.s0 p3, p4 = f4, f5
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fcmp.nle.s1 p3, p4 = f4, f5
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fcmp.nle.s2 p3, p4 = f4, f5
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fcmp.nle.s3 p3, p4 = f4, f5
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fcmp.nle.unc p3, p4 = f4, f5
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fcmp.nle.unc.s0 p3, p4 = f4, f5
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fcmp.nle.unc.s1 p3, p4 = f4, f5
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fcmp.nle.unc.s2 p3, p4 = f4, f5
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fcmp.nle.unc.s3 p3, p4 = f4, f5
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fcmp.ngt p3, p4 = f4, f5
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fcmp.ngt.s0 p3, p4 = f4, f5
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fcmp.ngt.s1 p3, p4 = f4, f5
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fcmp.ngt.s2 p3, p4 = f4, f5
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fcmp.ngt.s3 p3, p4 = f4, f5
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fcmp.ngt.unc p3, p4 = f4, f5
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fcmp.ngt.unc.s0 p3, p4 = f4, f5
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fcmp.ngt.unc.s1 p3, p4 = f4, f5
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fcmp.ngt.unc.s2 p3, p4 = f4, f5
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fcmp.ngt.unc.s3 p3, p4 = f4, f5
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fcmp.nge p3, p4 = f4, f5
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fcmp.nge.s0 p3, p4 = f4, f5
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fcmp.nge.s1 p3, p4 = f4, f5
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fcmp.nge.s2 p3, p4 = f4, f5
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fcmp.nge.s3 p3, p4 = f4, f5
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fcmp.nge.unc p3, p4 = f4, f5
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fcmp.nge.unc.s0 p3, p4 = f4, f5
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fcmp.nge.unc.s1 p3, p4 = f4, f5
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fcmp.nge.unc.s2 p3, p4 = f4, f5
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fcmp.nge.unc.s3 p3, p4 = f4, f5
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fcmp.ord p3, p4 = f4, f5
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fcmp.ord.s0 p3, p4 = f4, f5
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fcmp.ord.s1 p3, p4 = f4, f5
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fcmp.ord.s2 p3, p4 = f4, f5
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fcmp.ord.s3 p3, p4 = f4, f5
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fcmp.ord.unc p3, p4 = f4, f5
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fcmp.ord.unc.s0 p3, p4 = f4, f5
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fcmp.ord.unc.s1 p3, p4 = f4, f5
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fcmp.ord.unc.s2 p3, p4 = f4, f5
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fcmp.ord.unc.s3 p3, p4 = f4, f5
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fclass.m p3, p4 = f4, @nat
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fclass.nm p3, p4 = f4, @nat
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fclass.m p3, p4 = f4, @qnan
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@ -298,77 +430,77 @@ _start:
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fpamax.s2 f4 = f5, f6
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fpamax.s3 f4 = f5, f6
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fcmp.eq p3, p4 = f4, f5
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fcmp.eq.s0 p3, p4 = f4, f5
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fcmp.eq.s1 p3, p4 = f4, f5
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fcmp.eq.s2 p3, p4 = f4, f5
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fcmp.eq.s3 p3, p4 = f4, f5
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fpcmp.eq f3 = f4, f5
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fpcmp.eq.s0 f3 = f4, f5
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fpcmp.eq.s1 f3 = f4, f5
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fpcmp.eq.s2 f3 = f4, f5
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fpcmp.eq.s3 f3 = f4, f5
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fcmp.lt p3, p4 = f4, f5
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fcmp.lt.s0 p3, p4 = f4, f5
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fcmp.lt.s1 p3, p4 = f4, f5
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fcmp.lt.s2 p3, p4 = f4, f5
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fcmp.lt.s3 p3, p4 = f4, f5
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fpcmp.lt f3 = f4, f5
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fpcmp.lt.s0 f3 = f4, f5
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fpcmp.lt.s1 f3 = f4, f5
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fpcmp.lt.s2 f3 = f4, f5
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fpcmp.lt.s3 f3 = f4, f5
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fcmp.le p3, p4 = f4, f5
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fcmp.le.s0 p3, p4 = f4, f5
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fcmp.le.s1 p3, p4 = f4, f5
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fcmp.le.s2 p3, p4 = f4, f5
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fcmp.le.s3 p3, p4 = f4, f5
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fpcmp.le f3 = f4, f5
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fpcmp.le.s0 f3 = f4, f5
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fpcmp.le.s1 f3 = f4, f5
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fpcmp.le.s2 f3 = f4, f5
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fpcmp.le.s3 f3 = f4, f5
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fcmp.unord p3, p4 = f4, f5
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fcmp.unord.s0 p3, p4 = f4, f5
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fcmp.unord.s1 p3, p4 = f4, f5
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fcmp.unord.s2 p3, p4 = f4, f5
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fcmp.unord.s3 p3, p4 = f4, f5
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fpcmp.unord f3 = f4, f5
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fpcmp.unord.s0 f3 = f4, f5
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fpcmp.unord.s1 f3 = f4, f5
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fpcmp.unord.s2 f3 = f4, f5
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fpcmp.unord.s3 f3 = f4, f5
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fcmp.gt p3, p4 = f4, f5
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fcmp.gt.s0 p3, p4 = f4, f5
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fcmp.gt.s1 p3, p4 = f4, f5
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fcmp.gt.s2 p3, p4 = f4, f5
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fcmp.gt.s3 p3, p4 = f4, f5
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fpcmp.gt f3 = f4, f5
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fpcmp.gt.s0 f3 = f4, f5
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fpcmp.gt.s1 f3 = f4, f5
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fpcmp.gt.s2 f3 = f4, f5
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fpcmp.gt.s3 f3 = f4, f5
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fcmp.ge p3, p4 = f4, f5
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fcmp.ge.s0 p3, p4 = f4, f5
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fcmp.ge.s1 p3, p4 = f4, f5
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fcmp.ge.s2 p3, p4 = f4, f5
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fcmp.ge.s3 p3, p4 = f4, f5
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fpcmp.ge f3 = f4, f5
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fpcmp.ge.s0 f3 = f4, f5
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fpcmp.ge.s1 f3 = f4, f5
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fpcmp.ge.s2 f3 = f4, f5
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fpcmp.ge.s3 f3 = f4, f5
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fcmp.neq p3, p4 = f4, f5
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fcmp.neq.s0 p3, p4 = f4, f5
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fcmp.neq.s1 p3, p4 = f4, f5
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fcmp.neq.s2 p3, p4 = f4, f5
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fcmp.neq.s3 p3, p4 = f4, f5
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fpcmp.neq f3 = f4, f5
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fpcmp.neq.s0 f3 = f4, f5
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fpcmp.neq.s1 f3 = f4, f5
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fpcmp.neq.s2 f3 = f4, f5
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fpcmp.neq.s3 f3 = f4, f5
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fcmp.nlt p3, p4 = f4, f5
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fcmp.nlt.s0 p3, p4 = f4, f5
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fcmp.nlt.s1 p3, p4 = f4, f5
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fcmp.nlt.s2 p3, p4 = f4, f5
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fcmp.nlt.s3 p3, p4 = f4, f5
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fpcmp.nlt f3 = f4, f5
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fpcmp.nlt.s0 f3 = f4, f5
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fpcmp.nlt.s1 f3 = f4, f5
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fpcmp.nlt.s2 f3 = f4, f5
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fpcmp.nlt.s3 f3 = f4, f5
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fcmp.nle p3, p4 = f4, f5
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fcmp.nle.s0 p3, p4 = f4, f5
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fcmp.nle.s1 p3, p4 = f4, f5
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fcmp.nle.s2 p3, p4 = f4, f5
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fcmp.nle.s3 p3, p4 = f4, f5
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fpcmp.nle f3 = f4, f5
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fpcmp.nle.s0 f3 = f4, f5
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fpcmp.nle.s1 f3 = f4, f5
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fpcmp.nle.s2 f3 = f4, f5
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fpcmp.nle.s3 f3 = f4, f5
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fcmp.ngt p3, p4 = f4, f5
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fcmp.ngt.s0 p3, p4 = f4, f5
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fcmp.ngt.s1 p3, p4 = f4, f5
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fcmp.ngt.s2 p3, p4 = f4, f5
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fcmp.ngt.s3 p3, p4 = f4, f5
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fpcmp.ngt f3 = f4, f5
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fpcmp.ngt.s0 f3 = f4, f5
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fpcmp.ngt.s1 f3 = f4, f5
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fpcmp.ngt.s2 f3 = f4, f5
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fpcmp.ngt.s3 f3 = f4, f5
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fcmp.nge p3, p4 = f4, f5
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fcmp.nge.s0 p3, p4 = f4, f5
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fcmp.nge.s1 p3, p4 = f4, f5
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fcmp.nge.s2 p3, p4 = f4, f5
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fcmp.nge.s3 p3, p4 = f4, f5
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fpcmp.nge f3 = f4, f5
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fpcmp.nge.s0 f3 = f4, f5
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fpcmp.nge.s1 f3 = f4, f5
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fpcmp.nge.s2 f3 = f4, f5
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fpcmp.nge.s3 f3 = f4, f5
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fcmp.ord p3, p4 = f4, f5
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fcmp.ord.s0 p3, p4 = f4, f5
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fcmp.ord.s1 p3, p4 = f4, f5
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fcmp.ord.s2 p3, p4 = f4, f5
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fcmp.ord.s3 p3, p4 = f4, f5
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fpcmp.ord f3 = f4, f5
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fpcmp.ord.s0 f3 = f4, f5
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fpcmp.ord.s1 f3 = f4, f5
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fpcmp.ord.s2 f3 = f4, f5
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fpcmp.ord.s3 f3 = f4, f5
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fmerge.s f4 = f5, f6
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fmerge.ns f4 = f5, f6
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@ -1,5 +1,9 @@
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2000-09-22 Jim Wilson <wilson@cygnus.com>
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* ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
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gt, ge, ngt, and nge.
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* ia64-asmtab.c: Regenerate.
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* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
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* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
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(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
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File diff suppressed because it is too large
Load Diff
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@ -207,6 +207,7 @@ struct ia64_opcode ia64_opcodes_f[] =
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{"fpamax.s1", f, OpXbX6Sf (1, 0, 0x17, 1), {F1, F2, F3}},
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{"fpamax.s2", f, OpXbX6Sf (1, 0, 0x17, 2), {F1, F2, F3}},
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{"fpamax.s3", f, OpXbX6Sf (1, 0, 0x17, 3), {F1, F2, F3}},
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{"fpcmp.eq.s0", f, OpXbX6Sf (1, 0, 0x30, 0), {F1, F2, F3}},
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{"fpcmp.eq", f, OpXbX6Sf (1, 0, 0x30, 0), {F1, F2, F3}, PSEUDO},
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{"fpcmp.eq.s1", f, OpXbX6Sf (1, 0, 0x30, 1), {F1, F2, F3}},
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@ -222,6 +223,16 @@ struct ia64_opcode ia64_opcodes_f[] =
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{"fpcmp.le.s1", f, OpXbX6Sf (1, 0, 0x32, 1), {F1, F2, F3}},
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{"fpcmp.le.s2", f, OpXbX6Sf (1, 0, 0x32, 2), {F1, F2, F3}},
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{"fpcmp.le.s3", f, OpXbX6Sf (1, 0, 0x32, 3), {F1, F2, F3}},
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{"fpcmp.gt.s0", f, OpXbX6Sf (1, 0, 0x31, 0), {F1, F3, F2}, PSEUDO},
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{"fpcmp.gt", f, OpXbX6Sf (1, 0, 0x31, 0), {F1, F3, F2}, PSEUDO},
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{"fpcmp.gt.s1", f, OpXbX6Sf (1, 0, 0x31, 1), {F1, F3, F2}, PSEUDO},
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{"fpcmp.gt.s2", f, OpXbX6Sf (1, 0, 0x31, 2), {F1, F3, F2}, PSEUDO},
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{"fpcmp.gt.s3", f, OpXbX6Sf (1, 0, 0x31, 3), {F1, F3, F2}, PSEUDO},
|
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{"fpcmp.ge.s0", f, OpXbX6Sf (1, 0, 0x32, 0), {F1, F3, F2}, PSEUDO},
|
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{"fpcmp.ge", f, OpXbX6Sf (1, 0, 0x32, 0), {F1, F3, F2}, PSEUDO},
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{"fpcmp.ge.s1", f, OpXbX6Sf (1, 0, 0x32, 1), {F1, F3, F2}, PSEUDO},
|
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{"fpcmp.ge.s2", f, OpXbX6Sf (1, 0, 0x32, 2), {F1, F3, F2}, PSEUDO},
|
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{"fpcmp.ge.s3", f, OpXbX6Sf (1, 0, 0x32, 3), {F1, F3, F2}, PSEUDO},
|
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{"fpcmp.unord.s0", f, OpXbX6Sf (1, 0, 0x33, 0), {F1, F2, F3}},
|
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{"fpcmp.unord", f, OpXbX6Sf (1, 0, 0x33, 0), {F1, F2, F3}, PSEUDO},
|
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{"fpcmp.unord.s1", f, OpXbX6Sf (1, 0, 0x33, 1), {F1, F2, F3}},
|
||||
|
|
@ -242,6 +253,16 @@ struct ia64_opcode ia64_opcodes_f[] =
|
|||
{"fpcmp.nle.s1", f, OpXbX6Sf (1, 0, 0x36, 1), {F1, F2, F3}},
|
||||
{"fpcmp.nle.s2", f, OpXbX6Sf (1, 0, 0x36, 2), {F1, F2, F3}},
|
||||
{"fpcmp.nle.s3", f, OpXbX6Sf (1, 0, 0x36, 3), {F1, F2, F3}},
|
||||
{"fpcmp.ngt.s0", f, OpXbX6Sf (1, 0, 0x35, 0), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.ngt", f, OpXbX6Sf (1, 0, 0x35, 0), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.ngt.s1", f, OpXbX6Sf (1, 0, 0x35, 1), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.ngt.s2", f, OpXbX6Sf (1, 0, 0x35, 2), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.ngt.s3", f, OpXbX6Sf (1, 0, 0x35, 3), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.nge.s0", f, OpXbX6Sf (1, 0, 0x36, 0), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.nge", f, OpXbX6Sf (1, 0, 0x36, 0), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.nge.s1", f, OpXbX6Sf (1, 0, 0x36, 1), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.nge.s2", f, OpXbX6Sf (1, 0, 0x36, 2), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.nge.s3", f, OpXbX6Sf (1, 0, 0x36, 3), {F1, F3, F2}, PSEUDO},
|
||||
{"fpcmp.ord.s0", f, OpXbX6Sf (1, 0, 0x37, 0), {F1, F2, F3}},
|
||||
{"fpcmp.ord", f, OpXbX6Sf (1, 0, 0x37, 0), {F1, F2, F3}, PSEUDO},
|
||||
{"fpcmp.ord.s1", f, OpXbX6Sf (1, 0, 0x37, 1), {F1, F2, F3}},
|
||||
|
|
|
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Loading…
Reference in New Issue