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Add support for the Infineon XC16X.

This commit is contained in:
Nick Clifton 2006-02-17 14:36:28 +00:00
parent 0b92ab21c5
commit d70c5fc7c5
113 changed files with 18377 additions and 106 deletions
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18
bfd/ChangeLog
View File

@ -1,3 +1,21 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* Makefile.am: Add xc16x related entry
* Makefile.in: Regenerate
* archures.c: Add bfd_xc16x_arch
* bfd-in2.h: Regenerate
* config.bfd: Add xc16x-*-elf
* configure.in: Add bfd_elf32_xc16x_vec
* configure: Regenerate.
* targets.c: Added xc16x related information
* cpu-xc16x.c: New file
* reloc.c: Add new relocations specific to xc16x:
BFD_RELOC_XC16X_PAG, BFD_RELOC_XC16X_POF, BFD_RELOC_XC16X_SEG,
BFD_RELOC_XC16X_SOF
* elf32-xc16x.c: New file.
2006-02-17 Alan Modra <amodra@bigpond.net.au>
* elf32-ppc.c (allocate_dynrelocs): Tweak undef weak handling.

10
bfd/Makefile.am
View File

@ -111,6 +111,7 @@ ALL_MACHINES = \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
cpu-xc16x.lo \
cpu-z80.lo \
cpu-z8k.lo
@ -172,6 +173,7 @@ ALL_MACHINES_CFILES = \
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
cpu-xc16x.c \
cpu-z80.c \
cpu-z8k.c
@ -275,6 +277,7 @@ BFD32_BACKENDS = \
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
elf32-xc16x.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -446,6 +449,7 @@ BFD32_BACKENDS_CFILES = \
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
elf32-xc16x.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -1032,6 +1036,7 @@ cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@ -1433,6 +1438,11 @@ elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/filenames.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-config.h elf32-target.h
elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xc16x.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h

10
bfd/Makefile.in
View File

@ -348,6 +348,7 @@ ALL_MACHINES = \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
cpu-xc16x.lo \
cpu-z80.lo \
cpu-z8k.lo
@ -409,6 +410,7 @@ ALL_MACHINES_CFILES = \
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
cpu-xc16x.c \
cpu-z80.c \
cpu-z8k.c
@ -513,6 +515,7 @@ BFD32_BACKENDS = \
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
elf32-xc16x.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -684,6 +687,7 @@ BFD32_BACKENDS_CFILES = \
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
elf32-xc16x.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -1599,6 +1603,7 @@ cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@ -2000,6 +2005,11 @@ elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/filenames.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-config.h elf32-target.h
elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xc16x.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h

8
bfd/archures.c
View File

@ -358,7 +358,7 @@ DESCRIPTION
.#define bfd_mach_msp13 13
.#define bfd_mach_msp14 14
.#define bfd_mach_msp15 15
.#define bfd_mach_msp16 16
.#define bfd_mach_msp16 16
.#define bfd_mach_msp21 21
.#define bfd_mach_msp31 31
.#define bfd_mach_msp32 32
@ -367,6 +367,10 @@ DESCRIPTION
.#define bfd_mach_msp42 42
.#define bfd_mach_msp43 43
.#define bfd_mach_msp44 44
. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
.#define bfd_mach_xc16x 1
.#define bfd_mach_xc16xl 2
.#define bfd_mach_xc16xs 3
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
. bfd_arch_maxq, {* Dallas MAXQ 10/20 *}
@ -473,6 +477,7 @@ extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
extern const bfd_arch_info_type bfd_xtensa_arch;
extern const bfd_arch_info_type bfd_xc16x_arch;
extern const bfd_arch_info_type bfd_z80_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
@ -537,6 +542,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_we32k_arch,
&bfd_xstormy16_arch,
&bfd_xtensa_arch,
&bfd_xc16x_arch,
&bfd_z80_arch,
&bfd_z8k_arch,
#endif

20
bfd/bfd-in2.h
View File

@ -1952,7 +1952,7 @@ enum bfd_architecture
#define bfd_mach_msp13 13
#define bfd_mach_msp14 14
#define bfd_mach_msp15 15
#define bfd_mach_msp16 16
#define bfd_mach_msp16 16
#define bfd_mach_msp21 21
#define bfd_mach_msp31 31
#define bfd_mach_msp32 32
@ -1961,6 +1961,10 @@ enum bfd_architecture
#define bfd_mach_msp42 42
#define bfd_mach_msp43 43
#define bfd_mach_msp44 44
bfd_arch_xc16x, /* Infineon's XC16X Series. */
#define bfd_mach_xc16x 1
#define bfd_mach_xc16xl 2
#define bfd_mach_xc16xs 3
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_maxq, /* Dallas MAXQ 10/20 */
@ -3976,6 +3980,12 @@ This is the 5 bits of a value. */
BFD_RELOC_XSTORMY16_24,
BFD_RELOC_XSTORMY16_FPTR16,
/* Infineon Relocations. */
BFD_RELOC_XC16X_PAG,
BFD_RELOC_XC16X_POF,
BFD_RELOC_XC16X_SEG,
BFD_RELOC_XC16X_SOF,
/* Relocations used by VAX ELF. */
BFD_RELOC_VAX_GLOB_DAT,
BFD_RELOC_VAX_JMP_SLOT,
@ -4081,14 +4091,14 @@ replaced by BFD_RELOC_XTENSA_SLOT0_OP. */
BFD_RELOC_XTENSA_OP1,
BFD_RELOC_XTENSA_OP2,
/* Xtensa relocation to mark that the assembler expanded the
/* Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size. */
BFD_RELOC_XTENSA_ASM_EXPAND,
/* Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
/* Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND. */
BFD_RELOC_XTENSA_ASM_SIMPLIFY,

5
bfd/config.bfd
View File

@ -1370,7 +1370,10 @@ case "${targ}" in
targ_defvec=bfd_elf32_xtensa_le_vec
targ_selvecs=bfd_elf32_xtensa_be_vec
;;
xc16x-*-elf)
targ_defvec=bfd_elf32_xc16x_vec
;;
z80-*-*)
targ_defvec=z80coff_vec
targ_underscore=no

121
bfd/configure vendored
View File

@ -3505,6 +3505,7 @@ cygwin* | mingw* |pw32*)
;;
darwin* | rhapsody*)
# this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@ -3515,6 +3516,7 @@ darwin* | rhapsody*)
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@ -3575,14 +3577,7 @@ irix5* | irix6*)
# This must be Linux ELF.
linux-gnu*)
case $host_cpu in
alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
lt_cv_deplibs_check_method=pass_all ;;
*)
# glibc up to 2.1.1 does not perform some relocations on ARM
lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
esac
lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@ -3643,6 +3638,67 @@ deplibs_check_method=$lt_cv_deplibs_check_method
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
# find the maximum length of command line arguments
echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
if test "${lt_cv_sys_max_cmd_len+set}" = set; then
echo $ECHO_N "(cached) $ECHO_C" >&6
else
i=0
teststring="ABCD"
case $build_os in
msdosdjgpp*)
# On DJGPP, this test can blow up pretty badly due to problems in libc
# (any single argument exceeding 2000 bytes causes a buffer overrun
# during glob expansion). Even if it were fixed, the result of this
# check would be larger than it should be.
lt_cv_sys_max_cmd_len=12288; # 12K is about right
;;
cygwin* | mingw*)
# On Win9x/ME, this test blows up -- it succeeds, but takes
# about 5 minutes as the teststring grows exponentially.
# Worse, since 9x/ME are not pre-emptively multitasking,
# you end up with a "frozen" computer, even though with patience
# the test eventually succeeds (with a max line length of 256k).
# Instead, let's just punt: use the minimum linelength reported by
# all of the supported platforms: 8192 (on NT/2K/XP).
lt_cv_sys_max_cmd_len=8192;
;;
amigaos*)
# On AmigaOS with pdksh, this test takes hours, literally.
# So we just punt and use a minimum line length of 8192.
lt_cv_sys_max_cmd_len=8192;
;;
netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
# This has been around since 386BSD, at least. Likely further.
if test -x /sbin/sysctl; then
lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
elif test -x /usr/sbin/sysctl; then
lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
else
lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
fi
# And add a safety zone
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
;;
esac
fi
if test -n "$lt_cv_sys_max_cmd_len" ; then
echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
else
echo "$as_me:$LINENO: result: none" >&5
echo "${ECHO_T}none" >&6
fi
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@ -3976,7 +4032,7 @@ test x"$pic_mode" = xno && libtool_flags="$libtool_flags --prefer-non-pic"
case $host in
*-*-irix6*)
# Find out which ABI we are using.
echo '#line 3979 "configure"' > conftest.$ac_ext
echo '#line 4035 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@ -4031,6 +4087,52 @@ ia64-*-hpux*)
rm -rf conftest*
;;
x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
# Find out which ABI we are using.
echo 'int i;' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); }; then
case "`/usr/bin/file conftest.o`" in
*32-bit*)
case $host in
x86_64-*linux*)
LD="${LD-ld} -m elf_i386"
;;
ppc64-*linux*|powerpc64-*linux*)
LD="${LD-ld} -m elf32ppclinux"
;;
s390x-*linux*)
LD="${LD-ld} -m elf_s390"
;;
sparc64-*linux*)
LD="${LD-ld} -m elf32_sparc"
;;
esac
;;
*64-bit*)
case $host in
x86_64-*linux*)
LD="${LD-ld} -m elf_x86_64"
;;
ppc*-*linux*|powerpc*-*linux*)
LD="${LD-ld} -m elf64ppc"
;;
s390*-*linux*)
LD="${LD-ld} -m elf64_s390"
;;
sparc*-*linux*)
LD="${LD-ld} -m elf64_sparc"
;;
esac
;;
esac
fi
rm -rf conftest*
;;
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@ -13059,6 +13161,7 @@ do
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;

1
bfd/configure.in
View File

@ -674,6 +674,7 @@ do
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;

73
bfd/cpu-xc16x.c Normal file
View File

@ -0,0 +1,73 @@
/* BFD support for the Infineon XC16X Microcontroller.
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of BFD, the Binary File Descriptor library.
Contributed by Anil Paranjpe(anilp1@kpitcummins.com)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type xc16xs_info_struct =
{
16, /* Bits per word. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16xs, /* Machine. */
"xc16x", /* Architecture name. */
"xc16xs", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
NULL /* Next in list. */
};
const bfd_arch_info_type xc16xl_info_struct =
{
16, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16xl, /* Machine. */
"xc16x", /* Architecture name. */
"xc16xl", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
& xc16xs_info_struct /* Next in list. */
};
const bfd_arch_info_type bfd_xc16x_arch =
{
16, /* Bits per word. */
16, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xc16x, /* Architecture. */
bfd_mach_xc16x, /* Machine. */
"xc16x", /* Architecture name. */
"xc16x", /* Printable name. */
1, /* Section alignment - 16 bit. */
TRUE, /* The default ? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
& xc16xl_info_struct /* Next in list. */
};

449
bfd/elf32-xc16x.c Normal file
View File

@ -0,0 +1,449 @@
/* Infineon XC16X-specific support for 16-bit ELF.
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/xc16x.h"
#include "elf/dwarf2.h"
#include "libiberty.h"
static reloc_howto_type xc16x_elf_howto_table [] =
{
/* This reloc does nothing. */
HOWTO (R_XC16X_NONE, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_NONE", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
/* An 8 bit absolute relocation. */
HOWTO (R_XC16X_ABS_8, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_ABS_8", /* name */
TRUE, /* partial_inplace */
0x0000, /* src_mask */
0x00ff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 16 bit absolute relocation. */
HOWTO (R_XC16X_ABS_16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_ABS_16", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_XC16X_ABS_32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_ABS_32", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A PC relative 8 bit relocation. */
HOWTO (R_XC16X_8_PCREL, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
TRUE, /* pc_relative */
8, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_8_PCREL", /* name */
FALSE, /* partial_inplace */
0x0000, /* src_mask */
0x00ff, /* dst_mask */
TRUE), /* pcrel_offset */
/* Relocation regarding page number. */
HOWTO (R_XC16X_PAG, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_PAG", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Relocation regarding page number. */
HOWTO (R_XC16X_POF, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_POF", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Relocation regarding segment number. */
HOWTO (R_XC16X_SEG, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_SEG", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Relocation regarding segment offset. */
HOWTO (R_XC16X_SOF, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_XC16X_SOF", /* name */
TRUE, /* partial_inplace */
0x00000000, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE) /* pcrel_offset */
};
/* Map BFD reloc types to XC16X ELF reloc types. */
struct xc16x_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned int xc16x_reloc_val;
};
static const struct xc16x_reloc_map xc16x_reloc_map [] =
{
{ BFD_RELOC_NONE, R_XC16X_NONE },
{ BFD_RELOC_8, R_XC16X_ABS_8 },
{ BFD_RELOC_16, R_XC16X_ABS_16 },
{ BFD_RELOC_32, R_XC16X_ABS_32 },
{ BFD_RELOC_8_PCREL, R_XC16X_8_PCREL },
{ BFD_RELOC_XC16X_PAG, R_XC16X_PAG},
{ BFD_RELOC_XC16X_POF, R_XC16X_POF},
{ BFD_RELOC_XC16X_SEG, R_XC16X_SEG},
{ BFD_RELOC_XC16X_SOF, R_XC16X_SOF},
};
/* This function is used to search for correct relocation type from
howto structure. */
static reloc_howto_type *
xc16x_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
unsigned int i;
for (i = ARRAY_SIZE (xc16x_reloc_map); --i;)
if (xc16x_reloc_map [i].bfd_reloc_val == code)
return & xc16x_elf_howto_table [xc16x_reloc_map[i].xc16x_reloc_val];
return NULL;
}
/* For a particular operand this function is
called to finalise the type of relocation. */
static void
elf32_xc16x_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
Elf_Internal_Rela *elf_reloc)
{
unsigned int r;
unsigned int i;
r = ELF32_R_TYPE (elf_reloc->r_info);
for (i = 0; i < ARRAY_SIZE (xc16x_elf_howto_table); i++)
if (xc16x_elf_howto_table[i].type == r)
{
bfd_reloc->howto = &xc16x_elf_howto_table[i];
return;
}
abort ();
}
static bfd_reloc_status_type
elf32_xc16x_final_link_relocate (unsigned long r_type,
bfd *input_bfd,
bfd *output_bfd ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd_byte *contents,
bfd_vma offset,
bfd_vma value,
bfd_vma addend,
struct bfd_link_info *info ATTRIBUTE_UNUSED,
asection *sym_sec ATTRIBUTE_UNUSED,
int is_local ATTRIBUTE_UNUSED)
{
bfd_byte *hit_data = contents + offset;
bfd_vma val1;
switch (r_type)
{
case R_XC16X_NONE:
return bfd_reloc_ok;
case R_XC16X_ABS_16:
value += addend;
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
case R_XC16X_8_PCREL:
bfd_put_8 (input_bfd, value, hit_data);
return bfd_reloc_ok;
/* Following case is to find page number from actual
address for this divide value by 16k i.e. page size. */
case R_XC16X_PAG:
value += addend;
value /= 0x4000;
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
/* Following case is to find page offset from actual address
for this take modulo of value by 16k i.e. page size. */
case R_XC16X_POF:
value += addend;
value %= 0x4000;
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
/* Following case is to find segment number from actual
address for this divide value by 64k i.e. segment size. */
case R_XC16X_SEG:
value += addend;
value /= 0x10000;
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
/* Following case is to find segment offset from actual address
for this take modulo of value by 64k i.e. segment size. */
case R_XC16X_SOF:
value += addend;
value %= 0x10000;
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
case R_XC16X_ABS_32:
if (!strstr (input_section->name,".debug"))
{
value += addend;
val1 = value;
value %= 0x4000;
val1 /= 0x4000;
val1 = val1 << 16;
value += val1;
bfd_put_32 (input_bfd, value, hit_data);
}
else
{
value += addend;
bfd_put_32 (input_bfd, value, hit_data);
}
return bfd_reloc_ok;
default:
return bfd_reloc_notsupported;
}
}
static bfd_boolean
elf32_xc16x_relocate_section (bfd *output_bfd,
struct bfd_link_info *info,
bfd *input_bfd,
asection *input_section,
bfd_byte *contents,
Elf_Internal_Rela *relocs,
Elf_Internal_Sym *local_syms,
asection **local_sections)
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel, *relend;
if (info->relocatable)
return TRUE;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
rel = relocs;
relend = relocs + input_section->reloc_count;
for (; rel < relend; rel++)
{
unsigned int r_type;
unsigned long r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
struct elf_link_hash_entry *h;
bfd_vma relocation;
bfd_reloc_status_type r;
/* This is a final link. */
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
}
else
{
bfd_boolean unresolved_reloc, warned;
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h, sec, relocation,
unresolved_reloc, warned);
}
r = elf32_xc16x_final_link_relocate (r_type, input_bfd, output_bfd,
input_section,
contents, rel->r_offset,
relocation, rel->r_addend,
info, sec, h == NULL);
}
return TRUE;
}
static void
elf32_xc16x_final_write_processing (bfd *abfd,
bfd_boolean linker ATTRIBUTE_UNUSED)
{
unsigned long val;
switch (bfd_get_mach (abfd))
{
default:
case bfd_mach_xc16x:
val = 0x1000;
break;
case bfd_mach_xc16xl:
val = 0x1001;
break;
case bfd_mach_xc16xs:
val = 0x1002;
break;
}
elf_elfheader (abfd)->e_flags |= val;
}
static unsigned long
elf32_xc16x_mach (flagword flags)
{
switch (flags)
{
case 0x1000:
default:
return bfd_mach_xc16x;
case 0x1001:
return bfd_mach_xc16xl;
case 0x1002:
return bfd_mach_xc16xs;
}
}
static bfd_boolean
elf32_xc16x_object_p (bfd *abfd)
{
bfd_default_set_arch_mach (abfd, bfd_arch_xc16x,
elf32_xc16x_mach (elf_elfheader (abfd)->e_flags));
return TRUE;
}
#define ELF_ARCH bfd_arch_xc16x
#define ELF_MACHINE_CODE EM_XC16X
#define ELF_MAXPAGESIZE 0x100
#define TARGET_LITTLE_SYM bfd_elf32_xc16x_vec
#define TARGET_LITTLE_NAME "elf32-xc16x"
#define elf_backend_final_write_processing elf32_xc16x_final_write_processing
#define elf_backend_object_p elf32_xc16x_object_p
#define elf_backend_can_gc_sections 1
#define bfd_elf32_bfd_reloc_type_lookup xc16x_reloc_type_lookup
#define elf_info_to_howto elf32_xc16x_info_to_howto
#define elf_info_to_howto_rel elf32_xc16x_info_to_howto
#define elf_backend_relocate_section elf32_xc16x_relocate_section
#define elf_backend_rela_normal 1
#include "elf32-target.h"

4
bfd/libbfd.h
View File

@ -1762,6 +1762,10 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_XSTORMY16_12",
"BFD_RELOC_XSTORMY16_24",
"BFD_RELOC_XSTORMY16_FPTR16",
"BFD_RELOC_XC16X_PAG",
"BFD_RELOC_XC16X_POF",
"BFD_RELOC_XC16X_SEG",
"BFD_RELOC_XC16X_SOF",
"BFD_RELOC_VAX_GLOB_DAT",
"BFD_RELOC_VAX_JMP_SLOT",
"BFD_RELOC_VAX_RELATIVE",

35
bfd/reloc.c
View File

@ -2622,11 +2622,11 @@ ENUMDOC
Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
not stored in the instruction. The 2nd lowest bit comes from a 1 bit
field in the instruction.
ENUM
ENUM
BFD_RELOC_ARM_PCREL_CALL
ENUMDOC
ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
ENUM
ENUM
BFD_RELOC_ARM_PCREL_JUMP
ENUMDOC
ARM 26-bit pc-relative branch for B or conditional BL instruction.
@ -4221,7 +4221,7 @@ ENUMX
BFD_RELOC_CRX_SWITCH16
ENUMX
BFD_RELOC_CRX_SWITCH32
ENUMDOC
ENUMDOC
NS CRX Relocations.
ENUM
@ -4384,6 +4384,17 @@ ENUMX
ENUMDOC
Sony Xstormy16 Relocations.
ENUM
BFD_RELOC_XC16X_PAG
ENUMX
BFD_RELOC_XC16X_POF
ENUMX
BFD_RELOC_XC16X_SEG
ENUMX
BFD_RELOC_XC16X_SOF
ENUMDOC
Infineon Relocations.
ENUM
BFD_RELOC_VAX_GLOB_DAT
ENUMX
@ -4392,19 +4403,19 @@ ENUMX
BFD_RELOC_VAX_RELATIVE
ENUMDOC
Relocations used by VAX ELF.
ENUM
BFD_RELOC_MT_PC16
ENUMDOC
Morpho MT - 16 bit immediate relocation.
Morpho MT - 16 bit immediate relocation.
ENUM
BFD_RELOC_MT_HI16
ENUMDOC
Morpho MT - Hi 16 bits of an address.
Morpho MT - Hi 16 bits of an address.
ENUM
BFD_RELOC_MT_LO16
ENUMDOC
Morpho MT - Low 16 bits of an address.
Morpho MT - Low 16 bits of an address.
ENUM
BFD_RELOC_MT_GNU_VTINHERIT
ENUMDOC
@ -4416,7 +4427,7 @@ ENUMDOC
ENUM
BFD_RELOC_MT_PCINSN8
ENUMDOC
Morpho MT - 8 bit immediate relocation.
Morpho MT - 8 bit immediate relocation.
ENUM
BFD_RELOC_MSP430_10_PCREL
@ -4556,15 +4567,15 @@ ENUMDOC
ENUM
BFD_RELOC_XTENSA_ASM_EXPAND
ENUMDOC
Xtensa relocation to mark that the assembler expanded the
Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size.
ENUM
BFD_RELOC_XTENSA_ASM_SIMPLIFY
ENUMDOC
Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND.
ENUM

4
bfd/targets.c
View File

@ -636,6 +636,7 @@ extern const bfd_target bfd_elf32_tradlittlemips_vec;
extern const bfd_target bfd_elf32_us_cris_vec;
extern const bfd_target bfd_elf32_v850_vec;
extern const bfd_target bfd_elf32_vax_vec;
extern const bfd_target bfd_elf32_xc16x_vec;
extern const bfd_target bfd_elf32_xstormy16_vec;
extern const bfd_target bfd_elf32_xtensa_be_vec;
extern const bfd_target bfd_elf32_xtensa_le_vec;
@ -946,6 +947,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_us_cris_vec,
&bfd_elf32_v850_vec,
&bfd_elf32_vax_vec,
&bfd_elf32_xc16x_vec,
&bfd_elf32_xstormy16_vec,
&bfd_elf32_xtensa_be_vec,
&bfd_elf32_xtensa_le_vec,
@ -975,7 +977,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf64_tradbigmips_vec,
&bfd_elf64_tradlittlemips_vec,
&bfd_elf64_x86_64_vec,
&bfd_mmo_vec,
&bfd_mmo_vec,
#endif
&bfd_powerpc_pe_vec,
&bfd_powerpc_pei_vec,

11
binutils/readelf.c
View File

@ -1695,6 +1695,7 @@ get_machine_name (unsigned e_machine)
case EM_BLACKFIN: return "Analog Devices Blackfin";
case EM_NIOS32: return "Altera Nios";
case EM_ALTERA_NIOS2: return "Altera Nios II";
case EM_XC16X: return "Infineon Technologies xc16x";
default:
snprintf (buff, sizeof (buff), _("<unknown>: %x"), e_machine);
return buff;
@ -7760,7 +7761,7 @@ static const char *arm_attr_tag_ABI_FP_optimization_goals[] =
#define LOOKUP(id, name) \
{id, #name, 0x80 | ARRAY_SIZE(arm_attr_tag_##name), arm_attr_tag_##name}
static arm_attr_public_tag arm_attr_public_tags[] =
static arm_attr_public_tag arm_attr_public_tags[] =
{
{4, "CPU_raw_name", 1, NULL},
{5, "CPU_name", 1, NULL},
@ -7937,7 +7938,7 @@ process_arm_specific (FILE *file)
contents = get_data (NULL, file, sect->sh_offset, 1, sect->sh_size,
_("attributes"));
if (!contents)
continue;
p = contents;
@ -8027,7 +8028,7 @@ process_arm_specific (FILE *file)
{
printf (_("Unknown format '%c'\n"), *p);
}
free(contents);
}
return 1;
@ -8951,7 +8952,7 @@ process_object (char *file_name, FILE *file)
assert (num_dump_sects >= num_cmdline_dump_sects);
memcpy (dump_sects, cmdline_dump_sects, num_cmdline_dump_sects);
}
if (! process_file_header ())
return 1;
@ -9197,7 +9198,7 @@ process_archive (char *file_name, FILE *file)
archive_file_offset = ftell (file);
archive_file_size = strtoul (arhdr.ar_size, NULL, 10);
ret |= process_object (namealc, file);
free (namealc);

8
cpu/ChangeLog
View File

@ -1,3 +1,11 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
description.
* xc16x.opc: New file containing supporting XC16C routines.
2006-02-10 Nick Clifton <nickc@redhat.com>
* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.

3129
cpu/xc16x.cpu Normal file
View File

File diff suppressed because it is too large Load Diff

225
cpu/xc16x.opc Normal file
View File

@ -0,0 +1,225 @@
/* XC16X opcode support. -*- C -*-
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems Ltd.; developed under contract
from Infineon Systems, GMBH , Germany.
This file is part of the GNU Binutils.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
/* This file is an addendum to xc16x.cpu. Heavy use of C code isn't
appropriate in .cpu files, so it resides here. This especially applies
to assembly/disassembly where parsing/printing can be quite involved.
Such things aren't really part of the specification of the cpu, per se,
so .cpu files provide the general framework and .opc files handle the
nitty-gritty details as necessary.
Each section is delimited with start and end markers.
<arch>-opc.h additions use: "-- opc.h"
<arch>-opc.c additions use: "-- opc.c"
<arch>-asm.c additions use: "-- asm.c"
<arch>-dis.c additions use: "-- dis.c"
<arch>-ibd.h additions use: "-- ibd.h" */
/* -- opc.h */
#define CGEN_DIS_HASH_SIZE 8
#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE)
/* -- */
/* -- opc.c */
/* -- */
/* -- asm.c */
/* Handle '#' prefixes (i.e. skip over them). */
static const char *
parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (**strp == '#')
++*strp;
return NULL;
}
/* Handle '.' prefixes (i.e. skip over them). */
static const char *
parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (**strp == '.')
++*strp;
return NULL;
}
/* Handle '.' prefixes (i.e. skip over them). */
static const char *
parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (!strncasecmp (*strp, "pof:", 4))
*strp += 4;
return NULL;
}
/* Handle '.' prefixes (i.e. skip over them). */
static const char *
parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (!strncasecmp (*strp, "pag:", 4))
*strp += 4;
return NULL;
}
/* Handle 'sof' prefixes (i.e. skip over them). */
static const char *
parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (!strncasecmp (*strp, "sof:", 4))
*strp += 4;
return NULL;
}
/* Handle 'seg' prefixes (i.e. skip over them). */
static const char *
parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
long *valuep ATTRIBUTE_UNUSED)
{
if (!strncasecmp (*strp, "seg:", 4))
*strp += 4;
return NULL;
}
/* -- */
/* -- dis.c */
#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
do \
{ \
if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
info->fprintf_func (info->stream, "."); \
if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
info->fprintf_func (info->stream, "#pof:"); \
if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
info->fprintf_func (info->stream, "#pag:"); \
} \
while (0)
/* Handle '.' prefixes as operands. */
static void
print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
}
/* Handle '.' prefixes as operands. */
static void
print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
}
/* Handle '.' prefixes as operands. */
static void
print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
info->fprintf_func (info->stream, "sof:");
}
/* Handle '.' prefixes as operands. */
static void
print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
info->fprintf_func (info->stream, "seg:");
}
/* Handle '#' prefixes as operands. */
static void
print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
info->fprintf_func (info->stream, "#");
}
/* Handle '.' prefixes as operands. */
static void
print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
}
/* -- */

15
gas/ChangeLog
View File

@ -1,3 +1,18 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* Makefile.am: Add xc16x related entry.
* Makefile.in: Regenerate.
* configure.in: Added xc16x related entry.
* configure: Regenerate.
* config/tc-xc16x.h: New file
* config/tc-xc16x.c: New file
* doc/c-xc16x.texi: New file for xc16x
* doc/all.texi: Entry for xc16x
* doc/Makefile.texi: Added c-xc16x.texi
* NEWS: Announce the support for the new target.
2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
* configure.tgt: set emulation for mips-*-netbsd*

17
gas/Makefile.am
View File

@ -87,6 +87,7 @@ CPU_TYPES = \
vax \
v850 \
xstormy16 \
xc16x \
xtensa \
z80 \
z8k
@ -269,6 +270,7 @@ TARGET_CPU_CFILES = \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-xc16x.c \
config/tc-xtensa.c \
config/tc-z80.c \
config/tc-z8k.c
@ -319,6 +321,7 @@ TARGET_CPU_HFILES = \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-xc16x.h \
config/tc-xtensa.h \
config/tc-z80.h \
config/tc-z8k.h
@ -1498,6 +1501,12 @@ DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xstormy16-opc.h cgen.h
DEPTC_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(srcdir)/../opcodes/xc16x-desc.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xc16x-opc.h cgen.h
DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@ -1978,6 +1987,11 @@ DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@ -2337,6 +2351,9 @@ DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
dwarf2dbg.h
DEP_xc16x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h
DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \

20
gas/Makefile.in
View File

@ -317,6 +317,7 @@ CPU_TYPES = \
vax \
v850 \
xstormy16 \
xc16x \
xtensa \
z80 \
z8k
@ -497,6 +498,7 @@ TARGET_CPU_CFILES = \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-xc16x.c \
config/tc-xtensa.c \
config/tc-z80.c \
config/tc-z8k.c
@ -547,6 +549,7 @@ TARGET_CPU_HFILES = \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-xc16x.h \
config/tc-xtensa.h \
config/tc-z80.h \
config/tc-z8k.h
@ -1368,6 +1371,13 @@ DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xstormy16-opc.h cgen.h
DEPTC_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(srcdir)/../opcodes/xc16x-desc.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xc16x-opc.h cgen.h
DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@ -1956,6 +1966,12 @@ DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@ -2422,6 +2438,10 @@ DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
dwarf2dbg.h
DEP_xc16x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h
DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \

2
gas/NEWS
View File

@ -1,5 +1,7 @@
-*- text -*-
* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
* Support for ms2 architecture has been added.
* Support for the Z80 processor family has been added.

395
gas/config/tc-xc16x.c Normal file
View File

@ -0,0 +1,395 @@
/* tc-xc16x.c -- Assembler for the Infineon XC16X.
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#include <stdio.h>
#include "as.h"
#include "safe-ctype.h"
#include "subsegs.h"
#include "symcat.h"
#include "opcodes/xc16x-desc.h"
#include "opcodes/xc16x-opc.h"
#include "cgen.h"
#include "bfd.h"
#include "dwarf2dbg.h"
#ifdef OBJ_ELF
#include "elf/xc16x.h"
#endif
/* Structure to hold all of the different components describing
an individual instruction. */
typedef struct
{
const CGEN_INSN * insn;
const CGEN_INSN * orig_insn;
CGEN_FIELDS fields;
#if CGEN_INT_INSN_P
CGEN_INSN_INT buffer [1];
#define INSN_VALUE(buf) (*(buf))
#else
unsigned char buffer [CGEN_MAX_INSN_SIZE];
#define INSN_VALUE(buf) (buf)
#endif
char * addr;
fragS * frag;
int num_fixups;
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
int indices [MAX_OPERAND_INSTANCES];
}
xc16x_insn;
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
#define XC16X_SHORTOPTS ""
const char * md_shortopts = XC16X_SHORTOPTS;
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
static void
xc16xlmode (int arg ATTRIBUTE_UNUSED)
{
if (stdoutput != NULL)
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xl))
as_warn (_("could not set architecture and machine"));
}
static void
xc16xsmode (int arg ATTRIBUTE_UNUSED)
{
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xs))
as_warn (_("could not set architecture and machine"));
}
static void
xc16xmode (int arg ATTRIBUTE_UNUSED)
{
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16x))
as_warn (_("could not set architecture and machine"));
}
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
{
{ "word", cons, 2 },
{"xc16xl", xc16xlmode, 0},
{"xc16xs", xc16xsmode, 0},
{"xc16x", xc16xmode, 0},
{ NULL, NULL, 0 }
};
void
md_begin (void)
{
/* Initialize the `cgen' interface. */
/* Set the machine number and endian. */
gas_cgen_cpu_desc = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_LITTLE,
CGEN_CPU_OPEN_END);
xc16x_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
}
void
md_assemble (char *str)
{
xc16x_insn insn;
char *errmsg;
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
insn.insn = xc16x_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
if (!insn.insn)
{
as_bad (errmsg);
return;
}
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
}
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
Returns BFD_RELOC_NONE if no reloc type can be found.
*FIXP may be modified if desired. */
bfd_reloc_code_real_type
md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
const CGEN_OPERAND *operand,
fixS *fixP)
{
switch (operand->type)
{
case XC16X_OPERAND_REL:
fixP->fx_where += 1;
fixP->fx_pcrel = 1;
return BFD_RELOC_8_PCREL;
case XC16X_OPERAND_CADDR:
fixP->fx_where += 2;
return BFD_RELOC_16;
case XC16X_OPERAND_UIMM7:
fixP->fx_where += 1;
fixP->fx_pcrel = 1;
return BFD_RELOC_8_PCREL;
case XC16X_OPERAND_UIMM16:
case XC16X_OPERAND_MEMORY:
fixP->fx_where += 2;
return BFD_RELOC_16;
case XC16X_OPERAND_UPOF16:
fixP->fx_where += 2;
return BFD_RELOC_XC16X_POF;
case XC16X_OPERAND_UPAG16:
fixP->fx_where += 2;
return BFD_RELOC_XC16X_PAG;
case XC16X_OPERAND_USEG8:
fixP->fx_where += 1;
return BFD_RELOC_XC16X_SEG;
case XC16X_OPERAND_USEG16:
case XC16X_OPERAND_USOF16:
fixP->fx_where += 2;
return BFD_RELOC_XC16X_SOF;
default : /* avoid -Wall warning */
break;
}
fixP->fx_where += 2;
return BFD_RELOC_XC16X_SOF;
}
/* Write a value out to the object file, using the appropriate endianness. */
void
md_number_to_chars (char * buf, valueT val, int n)
{
number_to_chars_littleendian (buf, val, n);
}
void
md_show_usage (FILE * stream)
{
fprintf (stream, _(" XC16X specific command line options:\n"));
}
int
md_parse_option (int c ATTRIBUTE_UNUSED,
char *arg ATTRIBUTE_UNUSED)
{
return 0;
}
/* Turn a string in input_line_pointer into a floating point constant
of type TYPE, and store the appropriate bytes in *LITP. The number
of LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
/* Equal to MAX_PRECISION in atof-ieee.c. */
#define MAX_LITTLENUMS 6
char *
md_atof (int type, char *litP, int *sizeP)
{
int i;
int prec;
LITTLENUM_TYPE words[MAX_LITTLENUMS];
char *t;
switch (type)
{
case 'f':
case 'F':
case 's':
case 'S':
prec = 2;
break;
case 'd':
case 'D':
case 'r':
case 'R':
prec = 4;
break;
/* FIXME: Some targets allow other format chars for bigger sizes
here. */
default:
*sizeP = 0;
return _("Bad call to md_atof()");
}
t = atof_ieee (input_line_pointer, type, words);
if (t)
input_line_pointer = t;
*sizeP = prec * sizeof (LITTLENUM_TYPE);
for (i = prec - 1; i >= 0; i--)
{
md_number_to_chars (litP, (valueT) words[i],
sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return NULL;
}
valueT
md_section_align (segT segment, valueT size)
{
int align = bfd_get_section_alignment (stdoutput, segment);
return ((size + (1 << align) - 1) & (-1 << align));
}
symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
return NULL;
}
int
md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
segT segment_type ATTRIBUTE_UNUSED)
{
printf (_("call tomd_estimate_size_before_relax \n"));
abort ();
}
long
md_pcrel_from (fixS *fixP)
{
long temp_val;
temp_val=fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
return temp_val;
}
long
md_pcrel_from_section (fixS *fixP, segT sec)
{
if (fixP->fx_addsy != (symbolS *) NULL
&& (! S_IS_DEFINED (fixP->fx_addsy)
|| S_GET_SEGMENT (fixP->fx_addsy) != sec
|| S_IS_EXTERNAL (fixP->fx_addsy)
|| S_IS_WEAK (fixP->fx_addsy)))
{
return 0;
}
return md_pcrel_from (fixP);
}
arelent *
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *rel;
bfd_reloc_code_real_type r_type;
if (fixp->fx_addsy && fixp->fx_subsy)
{
if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
|| S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
"Difference of symbols in different sections is not supported");
return NULL;
}
}
rel = xmalloc (sizeof (arelent));
rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
rel->addend = fixp->fx_offset;
r_type = fixp->fx_r_type;
#define DEBUG 0
#if DEBUG
fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
fflush(stderr);
#endif
rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
if (rel->howto == NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
_("Cannot represent relocation type %s"),
bfd_get_reloc_code_name (r_type));
return NULL;
}
return rel;
}
void
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
{
if(!strstr (seg->name,".debug"))
{
if (*valP < 128)
*valP /= 2;
if (*valP>268435455)
{
*valP = *valP * (-1);
*valP /= 2;
*valP = 256 - (*valP);
}
}
gas_cgen_md_apply_fix (fixP, valP, seg);
return;
}
void
md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
segT seg ATTRIBUTE_UNUSED,
fragS *fragP ATTRIBUTE_UNUSED)
{
printf (_("call to md_convert_frag \n"));
abort ();
}

67
gas/config/tc-xc16x.h Normal file
View File

@ -0,0 +1,67 @@
/* This file is tc-xc16x.h
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#define TC_XC16X
#define TARGET_BYTES_BIG_ENDIAN 0
#define TARGET_ARCH bfd_arch_xc16x
#ifdef BFD_ASSEMBLER
/* Fixup debug sections since we will never relax them. */
#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
#endif
#ifdef OBJ_ELF
#define TARGET_FORMAT "elf32-xc16x"
#define LOCAL_LABEL_PREFIX '.'
#define LOCAL_LABEL(NAME) (NAME[0] == '.' && NAME[1] == 'L')
#define FAKE_LABEL_NAME ".L0\001"
#endif
#if ANSI_PROTOTYPES
struct fix;
struct internal_reloc;
#endif
#define WORKING_DOT_WORD
#define BFD_ARCH bfd_arch_xc16x
#define TC_COUNT_RELOC(x) 1
#define IGNORE_NONSTANDARD_ESCAPES
#define TC_RELOC_MANGLE(s,a,b,c) tc_reloc_mangle(a,b,c)
extern void tc_reloc_mangle (struct fix *, struct internal_reloc *, bfd_vma);
/* No shared lib support, so we don't need to ensure externally
visible symbols can be overridden. */
#define EXTERN_FORCE_RELOC 0
/* Minimum instruction is of 16 bits. */
#define DWARF2_LINE_MIN_INSN_LENGTH 2
#define DO_NOT_STRIP 0
#define LISTING_HEADER "Infineon XC16X GAS "
#define NEED_FX_R_TYPE 1
#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
extern long md_pcrel_from_section (struct fix *, segT);
#define md_operand(x)

127
gas/configure vendored
View File

@ -3340,6 +3340,7 @@ cygwin* | mingw* |pw32*)
;;
darwin* | rhapsody*)
# this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@ -3350,6 +3351,7 @@ darwin* | rhapsody*)
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@ -3410,14 +3412,7 @@ irix5* | irix6*)
# This must be Linux ELF.
linux-gnu*)
case $host_cpu in
alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
lt_cv_deplibs_check_method=pass_all ;;
*)
# glibc up to 2.1.1 does not perform some relocations on ARM
lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
esac
lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@ -3478,6 +3473,67 @@ deplibs_check_method=$lt_cv_deplibs_check_method
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
# find the maximum length of command line arguments
echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
if test "${lt_cv_sys_max_cmd_len+set}" = set; then
echo $ECHO_N "(cached) $ECHO_C" >&6
else
i=0
teststring="ABCD"
case $build_os in
msdosdjgpp*)
# On DJGPP, this test can blow up pretty badly due to problems in libc
# (any single argument exceeding 2000 bytes causes a buffer overrun
# during glob expansion). Even if it were fixed, the result of this
# check would be larger than it should be.
lt_cv_sys_max_cmd_len=12288; # 12K is about right
;;
cygwin* | mingw*)
# On Win9x/ME, this test blows up -- it succeeds, but takes
# about 5 minutes as the teststring grows exponentially.
# Worse, since 9x/ME are not pre-emptively multitasking,
# you end up with a "frozen" computer, even though with patience
# the test eventually succeeds (with a max line length of 256k).
# Instead, let's just punt: use the minimum linelength reported by
# all of the supported platforms: 8192 (on NT/2K/XP).
lt_cv_sys_max_cmd_len=8192;
;;
amigaos*)
# On AmigaOS with pdksh, this test takes hours, literally.
# So we just punt and use a minimum line length of 8192.
lt_cv_sys_max_cmd_len=8192;
;;
netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
# This has been around since 386BSD, at least. Likely further.
if test -x /sbin/sysctl; then
lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
elif test -x /usr/sbin/sysctl; then
lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
else
lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
fi
# And add a safety zone
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
;;
esac
fi
if test -n "$lt_cv_sys_max_cmd_len" ; then
echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
else
echo "$as_me:$LINENO: result: none" >&5
echo "${ECHO_T}none" >&6
fi
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@ -3811,7 +3867,7 @@ test x"$pic_mode" = xno && libtool_flags="$libtool_flags --prefer-non-pic"
case $host in
*-*-irix6*)
# Find out which ABI we are using.
echo '#line 3814 "configure"' > conftest.$ac_ext
echo '#line 3870 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@ -3866,6 +3922,52 @@ ia64-*-hpux*)
rm -rf conftest*
;;
x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
# Find out which ABI we are using.
echo 'int i;' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); }; then
case "`/usr/bin/file conftest.o`" in
*32-bit*)
case $host in
x86_64-*linux*)
LD="${LD-ld} -m elf_i386"
;;
ppc64-*linux*|powerpc64-*linux*)
LD="${LD-ld} -m elf32ppclinux"
;;
s390x-*linux*)
LD="${LD-ld} -m elf_s390"
;;
sparc64-*linux*)
LD="${LD-ld} -m elf32_sparc"
;;
esac
;;
*64-bit*)
case $host in
x86_64-*linux*)
LD="${LD-ld} -m elf_x86_64"
;;
ppc*-*linux*|powerpc*-*linux*)
LD="${LD-ld} -m elf64ppc"
;;
s390*-*linux*)
LD="${LD-ld} -m elf64_s390"
;;
sparc*-*linux*)
LD="${LD-ld} -m elf64_sparc"
;;
esac
;;
esac
fi
rm -rf conftest*
;;
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@ -4712,6 +4814,10 @@ _ACEOF
using_cgen=yes
;;
xc16x)
using_cgen=yes
;;
xtensa)
echo ${extra_objects} | grep -s "xtensa-relax.o"
if test $? -ne 0 ; then
@ -10104,8 +10210,9 @@ case "${need_libm}" in
yes)
LIBM=
case $host in
*-*-beos* | *-*-cygwin* | *-*-pw32*)
*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
# These system don't have libm
# on darwin the libm is a symbolic link to libSystem.dylib
;;
*-ncr-sysv4.3*)
echo "$as_me:$LINENO: checking for _mwvalidcheckl in -lmw" >&5

4
gas/configure.in
View File

@ -335,6 +335,10 @@ changequote([,])dnl
using_cgen=yes
;;
xc16x)
using_cgen=yes
;;
xtensa)
echo ${extra_objects} | grep -s "xtensa-relax.o"
if test $? -ne 0 ; then

1
gas/doc/all.texi
View File

@ -43,6 +43,7 @@
@set IP2K
@set M32C
@set M32R
@set xc16x
@set M68HC11
@set M680X0
@set MCORE

55
gas/doc/c-xc16x.texi Normal file
View File

@ -0,0 +1,55 @@
@c Copyright 2006 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@page
@node xc16x-Dependent
@chapter Infineon xc16x Dependent Features
@cindex xc16x support
@menu
* xc16x Directives:: xc16x Machine Directives
@end menu
@node xc16x Directives
@section xc16x Machine Directives
The xc16x version of the assembler supports the following machine
directives:
@table @code
@cindex @code{align} directive, xc16x
@item .align
This directive aligns the section program counter on the next 2-byte
boundary.
@cindex @code{byte} directive, xc16x
@item .byte @var{expr}
This directive assembles a half-word (8-bit) constant.
@cindex @code{word} directive, xc16x
@item .word @var{expr}
This assembles a word (16-bit) constant.
@cindex @code{ascii} directive, xc16x
@item .ascii "@var{ascii}"
This directive used for copying @var{str} into the object file.
The string is terminated with a null byte.
@cindex @code{set} directive, xc16x
@item .set @var{symbol}, @var{value}
This directive creates a symbol named @var{symbol} which is an alias for
another symbol (possibly not yet defined). This should not be confused
with the mnemonic @code{set}, which is a legitimate xc16x instruction.
@cindex @code{bss} directive, xc16x
@item .bss @var{symbol}, @var{length}
Reserve @var{length} bytes in the bss section for a local @var{symbol},
aligned to the power of two specified by @var{align}. @var{length} and
@var{align} must be positive absolute expressions. This directive
differs from @samp{.lcomm} only in that it permits you to specify
an alignment.
@end table

51
gas/testsuite/ChangeLog
View File

@ -1,3 +1,54 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* gas/xc16x: New directory.
* gas/xc16x/xc16x.exp: New file
* gas/xc16x/add.s: New file
* gas/xc16x/add_test.s: New file
* gas/xc16x/addb.s: New file
* gas/xc16x/addc.s: New file
* gas/xc16x/addcb.s: New file
* gas/xc16x/and.s: New file
* gas/xc16x/andb.s: New file
* gas/xc16x/bfldl.s: New file
* gas/xc16x/bit.s: New file
* gas/xc16x/calla.s: New file
* gas/xc16x/calli.s: New file
* gas/xc16x/cmp.s: New file
* gas/xc16x/cmp_test.s: New file
* gas/xc16x/cmpb.s: New file
* gas/xc16x/cmpi.s: New file
* gas/xc16x/cpl.s: New file
* gas/xc16x/div.s: New file
* gas/xc16x/jmpa.s: New file
* gas/xc16x/jmpi.s: New file
* gas/xc16x/jmpr.s: New file
* gas/xc16x/mov.s: New file
* gas/xc16x/mov_test.s: New file
* gas/xc16x/movb.s: New file
* gas/xc16x/movbs.s: New file
* gas/xc16x/movbz.s: New file
* gas/xc16x/mul.s: New file
* gas/xc16x/neg.s: New file
* gas/xc16x/nop.s: New file
* gas/xc16x/or.s: New file
* gas/xc16x/orb.s: New file
* gas/xc16x/prior.s: New file
* gas/xc16x/pushpop.s: New file
* gas/xc16x/ret.s: New file
* gas/xc16x/scxt.s: New file
* gas/xc16x/shlrol.s: New file
* gas/xc16x/sub.s: New file
* gas/xc16x/sub_test.s: New file
* gas/xc16x/subb.s: New file
* gas/xc16x/subcb.s: New file
* gas/xc16x/syscontrol1.s: New file
* gas/xc16x/syscontrol2.s: New file
* gas/xc16x/trap.s: New file
* gas/xc16x/xor.s: New file
* gas/xc16x/xorb.s: New file
2006-02-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-crx-suffix.d: Undo the last change.

2
gas/testsuite/gas/v850/v850e1.d
View File

@ -11,7 +11,7 @@ Disassembly of section .text:
0x0+04 e0 1f 40 23 [ ]*bsw sp, gp
0x0+08 05 02 [ ]*callt 5
0x0+0a e8 3f e4 00 [ ]*clr1 r7, r8
0x0+0e f6 17 14 1b [ ]*cmov nz, -10, r2, sp
0x0+0e f6 17 14 1b [ ]*cmov nz, 22, r2, sp
0x0+12 e1 17 34 1b [ ]*cmov nz, r1, r2, sp
0x0+16 e0 07 44 01 [ ]*ctret
0x0+1a e0 07 46 01 [ ]*dbret

17
gas/testsuite/gas/xc16x/add.s Normal file
View File

@ -0,0 +1,17 @@
.text
xc16x_add:
add r0,r1
add r0,[r1]
add r0,[r1+]
add r0,#3
add r0,#1234
add r0,0xffed
add 0xffed,r0

92
gas/testsuite/gas/xc16x/add_test.s Normal file
View File

@ -0,0 +1,92 @@
.text
_start:
add r0,r1
add r0,r2
add r0,r3
add r0,r4
add r0,r5
add r0,r6
add r0,r7
add r0,r8
add r0,r9
add r0,r10
add r0,r11
add r0,r12
add r0,r13
add r0,r14
add r0,r15
add r1,r0
add r1,r2
add r1,r3
add r1,r4
add r1,r5
add r1,r6
add r1,r7
add r1,r8
add r1,r9
add r1,r10
add r1,r11
add r1,r12
add r1,r13
add r1,r14
add r1,r15
add r2,r0
add r2,r1
add r2,r3
add r2,r4
add r2,r5
add r2,r6
add r2,r7
add r2,r8
add r2,r9
add r2,r10
add r2,r11
add r2,r12
add r2,r13
add r2,r14
add r2,r15
add r3,r0
add r3,r1
add r3,r2
add r3,r4
add r3,r5
add r3,r6
add r3,r7
add r3,r8
add r3,r9
add r3,r10
add r3,r11
add r3,r12
add r3,r13
add r3,r14
add r3,r15
add r0,[r1]
add r0,[r1+]
add r0,#3
add r0,#0xffff
add r0,0xffff
add 0xffff,r0
addb rl0,rh0
addb rl0[r0]
addb rl0,#3
addb rl0,#0xff
addb r0,0xff10
addb 0xff10,r0
addc r0,r1
addc r0,[r1]
addc r0,#3
addc r0,#0xff12
addc r0,#0xff12
addc r0,0xff12
addc 0xff12,r0
addcb rl0,#3
addcb rl0,#0xff
addcb r0,0xff10
addcb 0xff10,r0

11
gas/testsuite/gas/xc16x/addb.s Normal file
View File

@ -0,0 +1,11 @@
.section .text
.global _fun
xc16x_add:
addb rl0,rl1
addb rl0,[r1]
addb rl0,[r1+]
addb rl0,#0x2
addb rl0,#0x33
addb rl0,0x2387
addb 0x2387,rl0

11
gas/testsuite/gas/xc16x/addc.s Normal file
View File

@ -0,0 +1,11 @@
.section .text
.global _fun
xc16x_add:
addc r0,r1
addc r0,[r1]
addc r0,[r1+]
addc r0,#0x34
addc r0,#0x3456
addc r0,0x2387
addc 0x2387,r0

17
gas/testsuite/gas/xc16x/addcb.s Normal file
View File

@ -0,0 +1,17 @@
.section .text
.global _fun
xc16x_add:
addcb rl0,rl1
addcb rl0,[r1]
addcb rl0,[r1+]
addcb rl0,#0x02
addcb rl0,#0x23
addcb 0x2387,rl0

14
gas/testsuite/gas/xc16x/and.s Normal file
View File

@ -0,0 +1,14 @@
.section .text
.global _fun
xc16x_and:
and r0,r1
and r0,[r1]
and r0,[r1+]
and r0,#3
and r0,#0xfcbe
and r0,0x0230
and 0x320,r0

10
gas/testsuite/gas/xc16x/andb.s Normal file
View File

@ -0,0 +1,10 @@
.section .text
.global _fun
xc16x_andb:
andb rl0,rl1
andb rl0,[r1]
andb rl0,[r1+]
andb rl0,#3
andb rl0,#0xbe
andb rl0,0x0230
andb 0x320,rl0

4
gas/testsuite/gas/xc16x/bfldl.s Normal file
View File

@ -0,0 +1,4 @@
.text
xc16x_bfldl:
BFLDL r0,#0x87,#0x0e
BFLDH r0,#0xff,#0x0e

11
gas/testsuite/gas/xc16x/bit.s Normal file
View File

@ -0,0 +1,11 @@
.text
xc16x_bit:
bclr r0.1
bset r0.1
bmov r0.2,r0.1
bmovn r0.3,r0.2
band r0.1,r0.4
bor r0.1,r0.2
bxor r0.1,r0.2
bcmp r0.1,r0.2

24
gas/testsuite/gas/xc16x/calla.s Normal file
View File

@ -0,0 +1,24 @@
.text
xc16x_calla:
calla cc_uc,0xaaaa
calla cc_z,0xaaaa
calla cc_nz,0xaaaa
calla cc_v,0xaaaa
calla cc_nv,0xaaaa
calla cc_n,0xaaaa
calla cc_nn,0xaaaa
calla cc_c,0xaaaa
calla cc_nc,0xaaaa
calla cc_eq,0xaaaa
calla cc_ne,0xaaaa
calla cc_ult,0xaaaa
calla cc_ule,0xaaaa
calla cc_uge,0xaaaa
calla cc_ugt,0xaaaa
calla cc_sle,0xaaaa
calla cc_sge,0xaaaa
calla cc_sgt,0xaaaa
calla cc_net,0xaaaa
calla cc_slt,0xaaaa

21
gas/testsuite/gas/xc16x/calli.s Normal file
View File

@ -0,0 +1,21 @@
.text
xc16x_calli:
calli cc_uc,[r1]
calli cc_z,[r1]
calli cc_nz,[r1]
calli cc_v,[r1]
calli cc_nv,[r1]
calli cc_n,[r1]
calli cc_nn,[r1]
calli cc_c,[r1]
calli cc_nc,[r1]
calli cc_eq,[r1]
calli cc_ne,[r1]
calli cc_ult,[r1]
calli cc_ule,[r1]
calli cc_uge,[r1]
calli cc_ugt,[r1]
calli cc_sle,[r1]
calli cc_sge,[r1]
calli cc_net,[r1]
calli cc_slt,[r1]

9
gas/testsuite/gas/xc16x/cmp.s Normal file
View File

@ -0,0 +1,9 @@
.text
xc16x_cmp:
cmp r0,r1
cmp r0,[r1]
cmp r0,[r1+]
cmp r0,#3
cmp r0,#0x0234
cmp r0,0x3452

45
gas/testsuite/gas/xc16x/cmp_test.s Normal file
View File

@ -0,0 +1,45 @@
.text
cmp r0,r1
cmp r0,[r1]
cmp r0,[r1+]
cmp r0,#3
cmp r0,#0x0234
cmp r0,0x3452
cmp r0,r1
cmp r0,[r1]
cmp r0,[r1+]
cmp r0,#3
cmp r0,#0xcdef
cmp r0,0xcdef
cmpb rl0,rl1
cmpb rl0,[r1]
cmpb rl0,[r1+]
cmpb rl0,#3
cmpb rl0,#cd
cmpb rl0,0x0234
cmpb rl0,rl1
cmpb rl0,[r1]
cmpb rl0,[r1+]
cmpb rl0,#3
cmpb rl0,#cd
cmpb rl0,0xcdef
cmpd1 r0,#0x0f
cmpd1 r0,#0x0fccb
cmpd1 r0,0xffcb
cmpd2 r0,#0x0f
cmpd2 r0,#0x0fccb
cmpd2 r0,0xffcb
cmpi1 r0,#0x0f
cmpi1 r0,#0x0fccb
cmpi1 r0,0xffcb
cmpi2 r0,#0x0f
cmpi2 r0,#0x0fccb
cmpi2 r0,0xffcb

8
gas/testsuite/gas/xc16x/cmpb.s Normal file
View File

@ -0,0 +1,8 @@
.text
xc16x_cmpb:
cmpb rl0,rl1
cmpb rl0,[r1]
cmpb rl0,[r1+]
cmpb rl0,#3
cmpb rl0,#34
cmpb rl0,0x0234

18
gas/testsuite/gas/xc16x/cmpi.s Normal file
View File

@ -0,0 +1,18 @@
.section .text
.global _fun
xc16x_cmpd:
cmpd1 r0,#0x0f
cmpd1 r0,#0x0fccb
cmpd1 r0,0xffcb
cmpd2 r0,#0x0f
cmpd2 r0,#0x0fccb
cmpd2 r0,0xffcb
cmpi1 r0,#0x0f
cmpi1 r0,#0x0fccb
cmpi1 r0,0xffcb
cmpi2 r0,#0x0f
cmpi2 r0,#0x0fccb
cmpi2 r0,0xffcb

7
gas/testsuite/gas/xc16x/cpl.s Normal file
View File

@ -0,0 +1,7 @@
.section .text
.global _fun
xc16x_cpl_cplb:
cpl r0
cplb rl0

8
gas/testsuite/gas/xc16x/div.s Normal file
View File

@ -0,0 +1,8 @@
.section .text
.global _fun
xc16x_div:
div r0
divl r0
divlu r0
divu r0

23
gas/testsuite/gas/xc16x/jmpa.s Normal file
View File

@ -0,0 +1,23 @@
.text
xc16x_jmpa:
jmpa cc_UC,0xaaaa
jmpa cc_Z,0xaaaa
jmpa cc_NZ,0xaaaa
jmpa cc_V,0xaaaa
jmpa cc_NV,0xaaaa
jmpa cc_N,0xaaaa
jmpa cc_NN,0xaaaa
jmpa cc_ULT,0xaaaa
jmpa cc_UGE,0xaaaa
jmpa cc_Z,0xaaaa
jmpa cc_NZ,0xaaaa
jmpa cc_ULT,0xaaaa
jmpa cc_ULE,0xaaaa
jmpa cc_UGE,0xaaaa
jmpa cc_UGT,0xaaaa
jmpa cc_SLE,0xaaaa
jmpa cc_SGE,0xaaaa
jmpa cc_SGT,0xaaaa
jmpa cc_NET,0xaaaa

24
gas/testsuite/gas/xc16x/jmpi.s Normal file
View File

@ -0,0 +1,24 @@
.section .text
.global _fun
xc16x_jmpi:
jmpi cc_UC, [r7]
jmpi cc_z, [r7]
jmpi cc_NZ, [r7]
jmpi cc_V, [r7]
jmpi cc_NV, [r7]
jmpi cc_N, [r7]
jmpi cc_NN, [r7]
jmpi cc_C, [r7]
jmpi cc_NC, [r7]
jmpi cc_EQ, [r7]
jmpi cc_NE, [r7]
jmpi cc_ULT,[r7]
jmpi cc_ULE,[r7]
jmpi cc_UGE,[r7]
jmpi cc_UGT,[r7]
jmpi cc_SLE,[r7]
jmpi cc_SGE,[r7]
jmpi cc_SGT,[r7]
jmpi cc_NET,[r7]

25
gas/testsuite/gas/xc16x/jmpr.s Normal file
View File

@ -0,0 +1,25 @@
.section .text
.global _fun
xc16x_jmpr:
jmpr cc_uc, xc16x_jmpr
jmpr cc_z, xc16x_jmpr
jmpr cc_nz, xc16x_jmpr
jmpr cc_v, xc16x_jmpr
jmpr cc_nv, xc16x_jmpr
jmpr cc_n, xc16x_jmpr
jmpr cc_nn, xc16x_jmpr
jmpr cc_c, xc16x_jmpr
jmpr cc_nc, xc16x_jmpr
jmpr cc_eq, xc16x_jmpr
jmpr cc_ne, xc16x_jmpr
jmpr cc_ult,xc16x_jmpr
jmpr cc_ule,xc16x_jmpr
jmpr cc_uge,xc16x_jmpr
jmpr cc_ugt,xc16x_jmpr
jmpr cc_sle,xc16x_jmpr
jmpr cc_sge,xc16x_jmpr
jmpr cc_sgt,xc16x_jmpr
jmpr cc_net,xc16x_jmpr
jmpr cc_slt,xc16x_jmpr

20
gas/testsuite/gas/xc16x/mov.s Normal file
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@ -0,0 +1,20 @@
.section .text
.global _fun
xc16x_mov:
mov r0,r1
mov r0,#02
mov r0,#0xfcbe
mov r0,[r1]
mov r0,[r1+]
mov [r0],r1
mov [-r0],r1
mov [r0],[r1]
mov [r0+],[r1]
mov [r0],[r1+]
mov r0,[r0+#0xffcb]
mov [r0+#0xffcb],r0
mov [r0],0xffcb
mov 0xffcb,[r0]
mov r0,0xffcb
mov 0xffcb,r0

85
gas/testsuite/gas/xc16x/mov_test.s Normal file
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@ -0,0 +1,85 @@
.xc16x
mov r0,r1
mov r0,#02
mov r0,#0x0001
mov r0,[r1]
mov r0,[r1+]
mov [r0],r1
mov [-r0],r1
mov [r0],[r1]
mov [r0+],[r1]
mov [r0],[r1+]
mov r0,[r0+#0x0001]
mov [r0+#0x0001],r0
mov [r0],0x0001
mov 0x0001,[r0]
mov r0,0x0001
mov 0x0001,r0
mov r0,r1
mov r0,#02
mov r0,#0xffff
mov r0,[r1]
mov r0,[r1+]
mov [r0],r1
mov [-r0],r1
mov [r0],[r1]
mov [r0+],[r1]
mov [r0],[r1+]
mov r0,[r0+#0xffff]
mov [r0+#0xffff],r0
mov [r0],0xffff
mov 0xffff,[r0]
mov r0,0xffff
mov 0xffff,r0
movb rl0,r2
movb rl0,#0x12
movb r3,[r2]
movb rl0,[r2+]
movb [-r2],rl0
movb [r3],[r2+]
movb [r3],[r2]
movb [r2+],[r3]
movb [r2],[r3+]
movb rl0,[r3+#0x1234]
movb [r3+#0x1234],rl0
movb [r3],0x1234
movb [r3],0x1234
movb 0x1234,[r3]
movb rl0,0x12
movb 0x12,rl0
movb rl0,r2
movb rl0,#0xff
movb r3,[r2]
movb rl0,[r2+]
movb [-r2],rl0
movb [r3],[r2+]
movb [r3],[r2]
movb [r2+],[r3]
movb [r2],[r3+]
movb rl0,[r3+#0xffff]
movb [r3+#0xffff],rl0
movb [r3],0xffff
movb [r3],0xffff
movb 0xffff,[r3]
movb rl0,0xff
movb 0xff,rl0
movbs r0,rl1
movbs r0,0x12
movbs 0x1234,rl0
movbs r0,rl1
movbs r0,0xff
movbs 0xffff,rl0
movbz r2,rl0
movbz r0,0x1234
movbz 0x1234,rl0
movbz r2,rl0
movbz r0,0xffff
movbz 0xffff,rl0

26
gas/testsuite/gas/xc16x/movb.s Normal file
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@ -0,0 +1,26 @@
.section .text
.global _fun
xc16x_movb:
movb rl0,r2
movb rl0,#0x12
movb r3,[r2]
movb rl0,[r2+]
movb [-r2],rl0
movb [r3],[r2+]
movb [r3],[r2]
movb [r2+],[r3]
movb [r2],[r3+]
movb rl0,[r3+#0x1234]
movb [r3+#0x1234],rl0
movb [r3],0x1234
movb [r3],0xeeff
movb 0x1234,[r3]
movb rl0,0x12
movb 0x12,rl0

8
gas/testsuite/gas/xc16x/movbs.s Normal file
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@ -0,0 +1,8 @@
.section .text
.global _fun
xc16x_movbs:
movbs r0,rl1
movbs r0,0xff
movbs 0xffcb,rl0

9
gas/testsuite/gas/xc16x/movbz.s Normal file
View File

@ -0,0 +1,9 @@
.section .text
.global _fun
xc16x_movbz:
movbz r2,rl0
movbz r0,0x23dd
movbz 0x23,rl0

6
gas/testsuite/gas/xc16x/mul.s Normal file
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@ -0,0 +1,6 @@
.section .text
.global _fun
xc16x_mul:
mul r0,r1
mulu r0,r1

6
gas/testsuite/gas/xc16x/neg.s Normal file
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@ -0,0 +1,6 @@
.section .text
.global _fun
xc16x_neg:
neg r0
negb rl0

6
gas/testsuite/gas/xc16x/nop.s Normal file
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@ -0,0 +1,6 @@
.section .text
.global _fun
xc16x_nop:
nop
nop

11
gas/testsuite/gas/xc16x/or.s Normal file
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@ -0,0 +1,11 @@
.section .text
.global _fun
xc16x_or:
or r0,r1
or r0,[r1]
or r0,[r1+]
or r0,#3
or r0,#0x0234
or r0,0x4536
or 0x4536,r0

10
gas/testsuite/gas/xc16x/orb.s Normal file
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@ -0,0 +1,10 @@
.section .text
.global _fun
xc16x_or:
orb rl0,rl1
orb rl0,[r1]
orb rl0,[r1+]
orb rl0,#3
orb rl0,#0x23
orb rl0,0x0234
orb 0x0234,rl0

5
gas/testsuite/gas/xc16x/prior.s Normal file
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@ -0,0 +1,5 @@
.section .text
.global _fun
xc16x_prior:
prior r0,r1

5
gas/testsuite/gas/xc16x/pushpop.s Normal file
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@ -0,0 +1,5 @@
.section .text
.global _fun
xc16x_pushpop:
pop r0
push r0

9
gas/testsuite/gas/xc16x/ret.s Normal file
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@ -0,0 +1,9 @@
.section .text
.global _fun
xc16x_ret:
ret
reti
rets
retp r5

6
gas/testsuite/gas/xc16x/scxt.s Normal file
View File

@ -0,0 +1,6 @@
.section .text
.global _fun
xc16x_scxt:
scxt r0,#0xffff
scxt r0,0xffff

14
gas/testsuite/gas/xc16x/shlrol.s Normal file
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@ -0,0 +1,14 @@
.section .text
.global _fun
xc16x_shlrol:
shl r0,r1
shl r0,#a
shr r0,r1
shr r0,#a
rol r0,r1
rol r0,#a
ror r0,r1
ror r0,#a
ashr r0,r1
ashr r0,#a

19
gas/testsuite/gas/xc16x/sub.s Normal file
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@ -0,0 +1,19 @@
.section .text
.global _fun
xc16x_sub:
sub r0,r1
sub r0,[r1]
sub r0,[r1+]
sub r0,#0x1
sub r0,#0x7643
sub r0,0x7643
sub 0x7643,r0

70
gas/testsuite/gas/xc16x/sub_test.s Normal file
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@ -0,0 +1,70 @@
.text
_start:
sub r0,r1
sub r0,[r1]
sub r0,[r1+]
sub r0,#0x1
sub r0,#0x7643
sub r0,0x7643
sub 0x7643,r0
sub r1,r0
sub r1,[r0]
sub r1,[r0+]
sub r1,#0x1
sub r1,#0xCDEF
sub r1,0xCDEF
sub 0xCDEF,r1
subb rl0,rl1
subb rl0,[r1]
subb rl0,[r1+]
subb rl0,#0x1
subb rl0,#0x43
subb rl0,0x7643
subb 0x7643,rl0
subb rl1,rl0
subb rl1,[r0]
subb rl1,[r0+]
subb rl1,#0x1
subb rl1,#0xCD
subb rl1,0xCDEF
subb 0xCDEF,rl1
subc r0,r1
subc r0,[r1]
subc r0,[r1+]
subc r0,#0x2
subc r0,#0x43
subc r0,0x7643
subc 0x7643,r0
subc r1,r0
subc r1,[r0]
subc r1,[r0+]
subc r1,#0xC
subc r1,#0xCD
subc r1,0xCDEF
subc 0xCDEF,r1
subcb rl0,rl1
subcb rl0,[r1]
subcb rl0,[r1+]
subcb rl0,#0x2
subcb rl0,#0x43
subcb rl0,0x7643
subcb 0x7643,rl0
subcb rl0,rl1
subcb rl0,[r1]
subcb rl0,[r1+]
subcb rl0,#0x2
subcb rl0,#0x43
subcb rl0,0x7643
subcb 0x7643,rl0

19
gas/testsuite/gas/xc16x/subb.s Normal file
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@ -0,0 +1,19 @@
.section .text
.global _fun
xc16x_subb:
subb rl0,rl1
subb rl0,[r1]
subb rl0,[r1+]
subb rl0,#0x1
subb rl0,#0x43
subb rl0,0x7643
subb 0x7643,rl0

19
gas/testsuite/gas/xc16x/subc.s Normal file
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@ -0,0 +1,19 @@
.section .text
.global _fun
xc16x_subc:
subc r0,r1
subc r0,[r1]
subc r0,[r1+]
subc r0,#0x2
subc r0,#0x43
subc r0,0x7643
subc 0x7643,r0

20
gas/testsuite/gas/xc16x/subcb.s Normal file
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@ -0,0 +1,20 @@
.section .text
.global _fun
xc16x_subcb:
subcb rl0,rl1
subcb rl0,[r1]
subcb rl0,[r1+]
subcb rl0,#0x2
subcb rl0,#0x43
subcb rl0,0x7643
subcb 0x7643,rl0

12
gas/testsuite/gas/xc16x/syscontrol1.s Normal file
View File

@ -0,0 +1,12 @@
.section .text
.global _fun
xc16x_syscontrol:
srst
sbrk
idle
pwrdn
srvwdt
diswdt
enwdt
einit

26
gas/testsuite/gas/xc16x/syscontrol2.s Normal file
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@ -0,0 +1,26 @@
.text
xc16x_syscontrol2:
extr #0x4
extr #0x3
extr #0x2
extr #0x1
atomic #0x4
atomic #0x3
atomic #0x2
atomic #0x1
extp r5,#0x4
extp #0x3ff,#0x4
extpr r5,#0x4
extpr #0x3ff,#0x4
exts r5,#0x4
exts #0x1,#0x4
extsr r5,#0x4
extsr #0x1,#0x4

6
gas/testsuite/gas/xc16x/trap.s Normal file
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@ -0,0 +1,6 @@
.section .text
.global _fun
xc16x_trap:
trap #0x02

1317
gas/testsuite/gas/xc16x/xc16x.exp Normal file
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File diff suppressed because it is too large Load Diff

10
gas/testsuite/gas/xc16x/xor.s Normal file
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@ -0,0 +1,10 @@
.section .text
.global _fun
xc16x_or:
xor r0,r1
xor r0,[r1]
xor r0,[r1+]
xor r0,#3
xor r0,#0x0234
xor r0,0x0234
xor 0x0234,r0

10
gas/testsuite/gas/xc16x/xorb.s Normal file
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@ -0,0 +1,10 @@
.section .text
.global _fun
xc16x_xorb:
xorb rl0,rl1
xorb rl0,[r1]
xorb rl0,[r1+]
xorb rl0,#3
xorb rl0,#0x34
xorb rl0,0x2403
xorb 0x2403,rl0

6
include/ChangeLog
View File

@ -1,3 +1,9 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* dis-asm.h (print_insn_xc16c): New prototype.
2006-02-06 Steve Ellcey <sje@cup.hp.com>
* elf/ia64.h (SHF_IA_64_HP_TLS): New.

17
include/dis-asm.h
View File

@ -2,7 +2,7 @@
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
@ -17,7 +17,7 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA.
Written by Cygnus Support, 1993.
The opcode library (libopcodes.a) provides instruction decoders for
@ -48,7 +48,7 @@ enum dis_insn_type {
dis_dref2 /* Two data references in instruction */
};
/* This struct is passed into the instruction decoding routine,
/* This struct is passed into the instruction decoding routine,
and is passed back out into each callback. The various fields are used
for conveying information from your main routine into your callbacks,
for passing information into the instruction decoders (such as the
@ -136,7 +136,7 @@ typedef struct disassemble_info {
displaying debugging outout. */
bfd_boolean (* symbol_is_valid)
(asymbol *, struct disassemble_info * info);
/* These are for buffer_read_memory. */
bfd_byte *buffer;
bfd_vma buffer_vma;
@ -156,7 +156,7 @@ typedef struct disassemble_info {
int bytes_per_chunk;
enum bfd_endian display_endian;
/* Number of octets per incremented target address
/* Number of octets per incremented target address
Normally one, but some DSPs have byte sizes of 16 or 32 bits. */
unsigned int octets_per_byte;
@ -252,7 +252,7 @@ extern int print_insn_pj (bfd_vma, disassemble_info *);
extern int print_insn_big_powerpc (bfd_vma, disassemble_info *);
extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
extern int print_insn_rs6000 (bfd_vma, disassemble_info *);
extern int print_insn_s390 (bfd_vma, disassemble_info *);
extern int print_insn_s390 (bfd_vma, disassemble_info *);
extern int print_insn_sh (bfd_vma, disassemble_info *);
extern int print_insn_tic30 (bfd_vma, disassemble_info *);
extern int print_insn_tic4x (bfd_vma, disassemble_info *);
@ -267,6 +267,7 @@ extern int print_insn_sh64 (bfd_vma, disassemble_info *);
extern int print_insn_sh64x_media (bfd_vma, disassemble_info *);
extern int print_insn_frv (bfd_vma, disassemble_info *);
extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
extern int print_insn_xc16x (bfd_vma, disassemble_info *);
extern int print_insn_m32c (bfd_vma, disassemble_info *);
extern disassembler_ftype arc_get_disassembler (void *);
@ -315,10 +316,10 @@ extern void generic_print_address
extern int generic_symbol_at_address
(bfd_vma, struct disassemble_info *);
/* Also always true. */
/* Also always true. */
extern bfd_boolean generic_symbol_is_valid
(asymbol *, struct disassemble_info *);
/* Method to initialize a disassemble_info struct. This should be
called by all applications creating such a struct. */
extern void init_disassemble_info (struct disassemble_info *info, void *stream,

8
include/elf/ChangeLog
View File

@ -1,3 +1,11 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* common.h (EM_XC16X): New entry for xc16x cpu.
Sort other EM_* numbers into numerical order.
* xc16x.h: New file.
2006-02-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2258

99
include/elf/common.h
View File

@ -198,79 +198,80 @@
unofficial e_machine number should eventually ask registry@caldera.com for
an officially blessed number to be added to the list above. */
#define EM_PJ_OLD 99 /* picoJava */
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
/* Old version of Sparc v9, from before the ABI; this should be
removed shortly. */
#define EM_OLD_SPARCV9 11
/* Old version of Sparc v9, from before the ABI;
This should be removed shortly. */
#define EM_OLD_SPARCV9 11
/* Old version of PowerPC, this should be removed shortly. */
#define EM_PPC_OLD 17
#define EM_PPC_OLD 17
/* (Deprecated) Temporary number for the OpenRISC processor. */
#define EM_OR32 0x8472
/* picoJava */
#define EM_PJ_OLD 99
/* Renesas M32C and M16C. */
#define EM_M32C 0xFEB0
/* AVR magic number. Written in the absense of an ABI. */
#define EM_AVR_OLD 0x1057
/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_M32R 0x9041
/* MSP430 magic number. Written in the absense of everything. */
#define EM_MSP430_OLD 0x1059
/* Alpha backend magic number. Written in the absence of an ABI. */
#define EM_ALPHA 0x9026
/* old S/390 backend magic number. Written in the absence of an ABI. */
#define EM_S390_OLD 0xa390
/* D10V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D10V 0x7650
/* D30V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D30V 0x7676
/* V850 backend magic number. Written in the absense of an ABI. */
#define EM_CYGNUS_V850 0x9080
/* mn10200 and mn10300 backend magic numbers.
Written in the absense of an ABI. */
#define EM_CYGNUS_MN10200 0xdead
#define EM_CYGNUS_MN10300 0xbeef
/* Morpho MT. Written in the absense of an ABI. */
#define EM_MT 0x2530
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
/* AVR magic number
Written in the absense of an ABI. */
#define EM_AVR_OLD 0x1057
/* OpenRISC magic number
Written in the absense of an ABI. */
/* OpenRISC magic number. Written in the absense of an ABI. */
#define EM_OPENRISC_OLD 0x3426
/* DLX magic number
Written in the absense of an ABI. */
/* DLX magic number. Written in the absense of an ABI. */
#define EM_DLX 0x5aa5
#define EM_XSTORMY16 0xad45
/* FRV magic number - no EABI available??. */
#define EM_CYGNUS_FRV 0x5441
/* Ubicom IP2xxx; no ABI */
/* Infineon Technologies 16-bit microcontroller with C166-V2 core. */
#define EM_XC16X 0x4688
/* D10V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D10V 0x7650
/* D30V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D30V 0x7676
/* Ubicom IP2xxx; Written in the absense of an ABI. */
#define EM_IP2K_OLD 0x8217
#define EM_MT 0x2530 /* Morpho MT; no ABI */
/* (Deprecated) Temporary number for the OpenRISC processor. */
#define EM_OR32 0x8472
/* MSP430 magic number
Written in the absense everything. */
#define EM_MSP430_OLD 0x1059
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
/* Alpha backend magic number. Written in the absence of an ABI. */
#define EM_ALPHA 0x9026
/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_M32R 0x9041
/* V850 backend magic number. Written in the absense of an ABI. */
#define EM_CYGNUS_V850 0x9080
/* old S/390 backend magic number. Written in the absence of an ABI. */
#define EM_S390_OLD 0xa390
/* Old, unofficial value for Xtensa. */
#define EM_XTENSA_OLD 0xabc7
#define EM_XSTORMY16 0xad45
/* mn10200 and mn10300 backend magic numbers.
Written in the absense of an ABI. */
#define EM_CYGNUS_MN10300 0xbeef
#define EM_CYGNUS_MN10200 0xdead
/* Renesas M32C and M16C. */
#define EM_M32C 0xFEB0
/* Vitesse IQ2000. */
#define EM_IQ2000 0xFEBA

41
include/elf/xc16x.h Normal file
View File

@ -0,0 +1,41 @@
/* Infineon XC16X ELF support for BFD.
Copyright 2006 Free Software Foundation, Inc.
Contributed by KPIT Cummins Infosystems
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#ifndef _ELF_XC16X_H
#define _ELF_XC16X_H
#include "elf/reloc-macros.h"
/* Relocations. */
START_RELOC_NUMBERS (elf_xc16x_reloc_type)
RELOC_NUMBER (R_XC16X_NONE, 0)
RELOC_NUMBER (R_XC16X_ABS_8, 1)
RELOC_NUMBER (R_XC16X_ABS_16, 2)
RELOC_NUMBER (R_XC16X_ABS_32, 3)
RELOC_NUMBER (R_XC16X_8_PCREL, 4)
RELOC_NUMBER (R_XC16X_PAG, 5)
RELOC_NUMBER (R_XC16X_POF, 6)
RELOC_NUMBER (R_XC16X_SEG, 7)
RELOC_NUMBER (R_XC16X_SOF, 8)
END_RELOC_NUMBERS (R_XC16X_max)
#endif /* _ELF_XC16X_H */

16
ld/ChangeLog
View File

@ -1,3 +1,19 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* scripttemp/elf32xc16x.sc: Default linker script for tiny model.
* scripttemp/elf32xc16xl.sc: Default linker script for large model.
* scripttemp/elf32xc16xs.sc: Default linker script for small model.
* emulparams/elf32xc16x.sh: Emulation script for tiny model.
* emulparams/elf32xc16xl.sh: Emulation script for large model.
* emulparams/elf32xc16xs.sh: Emulation script for small model.
* Makefile.am: Add entry to make xc16x target.
* Makefile.in: Regenerate.
* configure.tgt: Specify default and other emulation parameters
for xc16x.
* NEWS: Announce the support for the new target.
2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
* configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):

15
ld/Makefile.am
View File

@ -183,6 +183,9 @@ ALL_EMULATIONS = \
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
eelf32xc16x.o \
eelf32xc16xl.o \
eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@ -624,6 +627,18 @@ eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}

15
ld/Makefile.in
View File

@ -406,6 +406,9 @@ ALL_EMULATIONS = \
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
eelf32xc16x.o \
eelf32xc16xl.o \
eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@ -1428,6 +1431,18 @@ eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}

2
ld/NEWS
View File

@ -1,5 +1,7 @@
-*- text -*-
* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
* Modify the Linux linker to seach /etc/ld.so.conf first before
checking default search directories for DT_NEEDED entries.

3
ld/configure.tgt
View File

@ -554,6 +554,9 @@ vax-*-linux-*) targ_emul=elf32vax
;;
w65-*-*) targ_emul=w65
;;
xc16x-*-elf) targ_emul=elf32xc16x
targ_extra_emuls="elf32xc16xl elf32xc16xs"
;;
xstormy16-*-*) targ_emul=elf32xstormy16
;;
xtensa-*-*) targ_emul=elf32xtensa

8
ld/emulparams/elf32xc16x.sh Normal file
View File

@ -0,0 +1,8 @@
SCRIPT_NAME=elf32xc16x
TEMPLATE_NAME=elf32
OUTPUT_FORMAT="elf32-xc16x"
TEXT_START_ADDR=0x00400
ARCH=xc16x
MAXPAGESIZE=256
ENTRY=_start
EMBEDDED=yes

8
ld/emulparams/elf32xc16xl.sh Normal file
View File

@ -0,0 +1,8 @@
SCRIPT_NAME=elf32xc16xl
TEMPLATE_NAME=elf32
OUTPUT_FORMAT="elf32-xc16x"
TEXT_START_ADDR=0xc00300
ARCH=xc16x:xc16xl
MAXPAGESIZE=256
ENTRY=_start
EMBEDDED=yes

8
ld/emulparams/elf32xc16xs.sh Normal file
View File

@ -0,0 +1,8 @@
SCRIPT_NAME=elf32xc16xs
TEMPLATE_NAME=elf32
OUTPUT_FORMAT="elf32-xc16x"
TEXT_START_ADDR=0xc00300
ARCH=xc16x:xc16xs
MAXPAGESIZE=256
ENTRY=_start
EMBEDDED=yes

61
ld/scripttempl/elf32xc16x.sc Normal file
View File

@ -0,0 +1,61 @@
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
ENTRY("_start")
MEMORY
{
vectarea : o =0x00000, l = 0x0300
introm : o = 0x00400, l = 0x16000
/* The stack starts at the top of main ram. */
dram : o = 0x8000 , l = 0xffff
/* At the very top of the address space is the 8-bit area. */
ldata : o =0x4000 ,l = 0x0200
}
SECTIONS
{
.init :
{
*(.init)
} ${RELOCATING+ >introm}
.text :
{
*(.rodata)
*(.text.*)
*(.text)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > introm}
.data :
{
*(.data)
*(.data.*)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > dram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > dram}
.ldata :
{
*(.ldata)
} ${RELOCATING+ > ldata}
.vects :
{
*(.vects)
} ${RELOCATING+ > vectarea}
}
EOF

64
ld/scripttempl/elf32xc16xl.sc Normal file
View File

@ -0,0 +1,64 @@
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
ENTRY("_start")
MEMORY
{
vectarea : o =0xc00000, l = 0x0300
introm : o = 0xc00300, l = 0x16000
/* The stack starts at the top of main ram. */
dram : o = 0x8000 , l = 0xffff
/* At the very top of the address space is the 8-bit area. */
ldata : o =0x4000 ,l = 0x0200
}
SECTIONS
{
/*.vects :
{
*(.vects)
} ${RELOCATING+ > vectarea} */
.init :
{
*(.init)
} ${RELOCATING+ >introm}
.text :
{
*(.rodata)
*(.text.*)
*(.text)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > introm}
.data :
{
*(.data)
*(.data.*)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > dram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > dram}
.ldata :
{
*(.ldata)
} ${RELOCATING+ > ldata}
.vects :
{
*(.vects)
} ${RELOCATING+ > vectarea}
}
EOF

64
ld/scripttempl/elf32xc16xs.sc Normal file
View File

@ -0,0 +1,64 @@
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
ENTRY("_start")
MEMORY
{
vectarea : o =0xc00000, l = 0x0300
introm : o = 0xc00300, l = 0x16000
/* The stack starts at the top of main ram. */
dram : o = 0x8000 , l = 0xffff
/* At the very top of the address space is the 8-bit area. */
ldata : o =0x4000 ,l = 0x0200
}
SECTIONS
{
/*.vects :
{
*(.vects)
} ${RELOCATING+ > vectarea} */
.init :
{
*(.init)
} ${RELOCATING+ >introm}
.text :
{
*(.rodata)
*(.text.*)
*(.text)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > introm}
.data :
{
*(.data)
*(.data.*)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > dram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ > dram}
.ldata :
{
*(.ldata)
} ${RELOCATING+ > ldata}
.vects :
{
*(.vects)
} ${RELOCATING+ > vectarea}
}
EOF

13
ld/testsuite/ChangeLog
View File

@ -1,3 +1,16 @@
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* ld-xc16x: New directory.
* ld-xc16x/absrel.d: New file.
* ld-xc16x/absrel.s: New file.
* ld-xc16x/offset.d: New file.
* ld-xc16x/offset.s: New file.
* ld-xc16x/pcreloc.d: New file.
* ld-xc16x/pcreloc.s: New file.
* ld-xc16x/xc16x.exp: New file.
2006-02-07 Paul Brook <paul@codesourcery.com>
* ld-arm/arm-elf.exp: Add thumb-entry test.

28
ld/testsuite/ld-xc16x/absrel.d Normal file
View File

@ -0,0 +1,28 @@
.*: file format elf32-xc16x
Disassembly of section .text:
00000400 <_start>:
400: e0 f5 mov r5,#0xf
402: e0 f6 mov r6,#0xf
00000404 <.12>:
404: f2 f5 1c 04 mov r5,0x41c
408: e0 d6 mov r6,#0xd
40a: f2 f7 1c 04 mov r7,0x41c
40e: e0 d8 mov r8,#0xd
00000410 <.13>:
410: f2 f5 1c 04 mov r5,0x41c
414: e0 f6 mov r6,#0xf
416: f2 f7 1c 04 mov r7,0x41c
41a: e0 f8 mov r8,#0xf
0000041c <.end>:
.*: ca 09 04 04 calla- cc_nusr0,404 <.12>
.*: ca 19 04 04 calla- cc_nusr1,404 <.12>
.*: ca 29 04 04 calla- cc_usr0,404 <.12>
.*: ea 09 04 04 jmpa- cc_nusr0,404 <.12>
.*: ea 19 04 04 jmpa- cc_nusr1,404 <.12>
.*: ea 29 04 04 jmpa- cc_usr0,404 <.12>

31
ld/testsuite/ld-xc16x/absrel.s Normal file
View File

@ -0,0 +1,31 @@
.global _start
_start:
mov r5,#0xf
mov r6,#0xf
.12:
mov r5,.end
mov r6,#0xd
mov r7,.end
mov r8,#0xd
.13:
mov r5,.end
mov r6,#0xf
mov r7,.end
mov r8,#0xf
.end:
;calla cc_UC,.13
;calla cc_usr1,.12
;calla+ cc_UGT,.12
calla- cc_nusr0,.12
calla- cc_nusr1,.12
calla- cc_usr0,.12
;jmpa cc_UGT,.end
;jmpa cc_nusr0,.end
;jmpa+ cc_UGT,.12
jmpa- cc_nusr0,.12
jmpa- cc_nusr1,.12
jmpa- cc_usr0,.12

18
ld/testsuite/ld-xc16x/offset.d Normal file
View File

@ -0,0 +1,18 @@
.*: file format elf32-xc16x
Disassembly of section .text:
00000400 <_start>:
400: e0 f8 mov r8,#0xf
402: fa 00 08 04 jmps #seg:0x0,#sof:0x408
406: e0 f9 mov r9,#0xf
00000408 <.12>:
408: e0 f5 mov r5,#0xf
40a: e0 f7 mov r7,#0xf
40c: da 00 10 04 calls #seg:0x0,#sof:0x410
00000410 <.13>:
410: e0 f6 mov r6,#0xf
412: e0 f8 mov r8,#0xf

13
ld/testsuite/ld-xc16x/offset.s Normal file
View File

@ -0,0 +1,13 @@
.global _start
_start:
mov r8,#0xf
jmps #seg:.12,#sof:.12
mov r9,#0xf
.12:
mov r5,#0xf
mov r7,#0xf
calls #seg:.13,#sof:.13
.13:
mov r6,#0xf
mov r8,#0xf

34
ld/testsuite/ld-xc16x/pcreloc.d Normal file
View File

@ -0,0 +1,34 @@
.*: file format elf32-xc16x
Disassembly of section .text:
00000400 <_start>:
400: e0 f5 mov r5,#0xf
402: e0 f6 mov r6,#0xf
404: e0 f7 mov r7,#0xf
406: e0 f8 mov r8,#0xf
408: e0 f9 mov r9,#0xf
40a: e0 fa mov r10,#0xf
40c: e0 fb mov r11,#0xf
40e: e0 fc mov r12,#0xf
00000410 <.12>:
410: 2d 07 jmpr cc_Z,7
412: 3d fe jmpr cc_NZ,254
414: 8d fd jmpr cc_ULT,253
416: 8d 45 jmpr cc_ULT,69
418: 9d 06 jmpr cc_UGE,6
41a: 0d 05 jmpr cc_UC,5
41c: 2d 04 jmpr cc_Z,4
41e: 3d 03 jmpr cc_NZ,3
00000420 <.13>:
420: fd 02 jmpr cc_ULE,2
422: dd 01 jmpr cc_SGE,1
424: bd 00 jmpr cc_SLE,0
00000426 <.end>:
426: 1d f4 jmpr cc_NET,244
428: bb fe callr 254
42a: bb fd callr 253

27
ld/testsuite/ld-xc16x/pcreloc.s Normal file
View File

@ -0,0 +1,27 @@
.global _start
_start:
mov r5,#0xf
mov r6,#0xf
mov r7,#0xf
mov r8,#0xf
mov r9,#0xf
mov r10,#0xf
mov r11,#0xf
mov r12,#0xf
.12:
jmpr cc_Z,.13
jmpr cc_NZ,.12
jmpr cc_C,.12
jmpr cc_C,0x45
jmpr cc_NC,.end
jmpr cc_UC,.end
jmpr cc_EQ,.end
jmpr cc_NE,.end
.13:
jmpr cc_ULE,.end
jmpr cc_SGE,.end
jmpr cc_SLE,.end
.end:
jmpr cc_NET,.12
callr .end
callr .end

34
ld/testsuite/ld-xc16x/pcrelocl.d Normal file
View File

@ -0,0 +1,34 @@
.*: file format elf32-xc16x
Disassembly of section .text:
00c00300 <_start>:
c00300: e0 f5 mov r5,#0xf
c00302: e0 f6 mov r6,#0xf
c00304: e0 f7 mov r7,#0xf
c00306: e0 f8 mov r8,#0xf
c00308: e0 f9 mov r9,#0xf
c0030a: e0 fa mov r10,#0xf
c0030c: e0 fb mov r11,#0xf
c0030e: e0 fc mov r12,#0xf
00c00310 <.12>:
c00310: 2d 07 jmpr cc_Z,7
c00312: 3d fe jmpr cc_NZ,254
c00314: 8d fd jmpr cc_ULT,253
c00316: 8d 45 jmpr cc_ULT,69
c00318: 9d 06 jmpr cc_UGE,6
c0031a: 0d 05 jmpr cc_UC,5
c0031c: 2d 04 jmpr cc_Z,4
c0031e: 3d 03 jmpr cc_NZ,3
00c00320 <.13>:
c00320: fd 02 jmpr cc_ULE,2
c00322: dd 01 jmpr cc_SGE,1
c00324: bd 00 jmpr cc_SLE,0
00c00326 <.end>:
c00326: 1d f4 jmpr cc_NET,244
c00328: bb fe callr 254
c0032a: bb fd callr 253

65
ld/testsuite/ld-xc16x/xc16x.exp Normal file
View File

@ -0,0 +1,65 @@
# Expect script for ld-xstormy16 tests
# Copyright (C) 2003 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#
# Test xc16x linking of pc-relative relocs. This tests the assembler and
# tools like objdump as well as the linker.
if {!([istarget "xc16x*-*-*"]) } {
return
}
# Set up a list as described in ld-lib.exp
set xc16x_tests {
{
"xc16x pc-relative relocs linker test"
""
""
{ "pcreloc.s" }
{ {objdump -Dz pcreloc.d} }
"pcreloc"
}
}
set xc16xabs_tests {
{
"xc16x absolute relative address linker test"
""
""
{ "absrel.s" }
{ {objdump -Dz absrel.d} }
"absrel"
}
}
set xc16xoffset_tests {
{
"xc16x offset linker test"
""
""
{ "offset.s" }
{ {objdump -Dz offset.d} }
"offset"
}
}
run_ld_link_tests $xc16x_tests
run_ld_link_tests $xc16xabs_tests
run_ld_link_tests $xc16xoffset_tests

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