* doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from
-{no-}mfix-vr4122-bugs.
* config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs.
(append_insn, mips_emit_delays): Update accordingly.
(OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122.
(md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120.
(md_parse_option): Update after above changes.
(md_show_usage): Add -mfix-vr4120.
This commit is contained in:
Richard Sandiford
parent
e9e2c3f6cf
commit
d766e8ec50
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@ -1,3 +1,14 @@
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2004-04-14 Richard Sandiford <rsandifo@redhat.com>
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* doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from
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-{no-}mfix-vr4122-bugs.
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* config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs.
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(append_insn, mips_emit_delays): Update accordingly.
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(OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122.
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(md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120.
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(md_parse_option): Update after above changes.
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(md_show_usage): Add -mfix-vr4120.
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2004-04-13 Bob Wilson <bob.wilson@acm.org>
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* doc/as.texinfo (Sub-Sections): Conditionalize COFF-specific use
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@ -622,7 +622,7 @@ static const unsigned int mips16_to_32_reg_map[] =
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16, 17, 2, 3, 4, 5, 6, 7
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};
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static int mips_fix_4122_bugs;
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static int mips_fix_vr4120;
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/* We don't relax branches by default, since this causes us to expand
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`la .l2 - .l1' if there's a branch between .l1 and .l2, because we
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@ -1863,11 +1863,11 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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if (prev_prev_nop && nops == 0)
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++nops;
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if (mips_fix_4122_bugs && prev_insn.insn_mo->name)
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if (mips_fix_vr4120 && prev_insn.insn_mo->name)
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{
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/* We're out of bits in pinfo, so we must resort to string
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ops here. Shortcuts are selected based on opcodes being
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limited to the VR4122 instruction set. */
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limited to the VR4120 instruction set. */
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int min_nops = 0;
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const char *pn = prev_insn.insn_mo->name;
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const char *tn = ip->insn_mo->name;
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@ -2841,7 +2841,7 @@ mips_emit_delays (bfd_boolean insns)
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++nops;
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}
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if (mips_fix_4122_bugs && prev_insn.insn_mo->name)
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if (mips_fix_vr4120 && prev_insn.insn_mo->name)
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{
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int min_nops = 0;
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const char *pn = prev_insn.insn_mo->name;
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@ -10254,10 +10254,10 @@ struct option md_longopts[] =
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#define OPTION_MNO_7000_HILO_FIX (OPTION_FIX_BASE + 1)
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{"no-fix-7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX},
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{"mno-fix7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX},
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#define OPTION_FIX_VR4122 (OPTION_FIX_BASE + 2)
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#define OPTION_NO_FIX_VR4122 (OPTION_FIX_BASE + 3)
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{"mfix-vr4122-bugs", no_argument, NULL, OPTION_FIX_VR4122},
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{"no-mfix-vr4122-bugs", no_argument, NULL, OPTION_NO_FIX_VR4122},
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#define OPTION_FIX_VR4120 (OPTION_FIX_BASE + 2)
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#define OPTION_NO_FIX_VR4120 (OPTION_FIX_BASE + 3)
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{"mfix-vr4120", no_argument, NULL, OPTION_FIX_VR4120},
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{"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120},
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/* Miscellaneous options. */
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#define OPTION_MISC_BASE (OPTION_FIX_BASE + 4)
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@ -10499,12 +10499,12 @@ md_parse_option (int c, char *arg)
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g_switch_value = 0x7fffffff;
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break;
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case OPTION_FIX_VR4122:
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mips_fix_4122_bugs = 1;
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case OPTION_FIX_VR4120:
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mips_fix_vr4120 = 1;
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break;
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case OPTION_NO_FIX_VR4122:
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mips_fix_4122_bugs = 0;
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case OPTION_NO_FIX_VR4120:
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mips_fix_vr4120 = 0;
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break;
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case OPTION_RELAX_BRANCH:
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@ -14373,6 +14373,7 @@ MIPS options:\n\
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-mips16 generate mips16 instructions\n\
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-no-mips16 do not generate mips16 instructions\n"));
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fprintf (stream, _("\
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-mfix-vr4120 work around certain VR4120 errata\n\
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-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
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-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
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-O0 remove unneeded NOPs, do not swap branches\n\
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@ -122,11 +122,11 @@ This tells the assembler to accept MDMX instructions.
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Cause nops to be inserted if the read of the destination register
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of an mfhi or mflo instruction occurs in the following two instructions.
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@item -mfix-vr4122-bugs
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@itemx -no-mfix-vr4122-bugs
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Insert @samp{nop} instructions to avoid errors in certain versions of
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the vr4122 core. This option is intended to be used on GCC-generated
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code: it is not designed to catch errors in hand-written assembler code.
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@item -mfix-vr4120
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@itemx -no-mfix-vr4120
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Insert nops to work around certain VR4120 errata. This option is
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intended to be used on GCC-generated code: it is not designed to catch
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all problems in hand-written assembler code.
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@item -m4010
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@itemx -no-m4010
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@ -1,3 +1,7 @@
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2004-04-14 Richard Sandiford <rsandifo@redhat.com>
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* gas/mips/vr4122.[sd]: Change option to -mfix-vr4120.
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2004-04-14 Richard Sandiford <rsandifo@redhat.com>
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* gas/elf/section2.e-mips: Allow named section symbols.
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@ -1,6 +1,6 @@
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#objdump: -dz --prefix-addresses -m mips:4120
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#as: -32 -march=vr4120 -mtune=vr4120 -mfix-vr4122-bugs
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#name: MIPS vr4122 workarounds
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#as: -32 -march=vr4120 -mfix-vr4120
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#name: MIPS vr4120 workarounds
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.*: +file format .*mips.*
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@ -1,4 +1,4 @@
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# Test that certain vr4122 hardware bugs are worked around.
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# Test workarounds selected by -mfix-vr4120.
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# Note that we only work around bugs gcc may generate.
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r21:
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