Undo some formatting fixes
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2efaf10b6d
commit
d78c7dcade
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@ -1,6 +1,7 @@
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2000-08-01 Nick Clifton <nickc@cygnus.com>
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* config/tc-arm.c (do_mrs): Fix skip fo 'cpsr_all' flag.
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Undo some formatting fixes.
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2000-08-01 Kazu Hirata <kazu@hxi.com>
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@ -255,11 +255,8 @@ static CONST struct asm_cond conds[] =
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the set_bits: */
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struct asm_flg
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{
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/* Basic flag string. */
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CONST char *template;
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/* Bits to set. */
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unsigned long set_bits;
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CONST char * template; /* Basic flag string. */
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unsigned long set_bits; /* Bits to set. */
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};
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static CONST struct asm_flg s_flag[] =
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@ -1087,7 +1084,8 @@ static int my_get_expression PARAMS ((expressionS *, char **));
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CONST pseudo_typeS md_pseudo_table[] =
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{
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{ "req", s_req, 0 }, /* Never called becasue '.req' does not start line. */
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/* Never called becasue '.req' does not start line. */
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{ "req", s_req, 0 },
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{ "bss", s_bss, 0 },
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{ "align", s_align, 0 },
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{ "arm", s_arm, 0 },
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@ -1197,24 +1195,15 @@ add_to_lit_pool ()
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static void
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symbol_locate (symbolP, name, segment, valu, frag)
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symbolS * symbolP;
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/* It is copied, the caller can modify. */
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CONST char *name;
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/* Segment identifier (SEG_<something>). */
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segT segment;
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/* Symbol value. */
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valueT valu;
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/* Associated fragment. */
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fragS *frag;
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CONST char * name; /* It is copied, the caller can modify. */
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segT segment; /* Segment identifier (SEG_<something>). */
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valueT valu; /* Symbol value. */
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fragS * frag; /* Associated fragment. */
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{
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unsigned int name_length;
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char * preserved_copy_of_name;
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/* +1 for \0. */
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name_length = strlen (name) + 1;
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name_length = strlen (name) + 1; /* +1 for \0. */
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obstack_grow (¬es, name, name_length);
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preserved_copy_of_name = obstack_finish (¬es);
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#ifdef STRIP_UNDERSCORE
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@ -1269,8 +1258,7 @@ validate_immediate (val)
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for (i = 0; i < 32; i += 2)
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if ((a = rotate_left (val, i)) <= 0xff)
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/* 12-bit pack: [shift-cnt,const]. */
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return a | (i << 7);
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return a | (i << 7); /* 12-bit pack: [shift-cnt,const]. */
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return FAIL;
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}
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@ -1438,7 +1426,6 @@ s_force_thumb (ignore)
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This is used by gcc/config/arm/lib1funcs.asm for example
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to compile interworking support functions even if the
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target processor should not support interworking. */
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if (! thumb_mode)
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{
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thumb_mode = 2;
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@ -1478,8 +1465,9 @@ s_thumb_set (equiv)
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register char * end_name;
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register symbolS * symbolP;
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/* Especial apologies for the random logic: This just grew, and
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could be parsed much more simply! Dean in haste. */
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/* Especial apologies for the random logic:
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This just grew, and could be parsed much more simply!
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Dean - in haste. */
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name = input_line_pointer;
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delim = get_symbol_end ();
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end_name = input_line_pointer;
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@ -1516,6 +1504,7 @@ s_thumb_set (equiv)
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{
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extern struct list_info_struct * listing_tail;
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fragS * dummy_frag = (fragS *) xmalloc (sizeof (fragS));
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memset (dummy_frag, 0, sizeof (fragS));
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dummy_frag->fr_type = rs_fill;
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dummy_frag->line = listing_tail;
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@ -1611,6 +1600,7 @@ opcode_select (width)
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{
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if (! (cpu_variant & ARM_THUMB))
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as_bad (_("selected processor does not support THUMB opcodes"));
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thumb_mode = 1;
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/* No need to force the alignment, since we will have been
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coming from ARM mode, which is word-aligned. */
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@ -1623,9 +1613,12 @@ opcode_select (width)
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{
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if ((cpu_variant & ARM_ANY) == ARM_THUMB)
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as_bad (_("selected processor does not support ARM opcodes"));
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thumb_mode = 0;
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if (!need_pass_2)
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frag_align (2, 0, 0);
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record_alignment (now_seg, 1);
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}
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break;
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@ -1703,8 +1696,8 @@ skip_past_comma (str)
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/* A standard register must be given at this point.
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SHIFT is the place to put it in inst.instruction.
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Restore input start point on err.
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Return the reg#, or FAIL. */
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Restores input start point on error.
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Returns the reg#, or FAIL. */
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static int
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reg_required_here (str, shift)
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@ -2201,8 +2194,7 @@ do_msr (str, flags)
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UMULL RdLo, RdHi, Rm, Rs
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SMULL RdLo, RdHi, Rm, Rs
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UMLAL RdLo, RdHi, Rm, Rs
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SMLAL RdLo, RdHi, Rm, Rs
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*/
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SMLAL RdLo, RdHi, Rm, Rs. */
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static void
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do_mull (str, flags)
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@ -2370,7 +2362,7 @@ do_mla (str, flags)
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return;
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}
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/* Return the index into fp_values of a floating point number,
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/* Returns the index into fp_values of a floating point number,
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or -1 if not in the table. */
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static int
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@ -2554,6 +2546,7 @@ decode_shift (str, unrestrict)
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{
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inst.error = NULL;
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p ++;
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if (my_get_expression (& inst.reloc.exp, & p))
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return FAIL;
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@ -2569,8 +2562,8 @@ decode_shift (str, unrestrict)
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return FAIL;
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}
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/* Shifts of zero should be converted to lsl (which is
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zero). */
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/* Shifts of zero should be converted to lsl
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(which is zero). */
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if (num == 0)
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{
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* str = p;
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@ -2590,6 +2583,7 @@ decode_shift (str, unrestrict)
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inst.reloc.type = BFD_RELOC_ARM_SHIFT_IMM;
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inst.reloc.pc_rel = 0;
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inst.instruction |= shft->value;
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* str = p;
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return SUCCESS;
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}
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@ -2608,15 +2602,14 @@ decode_shift (str, unrestrict)
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}
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/* Do those data_ops which can take a negative immediate constant
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by altering the instuction. A bit of a hack really. */
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/* MOV <-> MVN
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by altering the instuction. A bit of a hack really.
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MOV <-> MVN
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AND <-> BIC
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ADC <-> SBC
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by inverting the second operand, and
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ADD <-> SUB
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CMP <-> CMN
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by negating the second operand.
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*/
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by negating the second operand. */
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static int
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negate_data_op (instruction, value)
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@ -2764,7 +2757,7 @@ data_op2 (str)
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if (value == FAIL)
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{
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/* Can't be done. Perhaps the code reads something like
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"add Rd, Rn, #-n", where "sub Rd, Rn, #n" would be ok. */
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"add Rd, Rn, #-n", where "sub Rd, Rn, #n" would be OK. */
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if ((value = negate_data_op (&inst.instruction,
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inst.reloc.exp.X_add_number))
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== FAIL)
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@ -4447,7 +4440,6 @@ thumb_shift (str, shift)
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{
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/* Value isn't known yet, create a dummy reloc and let reloc
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hacking fix it up. */
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inst.reloc.type = BFD_RELOC_ARM_THUMB_SHIFT;
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}
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else
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@ -6259,6 +6251,7 @@ tc_gen_reloc (section, fixp)
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default:
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{
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char * type;
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switch (fixp->fx_r_type)
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{
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case BFD_RELOC_ARM_IMMEDIATE: type = "IMMEDIATE"; break;
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@ -6485,7 +6478,8 @@ md_assemble (str)
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if (cond)
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{
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if (cond->value == 0xf0000000)
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as_tsktsk (_("Warning: Use of the 'nv' conditional is deprecated\n"));
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as_tsktsk (
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_("Warning: Use of the 'nv' conditional is deprecated\n"));
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cond_code = cond->value;
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r += 2;
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@ -6638,34 +6632,33 @@ md_assemble (str)
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}
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/* md_parse_option
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* Invocation line includes a switch not recognized by the base assembler.
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* See if it's a processor-specific option. These are:
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* Cpu variants, the arm part is optional:
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* -m[arm]1 Currently not supported.
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* -m[arm]2, -m[arm]250 Arm 2 and Arm 250 processor
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* -m[arm]3 Arm 3 processor
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* -m[arm]6[xx], Arm 6 processors
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* -m[arm]7[xx][t][[d]m] Arm 7 processors
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* -m[arm]8[10] Arm 8 processors
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* -m[arm]9[20][tdmi] Arm 9 processors
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* -mstrongarm[110[0]] StrongARM processors
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* -m[arm]v[2345[t]] Arm architectures
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* -mall All (except the ARM1)
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* FP variants:
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* -mfpa10, -mfpa11 FPA10 and 11 co-processor instructions
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* -mfpe-old (No float load/store multiples)
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* -mno-fpu Disable all floating point instructions
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* Run-time endian selection:
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* -EB big endian cpu
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* -EL little endian cpu
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* ARM Procedure Calling Standard:
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* -mapcs-32 32 bit APCS
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* -mapcs-26 26 bit APCS
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* -mapcs-float Pass floats in float regs
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* -mapcs-reentrant Position independent code
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* -mthumb-interwork Code supports Arm/Thumb interworking
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* -moabi Old ELF ABI
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*/
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Invocation line includes a switch not recognized by the base assembler.
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See if it's a processor-specific option. These are:
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Cpu variants, the arm part is optional:
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-m[arm]1 Currently not supported.
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-m[arm]2, -m[arm]250 Arm 2 and Arm 250 processor
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-m[arm]3 Arm 3 processor
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-m[arm]6[xx], Arm 6 processors
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-m[arm]7[xx][t][[d]m] Arm 7 processors
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-m[arm]8[10] Arm 8 processors
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-m[arm]9[20][tdmi] Arm 9 processors
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-mstrongarm[110[0]] StrongARM processors
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-m[arm]v[2345[t]] Arm architectures
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-mall All (except the ARM1)
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FP variants:
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-mfpa10, -mfpa11 FPA10 and 11 co-processor instructions
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-mfpe-old (No float load/store multiples)
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-mno-fpu Disable all floating point instructions
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Run-time endian selection:
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-EB big endian cpu
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-EL little endian cpu
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ARM Procedure Calling Standard:
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-mapcs-32 32 bit APCS
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-mapcs-26 26 bit APCS
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-mapcs-float Pass floats in float regs
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-mapcs-reentrant Position independent code
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-mthumb-interwork Code supports Arm/Thumb interworking
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-moabi Old ELF ABI */
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CONST char * md_shortopts = "m:k";
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@ -7195,8 +7188,7 @@ arm_adjust_symtab ()
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{
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/* Mark the symbol as a Thumb function. */
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if ( S_GET_STORAGE_CLASS (sym) == C_STAT
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/* This can happen! */
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|| S_GET_STORAGE_CLASS (sym) == C_LABEL)
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|| S_GET_STORAGE_CLASS (sym) == C_LABEL) /* This can happen! */
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S_SET_STORAGE_CLASS (sym, C_THUMBSTATFUNC);
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else if (S_GET_STORAGE_CLASS (sym) == C_EXT)
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@ -7205,8 +7197,7 @@ arm_adjust_symtab ()
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as_bad (_("%s: unexpected function type: %d"),
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S_GET_NAME (sym), S_GET_STORAGE_CLASS (sym));
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}
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else
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switch (S_GET_STORAGE_CLASS (sym))
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else switch (S_GET_STORAGE_CLASS (sym))
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{
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case C_EXT:
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S_SET_STORAGE_CLASS (sym, C_THUMBEXT);
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