Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that
accept an accumulator choice. * cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
This commit is contained in:
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1beffba126
commit
d846a17c70
@ -98,13 +98,13 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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{ M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
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{ M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
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{ M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MACWHI, && case_read_READ_FMT_MACWHI },
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{ M32RX_XINSN_MACWHI_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MACWLO, && case_read_READ_FMT_MACWHI },
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{ M32RX_XINSN_MACWLO_A, && case_read_READ_FMT_MACHI_A },
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{ M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
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{ M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
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{ M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MULWHI, && case_read_READ_FMT_MULWHI },
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{ M32RX_XINSN_MULWHI_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MULWLO, && case_read_READ_FMT_MULWHI },
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{ M32RX_XINSN_MULWLO_A, && case_read_READ_FMT_MULHI_A },
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{ M32RX_XINSN_MV, && case_read_READ_FMT_MV },
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{ M32RX_XINSN_MV, && case_read_READ_FMT_MV },
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{ M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
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{ M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
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{ M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
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{ M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
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@ -148,7 +148,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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{ M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
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{ M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
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{ M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
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{ M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
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{ M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
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{ M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
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{ M32RX_XINSN_MSBLO, && case_read_READ_FMT_MACWHI },
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{ M32RX_XINSN_MSBLO, && case_read_READ_FMT_MSBLO },
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{ M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
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{ M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
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{ M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
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{ M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
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{ M32RX_XINSN_SC, && case_read_READ_FMT_SC },
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{ M32RX_XINSN_SC, && case_read_READ_FMT_SC },
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@ -620,19 +620,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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}
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}
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BREAK (read);
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BREAK (read);
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CASE (read, READ_FMT_MACWHI) : /* e.g. macwhi $src1,$src2 */
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{
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#define OPRND(f) par_exec->operands.fmt_macwhi.f
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EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MACWHI_CODE
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/* Fetch the input operands for the semantic handler. */
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OPRND (accum) = m32rx_h_accum_get (current_cpu);
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OPRND (src1) = CPU (h_gr[f_r1]);
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OPRND (src2) = CPU (h_gr[f_r2]);
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#undef OPRND
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}
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BREAK (read);
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CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
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CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
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{
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{
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#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
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#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
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@ -645,18 +632,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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}
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}
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BREAK (read);
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BREAK (read);
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CASE (read, READ_FMT_MULWHI) : /* e.g. mulwhi $src1,$src2 */
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{
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#define OPRND(f) par_exec->operands.fmt_mulwhi.f
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EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MULWHI_CODE
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/* Fetch the input operands for the semantic handler. */
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OPRND (src1) = CPU (h_gr[f_r1]);
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OPRND (src2) = CPU (h_gr[f_r2]);
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#undef OPRND
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}
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BREAK (read);
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CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
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CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
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{
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{
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#define OPRND(f) par_exec->operands.fmt_mv.f
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#define OPRND(f) par_exec->operands.fmt_mv.f
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@ -945,6 +920,19 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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}
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}
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BREAK (read);
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BREAK (read);
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CASE (read, READ_FMT_MSBLO) : /* e.g. msblo $src1,$src2 */
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{
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#define OPRND(f) par_exec->operands.fmt_msblo.f
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EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MSBLO_CODE
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/* Fetch the input operands for the semantic handler. */
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OPRND (accum) = m32rx_h_accum_get (current_cpu);
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OPRND (src1) = CPU (h_gr[f_r1]);
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OPRND (src2) = CPU (h_gr[f_r2]);
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#undef OPRND
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}
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BREAK (read);
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CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
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CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
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{
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{
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#define OPRND(f) par_exec->operands.fmt_mulwu1.f
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#define OPRND(f) par_exec->operands.fmt_mulwu1.f
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@ -2364,23 +2364,23 @@ SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
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#undef OPRND
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#undef OPRND
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}
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}
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/* macwhi: macwhi $src1,$src2. */
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/* macwhi-a: macwhi $src1,$src2,$acc. */
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CIA
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CIA
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SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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SEM_FN_NAME (m32rx,macwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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{
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{
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insn_t insn = SEM_INSN (sem_arg);
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insn_t insn = SEM_INSN (sem_arg);
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#define OPRND(f) par_exec->operands.fmt_macwhi.f
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#define OPRND(f) par_exec->operands.fmt_machi_a.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA UNUSED pc = PC;
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CIA UNUSED pc = PC;
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EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
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EXTRACT_FMT_MACWHI_CODE
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EXTRACT_FMT_MACHI_A_CODE
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{
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{
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DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
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DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))));
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m32rx_h_accum_set (current_cpu, opval);
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m32rx_h_accums_set (current_cpu, f_acc, opval);
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TRACE_RESULT (current_cpu, "accum", 'D', opval);
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TRACE_RESULT (current_cpu, "acc", 'D', opval);
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}
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}
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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@ -2397,23 +2397,23 @@ SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
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#undef OPRND
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#undef OPRND
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}
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}
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/* macwlo: macwlo $src1,$src2. */
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/* macwlo-a: macwlo $src1,$src2,$acc. */
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CIA
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CIA
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SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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SEM_FN_NAME (m32rx,macwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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{
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{
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insn_t insn = SEM_INSN (sem_arg);
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insn_t insn = SEM_INSN (sem_arg);
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#define OPRND(f) par_exec->operands.fmt_macwhi.f
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#define OPRND(f) par_exec->operands.fmt_machi_a.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA UNUSED pc = PC;
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CIA UNUSED pc = PC;
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EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
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EXTRACT_FMT_MACWHI_CODE
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EXTRACT_FMT_MACHI_A_CODE
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{
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{
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DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
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DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))));
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m32rx_h_accum_set (current_cpu, opval);
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m32rx_h_accums_set (current_cpu, f_acc, opval);
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TRACE_RESULT (current_cpu, "accum", 'D', opval);
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TRACE_RESULT (current_cpu, "acc", 'D', opval);
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}
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}
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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@ -2530,23 +2530,23 @@ SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
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#undef OPRND
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#undef OPRND
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}
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}
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/* mulwhi: mulwhi $src1,$src2. */
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/* mulwhi-a: mulwhi $src1,$src2,$acc. */
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CIA
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CIA
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SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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SEM_FN_NAME (m32rx,mulwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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{
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{
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insn_t insn = SEM_INSN (sem_arg);
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insn_t insn = SEM_INSN (sem_arg);
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#define OPRND(f) par_exec->operands.fmt_mulwhi.f
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#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA UNUSED pc = PC;
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CIA UNUSED pc = PC;
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EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
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EXTRACT_FMT_MULWHI_CODE
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EXTRACT_FMT_MULHI_A_CODE
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{
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{
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DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8);
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DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))));
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m32rx_h_accum_set (current_cpu, opval);
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m32rx_h_accums_set (current_cpu, f_acc, opval);
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TRACE_RESULT (current_cpu, "accum", 'D', opval);
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TRACE_RESULT (current_cpu, "acc", 'D', opval);
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}
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}
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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@ -2563,23 +2563,23 @@ SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
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#undef OPRND
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#undef OPRND
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}
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}
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/* mulwlo: mulwlo $src1,$src2. */
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/* mulwlo-a: mulwlo $src1,$src2,$acc. */
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CIA
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CIA
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SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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SEM_FN_NAME (m32rx,mulwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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{
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{
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insn_t insn = SEM_INSN (sem_arg);
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insn_t insn = SEM_INSN (sem_arg);
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#define OPRND(f) par_exec->operands.fmt_mulwhi.f
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#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA UNUSED pc = PC;
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CIA UNUSED pc = PC;
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EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
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EXTRACT_FMT_MULWHI_CODE
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EXTRACT_FMT_MULHI_A_CODE
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{
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{
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DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8);
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DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))));
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m32rx_h_accum_set (current_cpu, opval);
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m32rx_h_accums_set (current_cpu, f_acc, opval);
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TRACE_RESULT (current_cpu, "accum", 'D', opval);
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TRACE_RESULT (current_cpu, "acc", 'D', opval);
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}
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}
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
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@ -4121,12 +4121,12 @@ CIA
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SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
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{
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{
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insn_t insn = SEM_INSN (sem_arg);
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insn_t insn = SEM_INSN (sem_arg);
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#define OPRND(f) par_exec->operands.fmt_macwhi.f
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#define OPRND(f) par_exec->operands.fmt_msblo.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
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CIA UNUSED pc = PC;
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CIA UNUSED pc = PC;
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EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
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EXTRACT_FMT_MACWHI_CODE
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EXTRACT_FMT_MSBLO_CODE
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{
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{
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DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
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DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
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