Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that

accept an accumulator choice.
	* cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
This commit is contained in:
Doug Evans 1998-07-28 20:09:10 +00:00
parent 1beffba126
commit d846a17c70
2 changed files with 53 additions and 65 deletions

View File

@ -98,13 +98,13 @@ with this program; if not, write to the Free Software Foundation, Inc.,
{ M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK }, { M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
{ M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A }, { M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A }, { M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MACWHI, && case_read_READ_FMT_MACWHI }, { M32RX_XINSN_MACWHI_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MACWLO, && case_read_READ_FMT_MACWHI }, { M32RX_XINSN_MACWLO_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MUL, && case_read_READ_FMT_ADD }, { M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
{ M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A }, { M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A }, { M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MULWHI, && case_read_READ_FMT_MULWHI }, { M32RX_XINSN_MULWHI_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MULWLO, && case_read_READ_FMT_MULWHI }, { M32RX_XINSN_MULWLO_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MV, && case_read_READ_FMT_MV }, { M32RX_XINSN_MV, && case_read_READ_FMT_MV },
{ M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A }, { M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
{ M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A }, { M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
@ -148,7 +148,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
{ M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ }, { M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
{ M32RX_XINSN_SADD, && case_read_READ_FMT_SADD }, { M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
{ M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 }, { M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
{ M32RX_XINSN_MSBLO, && case_read_READ_FMT_MACWHI }, { M32RX_XINSN_MSBLO, && case_read_READ_FMT_MSBLO },
{ M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 }, { M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
{ M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 }, { M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
{ M32RX_XINSN_SC, && case_read_READ_FMT_SC }, { M32RX_XINSN_SC, && case_read_READ_FMT_SC },
@ -620,19 +620,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
} }
BREAK (read); BREAK (read);
CASE (read, READ_FMT_MACWHI) : /* e.g. macwhi $src1,$src2 */
{
#define OPRND(f) par_exec->operands.fmt_macwhi.f
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWHI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accum) = m32rx_h_accum_get (current_cpu);
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */ CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
{ {
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
@ -645,18 +632,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
} }
BREAK (read); BREAK (read);
CASE (read, READ_FMT_MULWHI) : /* e.g. mulwhi $src1,$src2 */
{
#define OPRND(f) par_exec->operands.fmt_mulwhi.f
EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MULWHI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */ CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
{ {
#define OPRND(f) par_exec->operands.fmt_mv.f #define OPRND(f) par_exec->operands.fmt_mv.f
@ -945,6 +920,19 @@ with this program; if not, write to the Free Software Foundation, Inc.,
} }
BREAK (read); BREAK (read);
CASE (read, READ_FMT_MSBLO) : /* e.g. msblo $src1,$src2 */
{
#define OPRND(f) par_exec->operands.fmt_msblo.f
EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MSBLO_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accum) = m32rx_h_accum_get (current_cpu);
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */ CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
{ {
#define OPRND(f) par_exec->operands.fmt_mulwu1.f #define OPRND(f) par_exec->operands.fmt_mulwu1.f

View File

@ -2364,23 +2364,23 @@ SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#undef OPRND #undef OPRND
} }
/* macwhi: macwhi $src1,$src2. */ /* macwhi-a: macwhi $src1,$src2,$acc. */
CIA CIA
SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec) SEM_FN_NAME (m32rx,macwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{ {
insn_t insn = SEM_INSN (sem_arg); insn_t insn = SEM_INSN (sem_arg);
#define OPRND(f) par_exec->operands.fmt_macwhi.f #define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg); ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2); CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC; CIA UNUSED pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MACWHI_CODE EXTRACT_FMT_MACHI_A_CODE
{ {
DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8); DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))));
m32rx_h_accum_set (current_cpu, opval); m32rx_h_accums_set (current_cpu, f_acc, opval);
TRACE_RESULT (current_cpu, "accum", 'D', opval); TRACE_RESULT (current_cpu, "acc", 'D', opval);
} }
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num); PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
@ -2397,23 +2397,23 @@ SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#undef OPRND #undef OPRND
} }
/* macwlo: macwlo $src1,$src2. */ /* macwlo-a: macwlo $src1,$src2,$acc. */
CIA CIA
SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec) SEM_FN_NAME (m32rx,macwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{ {
insn_t insn = SEM_INSN (sem_arg); insn_t insn = SEM_INSN (sem_arg);
#define OPRND(f) par_exec->operands.fmt_macwhi.f #define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg); ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2); CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC; CIA UNUSED pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MACWHI_CODE EXTRACT_FMT_MACHI_A_CODE
{ {
DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8); DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))));
m32rx_h_accum_set (current_cpu, opval); m32rx_h_accums_set (current_cpu, f_acc, opval);
TRACE_RESULT (current_cpu, "accum", 'D', opval); TRACE_RESULT (current_cpu, "acc", 'D', opval);
} }
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num); PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
@ -2530,23 +2530,23 @@ SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#undef OPRND #undef OPRND
} }
/* mulwhi: mulwhi $src1,$src2. */ /* mulwhi-a: mulwhi $src1,$src2,$acc. */
CIA CIA
SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec) SEM_FN_NAME (m32rx,mulwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{ {
insn_t insn = SEM_INSN (sem_arg); insn_t insn = SEM_INSN (sem_arg);
#define OPRND(f) par_exec->operands.fmt_mulwhi.f #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg); ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2); CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC; CIA UNUSED pc = PC;
EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MULWHI_CODE EXTRACT_FMT_MULHI_A_CODE
{ {
DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8); DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))));
m32rx_h_accum_set (current_cpu, opval); m32rx_h_accums_set (current_cpu, f_acc, opval);
TRACE_RESULT (current_cpu, "accum", 'D', opval); TRACE_RESULT (current_cpu, "acc", 'D', opval);
} }
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num); PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
@ -2563,23 +2563,23 @@ SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#undef OPRND #undef OPRND
} }
/* mulwlo: mulwlo $src1,$src2. */ /* mulwlo-a: mulwlo $src1,$src2,$acc. */
CIA CIA
SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec) SEM_FN_NAME (m32rx,mulwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{ {
insn_t insn = SEM_INSN (sem_arg); insn_t insn = SEM_INSN (sem_arg);
#define OPRND(f) par_exec->operands.fmt_mulwhi.f #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg); ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2); CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC; CIA UNUSED pc = PC;
EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MULWHI_CODE EXTRACT_FMT_MULHI_A_CODE
{ {
DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8); DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))));
m32rx_h_accum_set (current_cpu, opval); m32rx_h_accums_set (current_cpu, f_acc, opval);
TRACE_RESULT (current_cpu, "accum", 'D', opval); TRACE_RESULT (current_cpu, "acc", 'D', opval);
} }
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num); PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
@ -4121,12 +4121,12 @@ CIA
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec) SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{ {
insn_t insn = SEM_INSN (sem_arg); insn_t insn = SEM_INSN (sem_arg);
#define OPRND(f) par_exec->operands.fmt_macwhi.f #define OPRND(f) par_exec->operands.fmt_msblo.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg); ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2); CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC; CIA UNUSED pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWHI_CODE EXTRACT_FMT_MSBLO_CODE
{ {
DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8); DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);