Move some of the MIPS n32 ABI configuration options into the mips
multi-arch vector.
This commit is contained in:
parent
327fce13c5
commit
d929b26ff1
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@ -1,3 +1,33 @@
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Mon May 8 11:19:47 2000 Andrew Cagney <cagney@b1.cygnus.com>
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* mips-tdep.c (size_auto, size_32, size_64, size_enums): Rename
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saved_gpreg_size_auto, saved_gpreg_size_32, saved_gpreg_size_64
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and saved_gpreg_size_enums.
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(mips_stack_argsize): Update. Cleanup.
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* mips-tdep.c (STACK_ARGSIZE): Delete macro. Replaced by
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MIPS_STACK_ARGSIZE.
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(MIPS_NABI32): Delete macro. Replaced by
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MIPS_REGS_HAVE_STACK_HOME_P.
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(mips_push_arguments): Update.
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(mips_push_arguments): Replace check for MIPS_EABI or MIPS_NABI32
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with test for MIPS_REGS_HAVE_STACK_HOME_P.
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(MIPS_REGS_HAVE_STACK_HOME_P): Define. Provide non- multi-arch
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default.
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(struct gdbarch_tdep): Add mips_regs_have_stack_home_p and
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mips_default_stack_argsize.
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(MIPS_STACK_ARGSIZE): Define as mips_stack_argsize.
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(mips_stack_argsize_string): New static variable.
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(mips_stack_argsize): New function, handle default case.
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(__initialize_mips_tdep): Add command ``set mips stack-arg-size''
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implemented as an enum using size_auto et.al.
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(mips_gdbarch_init): Initialize mips_default_stack_argsize and
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mips_regs_have_stack_home_p.
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* config/mips/tm-irix5.h (MIPS_DEFAULT_SAVED_REGSIZE): Define as 8
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for n32.
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(MIPS_REGS_HAVE_STACK_HOME_P): Define as 0 for n32.
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Mon May 8 00:49:32 2000 Andrew Cagney <cagney@b1.cygnus.com>
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Mon May 8 00:49:32 2000 Andrew Cagney <cagney@b1.cygnus.com>
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* procfs.c (PROCFS_TRACE): Delete definition.
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* procfs.c (PROCFS_TRACE): Delete definition.
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@ -1,5 +1,5 @@
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/* Target machine description for SGI Iris under Irix 5, for GDB.
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/* Target machine description for SGI Iris under Irix 5, for GDB.
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Copyright 1990, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
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Copyright 1990-1993, 1995, 2000 Free Software Foundation, Inc.
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This file is part of GDB.
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This file is part of GDB.
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@ -20,6 +20,10 @@
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#include "mips/tm-irix3.h"
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#include "mips/tm-irix3.h"
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/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
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_MIPS_SIM in a tm-*.h file is simply wrong! Those are
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host-dependant macros (provided by /usr/include) and stop any
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chance of the target being cross compiled */
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#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
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#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
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/*
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/*
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* Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
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* Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
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@ -46,6 +50,15 @@
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#undef MIPS_LAST_ARG_REGNUM
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#undef MIPS_LAST_ARG_REGNUM
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#define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
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#define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
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/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
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up on the stack? For the n32 ABI, eight bytes are reserved for each
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register. Like MIPS_SAVED_REGSIZE but different. */
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#define MIPS_DEFAULT_STACK_ARGSIZE 8
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/* N32 does not reserve home space for registers used to carry
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parameters. */
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#define MIPS_REGS_HAVE_HOME_P 0
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#endif /* N32 */
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#endif /* N32 */
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148
gdb/mips-tdep.c
148
gdb/mips-tdep.c
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@ -46,22 +46,21 @@ struct frame_extra_info
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int num_args;
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int num_args;
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};
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};
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/* We allow the user to override MIPS_SAVED_REGSIZE, so define
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/* Various MIPS ISA options (related to stack analysis) can be
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the subcommand enum settings allowed. */
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overridden dynamically. Establish an enum/array for managing
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static char saved_gpreg_size_auto[] = "auto";
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them. */
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static char saved_gpreg_size_32[] = "32";
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static char saved_gpreg_size_64[] = "64";
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static char *saved_gpreg_size_enums[] = {
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static char size_auto[] = "auto";
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saved_gpreg_size_auto,
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static char size_32[] = "32";
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saved_gpreg_size_32,
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static char size_64[] = "64";
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saved_gpreg_size_64,
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static char *size_enums[] = {
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size_auto,
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size_32,
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size_64,
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0
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0
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};
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};
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/* The current (string) value of saved_gpreg_size. */
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static char *mips_saved_regsize_string = saved_gpreg_size_auto;
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/* Some MIPS boards don't support floating point while others only
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/* Some MIPS boards don't support floating point while others only
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support single-precision floating-point operations. See also
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support single-precision floating-point operations. See also
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FP_REGISTER_DOUBLE. */
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FP_REGISTER_DOUBLE. */
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@ -80,12 +79,6 @@ static int mips_fpu_type_auto = 1;
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static enum mips_fpu_type mips_fpu_type = MIPS_DEFAULT_FPU_TYPE;
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static enum mips_fpu_type mips_fpu_type = MIPS_DEFAULT_FPU_TYPE;
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#define MIPS_FPU_TYPE mips_fpu_type
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#define MIPS_FPU_TYPE mips_fpu_type
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#ifndef MIPS_DEFAULT_SAVED_REGSIZE
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#define MIPS_DEFAULT_SAVED_REGSIZE MIPS_REGSIZE
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#endif
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#define MIPS_SAVED_REGSIZE (mips_saved_regsize())
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/* Do not use "TARGET_IS_MIPS64" to test the size of floating point registers */
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/* Do not use "TARGET_IS_MIPS64" to test the size of floating point registers */
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#ifndef FP_REGISTER_DOUBLE
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#ifndef FP_REGISTER_DOUBLE
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#define FP_REGISTER_DOUBLE (REGISTER_VIRTUAL_SIZE(FP0_REGNUM) == 8)
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#define FP_REGISTER_DOUBLE (REGISTER_VIRTUAL_SIZE(FP0_REGNUM) == 8)
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@ -104,6 +97,8 @@ struct gdbarch_tdep
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int mips_last_fp_arg_regnum;
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int mips_last_fp_arg_regnum;
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int mips_default_saved_regsize;
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int mips_default_saved_regsize;
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int mips_fp_register_double;
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int mips_fp_register_double;
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int mips_regs_have_home_p;
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int mips_default_stack_argsize;
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};
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};
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#if GDB_MULTI_ARCH
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#if GDB_MULTI_ARCH
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@ -126,11 +121,30 @@ struct gdbarch_tdep
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#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type)
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#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type)
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#endif
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#endif
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/* Return the currently configured (or set) saved register size. */
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#if GDB_MULTI_ARCH
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#if GDB_MULTI_ARCH
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#undef MIPS_DEFAULT_SAVED_REGSIZE
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#undef MIPS_DEFAULT_SAVED_REGSIZE
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#define MIPS_DEFAULT_SAVED_REGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_saved_regsize)
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#define MIPS_DEFAULT_SAVED_REGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_saved_regsize)
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#elif !defined (MIPS_DEFAULT_SAVED_REGSIZE)
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#define MIPS_DEFAULT_SAVED_REGSIZE MIPS_REGSIZE
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#endif
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#endif
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static char *mips_saved_regsize_string = size_auto;
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#define MIPS_SAVED_REGSIZE (mips_saved_regsize())
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static unsigned int
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mips_saved_regsize ()
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{
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if (mips_saved_regsize_string == size_auto)
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return MIPS_DEFAULT_SAVED_REGSIZE;
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else if (mips_saved_regsize_string == size_64)
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return 8;
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else /* if (mips_saved_regsize_string == size_32) */
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return 4;
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}
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/* Indicate that the ABI makes use of double-precision registers
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/* Indicate that the ABI makes use of double-precision registers
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provided by the FPU (rather than combining pairs of registers to
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provided by the FPU (rather than combining pairs of registers to
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form double-precision values). Do not use "TARGET_IS_MIPS64" to
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form double-precision values). Do not use "TARGET_IS_MIPS64" to
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@ -141,6 +155,43 @@ struct gdbarch_tdep
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#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
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#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
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#endif
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#endif
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/* Does the caller allocate a ``home'' for each register used in the
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function call? The N32 ABI and MIPS_EABI do not, the others do. */
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#if GDB_MULTI_ARCH
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#undef MIPS_REGS_HAVE_HOME_P
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#define MIPS_REGS_HAVE_HOME_P (gdbarch_tdep (current_gdbarch)->mips_regs_have_home_p)
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#elif !defined (MIPS_REGS_HAVE_HOME_P)
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#define MIPS_REGS_HAVE_HOME_P (!MIPS_EABI)
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#endif
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/* The amount of space reserved on the stack for registers. This is
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different to MIPS_SAVED_REGSIZE as it determines the alignment of
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data allocated after the registers have run out. */
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#if GDB_MULTI_ARCH
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#undef MIPS_DEFAULT_STACK_ARGSIZE
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#define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_statck_argsize)
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#elif !defined (MIPS_DEFAULT_STACK_ARGSIZE)
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#define MIPS_DEFAULT_STACK_ARGSIZE (MIPS_DEFAULT_SAVED_REGSIZE)
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#endif
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#define MIPS_STACK_ARGSIZE (mips_stack_argsize ())
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static char *mips_stack_argsize_string = size_auto;
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static unsigned int
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mips_stack_argsize (void)
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{
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if (mips_stack_argsize_string == size_auto)
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return MIPS_DEFAULT_STACK_ARGSIZE;
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else if (mips_stack_argsize_string == size_64)
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return 8;
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else /* if (mips_stack_argsize_string == size_32) */
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return 4;
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}
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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@ -326,19 +377,6 @@ mips_print_extra_frame_info (fi)
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paddr_d (fi->extra_info->proc_desc->pdr.frameoffset));
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paddr_d (fi->extra_info->proc_desc->pdr.frameoffset));
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}
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}
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/* Return the currently configured (or set) saved register size */
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static unsigned int
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mips_saved_regsize ()
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{
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if (mips_saved_regsize_string == saved_gpreg_size_auto)
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return MIPS_DEFAULT_SAVED_REGSIZE;
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else if (mips_saved_regsize_string == saved_gpreg_size_64)
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return 8;
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else /* if (mips_saved_regsize_string == saved_gpreg_size_32) */
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return 4;
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}
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/* Convert between RAW and VIRTUAL registers. The RAW register size
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/* Convert between RAW and VIRTUAL registers. The RAW register size
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defines the remote-gdb packet. */
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defines the remote-gdb packet. */
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@ -1993,20 +2031,6 @@ setup_arbitrary_frame (argc, argv)
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return create_new_frame (argv[0], argv[1]);
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return create_new_frame (argv[0], argv[1]);
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}
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}
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/*
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* STACK_ARGSIZE -- how many bytes does a pushed function arg take up on the stack?
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*
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* For n32 ABI, eight.
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* For all others, he same as the size of a general register.
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*/
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#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
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#define MIPS_NABI32 1
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#define STACK_ARGSIZE 8
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#else
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#define MIPS_NABI32 0
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#define STACK_ARGSIZE MIPS_SAVED_REGSIZE
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#endif
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CORE_ADDR
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CORE_ADDR
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mips_push_arguments (nargs, args, sp, struct_return, struct_addr)
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mips_push_arguments (nargs, args, sp, struct_return, struct_addr)
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int nargs;
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int nargs;
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@ -2158,15 +2182,15 @@ mips_push_arguments (nargs, args, sp, struct_return, struct_addr)
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int longword_offset = 0;
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int longword_offset = 0;
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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{
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{
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if (STACK_ARGSIZE == 8 &&
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if (MIPS_STACK_ARGSIZE == 8 &&
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(typecode == TYPE_CODE_INT ||
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(typecode == TYPE_CODE_INT ||
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typecode == TYPE_CODE_PTR ||
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typecode == TYPE_CODE_PTR ||
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typecode == TYPE_CODE_FLT) && len <= 4)
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typecode == TYPE_CODE_FLT) && len <= 4)
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longword_offset = STACK_ARGSIZE - len;
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longword_offset = MIPS_STACK_ARGSIZE - len;
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else if ((typecode == TYPE_CODE_STRUCT ||
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else if ((typecode == TYPE_CODE_STRUCT ||
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typecode == TYPE_CODE_UNION) &&
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typecode == TYPE_CODE_UNION) &&
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TYPE_LENGTH (arg_type) < STACK_ARGSIZE)
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TYPE_LENGTH (arg_type) < MIPS_STACK_ARGSIZE)
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longword_offset = STACK_ARGSIZE - len;
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longword_offset = MIPS_STACK_ARGSIZE - len;
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}
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}
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write_memory (sp + stack_offset + longword_offset,
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write_memory (sp + stack_offset + longword_offset,
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@ -2223,9 +2247,8 @@ mips_push_arguments (nargs, args, sp, struct_return, struct_addr)
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stack offset does not get incremented until after
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stack offset does not get incremented until after
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we have used up the 8 parameter registers. */
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we have used up the 8 parameter registers. */
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if (!(MIPS_EABI || MIPS_NABI32) ||
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if (MIPS_REGS_HAVE_HOME_P || argnum >= 8)
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argnum >= 8)
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stack_offset += ROUND_UP (partial_len, MIPS_STACK_ARGSIZE);
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stack_offset += ROUND_UP (partial_len, STACK_ARGSIZE);
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}
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}
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}
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}
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}
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}
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@ -3809,6 +3832,7 @@ mips_gdbarch_init (info, arches)
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set_gdbarch_long_long_bit (gdbarch, 64);
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set_gdbarch_long_long_bit (gdbarch, 64);
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break;
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break;
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}
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}
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tdep->mips_default_stack_argsize = tdep->mips_default_saved_regsize;
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/* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE
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/* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE
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that could indicate -gp32 BUT gas/config/tc-mips.c contains the
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that could indicate -gp32 BUT gas/config/tc-mips.c contains the
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@ -3873,6 +3897,8 @@ mips_gdbarch_init (info, arches)
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tdep->mips_last_arg_regnum = 11;
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tdep->mips_last_arg_regnum = 11;
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/* EABI uses F12 through F19 for args */
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/* EABI uses F12 through F19 for args */
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tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
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tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
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/* EABI does not reserve home space for registers */
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tdep->mips_regs_have_home_p = 0;
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}
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}
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else
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else
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{
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{
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@ -3880,6 +3906,8 @@ mips_gdbarch_init (info, arches)
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tdep->mips_last_arg_regnum = 7;
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tdep->mips_last_arg_regnum = 7;
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/* old ABI uses F12 through F15 for args */
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/* old ABI uses F12 through F15 for args */
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tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15;
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tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15;
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/* Old ABI reserves home space for registers */
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tdep->mips_regs_have_home_p = 1;
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}
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}
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/* enable/disable the MIPS FPU */
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/* enable/disable the MIPS FPU */
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@ -4004,7 +4032,7 @@ _initialize_mips_tdep ()
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/* Allow the user to override the saved register size. */
|
/* Allow the user to override the saved register size. */
|
||||||
add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
|
add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
|
||||||
class_obscure,
|
class_obscure,
|
||||||
saved_gpreg_size_enums,
|
size_enums,
|
||||||
(char *) &mips_saved_regsize_string, "\
|
(char *) &mips_saved_regsize_string, "\
|
||||||
Set size of general purpose registers saved on the stack.\n\
|
Set size of general purpose registers saved on the stack.\n\
|
||||||
This option can be set to one of:\n\
|
This option can be set to one of:\n\
|
||||||
|
@ -4016,6 +4044,20 @@ This option can be set to one of:\n\
|
||||||
&setmipscmdlist),
|
&setmipscmdlist),
|
||||||
&showmipscmdlist);
|
&showmipscmdlist);
|
||||||
|
|
||||||
|
/* Allow the user to override the argument stack size. */
|
||||||
|
add_show_from_set (add_set_enum_cmd ("stack-arg-size",
|
||||||
|
class_obscure,
|
||||||
|
size_enums,
|
||||||
|
(char *) &mips_stack_argsize_string, "\
|
||||||
|
Set the amount of stack space reserved for each argument.\n\
|
||||||
|
This option can be set to one of:\n\
|
||||||
|
32 - Force GDB to allocate 32-bit chunks per argument\n\
|
||||||
|
64 - Force GDB to allocate 64-bit chunks per argument\n\
|
||||||
|
auto - Allow GDB to determine the correct setting from the current\n\
|
||||||
|
target and executable (default)",
|
||||||
|
&setmipscmdlist),
|
||||||
|
&showmipscmdlist);
|
||||||
|
|
||||||
/* Let the user turn off floating point and set the fence post for
|
/* Let the user turn off floating point and set the fence post for
|
||||||
heuristic_proc_start. */
|
heuristic_proc_start. */
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue