Return -1 on memory error in print_insn_msp430
Disassemblers in opcodes return -1 on memory error, but msp430 doesn't follow this convention. If I change GDB not to throw exception in disassemble_info.memory_error_func and rely on the return value of disassembler, I'll get the following output. (gdb) disassemble 0x0,+8 Dump of assembler code from 0x0 to 0x8: 0x00000000: .word 0xffff; ???? 0x00000002: .word 0xffff; ???? 0x00000004: .word 0xffff; ???? 0x00000006: .word 0xffff; ???? End of assembler dump. This patch teaches print_insn_msp430 and its callees to return -1 on memory error. opcodes: 2017-01-12 Yao Qi <yao.qi@linaro.org> * msp430-dis.c (msp430_singleoperand): Return -1 if msp430dis_opcode_signed returns false. (msp430_doubleoperand): Likewise. (msp430_branchinstr): Return -1 if msp430dis_opcode_unsigned returns false. (msp430x_calla_instr): Likewise. (print_insn_msp430): Likewise.
This commit is contained in:
Yao Qi
parent
eed0b5b263
commit
d95014a2ef
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@ -1,3 +1,13 @@
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2017-01-12 Yao Qi <yao.qi@linaro.org>
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* msp430-dis.c (msp430_singleoperand): Return -1 if
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msp430dis_opcode_signed returns false.
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(msp430_doubleoperand): Likewise.
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(msp430_branchinstr): Return -1 if
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msp430dis_opcode_unsigned returns false.
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(msp430x_calla_instr): Likewise.
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(print_insn_msp430): Likewise.
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2017-01-05 Nick Clifton <nickc@redhat.com>
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PR 20946
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@ -270,6 +270,8 @@ msp430_singleoperand (disassemble_info *info,
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(long)((addr + 2 + dst) & 0xfffff));
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}
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}
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else
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return -1;
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}
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else if (regd == 2)
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{
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@ -285,6 +287,8 @@ msp430_singleoperand (disassemble_info *info,
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sprintf (op, "&0x%05x", dst & 0xfffff);
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}
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}
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else
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return -1;
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}
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else
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{
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@ -300,6 +304,8 @@ msp430_singleoperand (disassemble_info *info,
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}
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sprintf (op, "%d(r%d)", dst, regd);
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}
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else
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return -1;
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}
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}
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break;
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@ -346,6 +352,8 @@ msp430_singleoperand (disassemble_info *info,
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sprintf (comm, "#0x%05x", dst);
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}
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}
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else
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return -1;
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}
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else
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* cycles = print_as3_reg_name (regd, op, comm, 1, 1, 3);
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@ -370,6 +378,8 @@ msp430_singleoperand (disassemble_info *info,
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(long)((addr + 2 + dst) & 0xfffff));
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}
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}
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else
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return -1;
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}
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else if (regd == 2)
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{
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@ -384,6 +394,8 @@ msp430_singleoperand (disassemble_info *info,
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sprintf (op, "&0x%05x", dst & 0xfffff);
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}
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}
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else
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return -1;
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}
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else if (regd == 3)
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{
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@ -407,6 +419,8 @@ msp430_singleoperand (disassemble_info *info,
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if (dst > 9 || dst < 0)
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sprintf (comm, "%05x", dst);
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}
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else
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return -1;
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}
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}
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break;
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@ -511,6 +525,8 @@ msp430_doubleoperand (disassemble_info *info,
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(long)((addr + 2 + dst) & 0xfffff));
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}
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}
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else
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return -1;
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}
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else if (regd == 2)
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{
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@ -526,6 +542,8 @@ msp430_doubleoperand (disassemble_info *info,
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if (src != dst)
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return 0;
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}
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else
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return -1;
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cmd_len += 4;
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*cycles = 6;
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sprintf (op1, "&0x%04x", PS (dst));
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@ -535,6 +553,8 @@ msp430_doubleoperand (disassemble_info *info,
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sprintf (op1, "&0x%05x", dst & 0xfffff);
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}
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}
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else
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return -1;
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}
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else
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{
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@ -553,6 +573,8 @@ msp430_doubleoperand (disassemble_info *info,
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if (dst > 9 || dst < -9)
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sprintf (comm1, "#0x%05x", dst);
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}
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else
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return -1;
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}
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}
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@ -613,6 +635,8 @@ msp430_doubleoperand (disassemble_info *info,
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sprintf (comm1, "0x%05x", dst & 0xfffff);
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}
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}
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else
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return -1;
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}
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else
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* cycles = print_as3_reg_name (regs, op1, comm1, 1, 1, 2);
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@ -640,6 +664,8 @@ msp430_doubleoperand (disassemble_info *info,
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(long) ((addr + 2 + dst) & 0xfffff));
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}
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}
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else
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return -1;
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}
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else if (regs == 2)
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{
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@ -658,6 +684,8 @@ msp430_doubleoperand (disassemble_info *info,
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* comm1 = 0;
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}
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}
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else
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return -1;
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}
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else if (regs == 3)
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{
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@ -683,6 +711,8 @@ msp430_doubleoperand (disassemble_info *info,
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if (dst > 9 || dst < -9)
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sprintf (comm1, "0x%05x", dst);
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}
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else
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return -1;
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}
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}
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@ -728,6 +758,8 @@ msp430_doubleoperand (disassemble_info *info,
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(long)((addr + cmd_len + dst) & 0xfffff));
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}
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}
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else
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return -1;
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cmd_len += 2;
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}
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else if (regd == 2)
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@ -743,6 +775,8 @@ msp430_doubleoperand (disassemble_info *info,
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sprintf (op2, "&0x%05x", dst & 0xfffff);
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}
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}
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else
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return -1;
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}
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else
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{
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@ -761,6 +795,8 @@ msp430_doubleoperand (disassemble_info *info,
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}
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sprintf (op2, "%d(r%d)", dst, regd);
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}
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else
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return -1;
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}
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}
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@ -821,6 +857,8 @@ msp430_branchinstr (disassemble_info *info,
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cmd_len += 2;
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sprintf (op1, "#0x%04x", PS (udst));
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}
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else
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return -1;
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}
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else
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* cycles = print_as3_reg_name (regs, op1, comm1, 1, 1, 2);
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@ -840,6 +878,8 @@ msp430_branchinstr (disassemble_info *info,
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sprintf (comm1, "PC rel. 0x%04x",
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PS ((short) addr + 2 + dst));
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}
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else
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return -1;
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}
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else if (regs == 2)
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{
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@ -849,6 +889,8 @@ msp430_branchinstr (disassemble_info *info,
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cmd_len += 2;
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sprintf (op1, "&0x%04x", PS (udst));
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}
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else
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return -1;
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}
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else if (regs == 3)
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{
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@ -864,6 +906,8 @@ msp430_branchinstr (disassemble_info *info,
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cmd_len += 2;
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sprintf (op1, "%d(r%d)", dst, regs);
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}
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else
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return -1;
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}
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}
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@ -903,6 +947,8 @@ msp430x_calla_instr (disassemble_info * info,
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else
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sprintf (comm1, "0x%05x", dst);
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}
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else
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return -1;
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break;
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case 6: /* CALLA @Rdst */
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@ -923,6 +969,8 @@ msp430x_calla_instr (disassemble_info * info,
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sprintf (op1, "&%d", (ureg << 16) + udst);
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sprintf (comm1, "0x%05x", (ureg << 16) + udst);
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}
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else
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return -1;
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break;
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case 9: /* CALLA pcrel-sym */
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@ -934,6 +982,8 @@ msp430x_calla_instr (disassemble_info * info,
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sprintf (comm1, "PC rel. 0x%05lx",
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(long) (addr + 2 + dst + (reg << 16)));
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}
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else
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return -1;
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break;
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case 11: /* CALLA #imm20 */
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@ -944,6 +994,8 @@ msp430x_calla_instr (disassemble_info * info,
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sprintf (op1, "#%d", (ureg << 16) + udst);
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sprintf (comm1, "0x%05x", (ureg << 16) + udst);
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}
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else
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return -1;
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break;
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default:
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@ -969,10 +1021,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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unsigned short bits;
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if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL))
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{
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prin (stream, ".word 0xffff; ????");
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return 2;
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}
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return -1;
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if (((int) addr & 0xffff) > 0xffdf)
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{
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@ -989,11 +1038,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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extension_word = insn;
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addr += 2;
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if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL))
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{
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prin (stream, ".word 0x%04x, 0xffff; ????",
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extension_word);
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return 4;
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}
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return -1;
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}
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for (opcode = msp430_opcodes; opcode->name; opcode++)
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@ -1011,9 +1056,13 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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&& (insn & 0x000f) == 0
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&& (insn & 0x0080) == 0)
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{
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cmd_len +=
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int ret =
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msp430_branchinstr (info, opcode, addr, insn, op1, comm1,
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&cycles);
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if (ret == -1)
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return -1;
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cmd_len += ret;
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if (cmd_len)
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break;
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}
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@ -1022,10 +1071,14 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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{
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int n;
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int reg;
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int ret;
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case 4:
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cmd_len += msp430x_calla_instr (info, addr, insn,
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op1, comm1, & cycles);
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ret = msp430x_calla_instr (info, addr, insn,
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op1, comm1, & cycles);
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if (ret == -1)
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return -1;
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cmd_len += ret;
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break;
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case 5: /* PUSHM/POPM */
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@ -1080,6 +1133,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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if (n > 9 || n < 0)
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sprintf (comm1, "0x%05x", n);
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}
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else
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return -1;
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cmd_len = 4;
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}
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sprintf (op2, "r%d", reg);
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@ -1120,6 +1175,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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if (strcmp (opcode->name, "bra") != 0)
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sprintf (op2, "r%d", reg);
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}
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else
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return -1;
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break;
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case 3: /* MOVA x(Rsrc), Rdst */
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@ -1139,6 +1196,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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sprintf (comm1, "0x%05x", n);
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}
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}
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else
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return -1;
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break;
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case 6: /* MOVA Rsrc, &abs20 */
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@ -1152,6 +1211,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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if (reg > 9 || reg < 0)
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sprintf (comm2, "0x%05x", reg);
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}
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else
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return -1;
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break;
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case 7: /* MOVA Rsrc, x(Rdst) */
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@ -1169,6 +1230,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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sprintf (comm2, "0x%05x", n);
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}
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}
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else
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return -1;
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break;
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case 8: /* MOVA #imm20, Rdst */
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@ -1185,6 +1248,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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if (strcmp (opcode->name, "bra") != 0)
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sprintf (op2, "r%d", reg);
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}
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else
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return -1;
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break;
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case 12: /* MOVA Rsrc, Rdst */
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@ -1206,15 +1271,21 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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switch (opcode->insn_opnumb)
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{
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int ret;
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case 0:
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cmd_len += msp430_nooperands (opcode, addr, insn, comm1, &cycles);
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break;
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case 2:
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cmd_len +=
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ret =
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msp430_doubleoperand (info, opcode, addr, insn, op1, op2,
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comm1, comm2,
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extension_word,
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&cycles);
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if (ret == -1)
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return -1;
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cmd_len += ret;
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if (insn & BYTE_OPERATION)
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{
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if (extension_word != 0 && ((extension_word & BYTE_OPERATION) == 0))
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@ -1235,10 +1306,14 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
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break;
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case 1:
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cmd_len +=
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ret =
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msp430_singleoperand (info, opcode, addr, insn, op1, comm1,
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extension_word,
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&cycles);
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if (ret == -1)
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return -1;
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cmd_len += ret;
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if (extension_word
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&& (strcmp (opcode->name, "swpb") == 0
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|| strcmp (opcode->name, "sxt") == 0))
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