From d9e3625e3784394e084ea08b52ee13178b00bd09 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 31 Aug 2010 21:56:57 +0000 Subject: [PATCH] Fix "pushw imm16" for x86-64 disassembler. gas/testsuite/ 2010-08-31 H.J. Lu PR binutils/11960 * gas/i386/opcode-intel.d: Updated. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/x86-64-opcode.s: Add a "pushw imm16" test. opcodes/ 2010-08-31 H.J. Lu PR binutils/11960 * i386-dis.c (sIv): New. (dis386): Replace Iq with sIv on "pushT". (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT. (x86_64_table): Replace {T|}/{P|} with P. (putop): Add 'w' to 'T'/'P' if needed for Intel syntax. (OP_sI): Update v_mode. Remove w_mode. --- gas/testsuite/ChangeLog | 8 +++ gas/testsuite/gas/i386/opcode-intel.d | 73 +++++++++----------------- gas/testsuite/gas/i386/x86-64-opcode.d | 2 +- gas/testsuite/gas/i386/x86-64-opcode.s | 2 +- opcodes/ChangeLog | 10 ++++ opcodes/i386-dis.c | 68 +++++++++++------------- 6 files changed, 75 insertions(+), 88 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 4c5e0152ae..335da7de2c 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2010-08-31 H.J. Lu + + PR binutils/11960 + * gas/i386/opcode-intel.d: Updated. + * gas/i386/x86-64-opcode.d: Likewise. + + * gas/i386/x86-64-opcode.s: Add a "pushw imm16" test. + 2010-08-25 Jie Zhang * gas/arm/ldst-pc.d: New test. diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d index 9c866d8716..28a07b7910 100644 --- a/gas/testsuite/gas/i386/opcode-intel.d +++ b/gas/testsuite/gas/i386/opcode-intel.d @@ -406,29 +406,22 @@ Disassembly of section .text: *[0-9a-f]+: 66 01 90 90 90 90 90[ ]+add[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 03 90 90 90 90 90[ ]+add[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 05 90 90[ ]+add[ ]+ax,0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 06[ ]+push[ ]+es - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 07[ ]+pop[ ]+es + *[0-9a-f]+: 66 06[ ]+pushw[ ]+es + *[0-9a-f]+: 66 07[ ]+popw[ ]+es *[0-9a-f]+: 66 09 90 90 90 90 90[ ]+or[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 0b 90 90 90 90 90[ ]+or[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 0d 90 90[ ]+or[ ]+ax,0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 0e[ ]+push[ ]+cs + *[0-9a-f]+: 66 0e[ ]+pushw[ ]+cs *[0-9a-f]+: 66 11 90 90 90 90 90[ ]+adc[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 13 90 90 90 90 90[ ]+adc[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 15 90 90[ ]+adc[ ]+ax,0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 16[ ]+push[ ]+ss - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 17[ ]+pop[ ]+ss + *[0-9a-f]+: 66 16[ ]+pushw[ ]+ss + *[0-9a-f]+: 66 17[ ]+popw[ ]+ss *[0-9a-f]+: 66 19 90 90 90 90 90[ ]+sbb[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 1b 90 90 90 90 90[ ]+sbb[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 1d 90 90[ ]+sbb[ ]+ax,0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 1e[ ]+push[ ]+ds - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 1f[ ]+pop[ ]+ds + *[0-9a-f]+: 66 1e[ ]+pushw[ ]+ds + *[0-9a-f]+: 66 1f[ ]+popw[ ]+ds *[0-9a-f]+: 66 21 90 90 90 90 90[ ]+and[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 23 90 90 90 90 90[ ]+and[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 25 90 90[ ]+and[ ]+ax,0x9090 @@ -473,15 +466,12 @@ Disassembly of section .text: *[0-9a-f]+: 66 5d[ ]+pop[ ]+bp *[0-9a-f]+: 66 5e[ ]+pop[ ]+si *[0-9a-f]+: 66 5f[ ]+pop[ ]+di - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 60[ ]+pusha[ ]* - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 61[ ]+popa[ ]* + *[0-9a-f]+: 66 60[ ]+pushaw[ ]* + *[0-9a-f]+: 66 61[ ]+popaw[ ]* *[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\] - *[0-9a-f]+: 66 68 90 90[ ]+push[ ]+0x9090 + *[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+0x9090 *[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 6a 90[ ]+push[ ]+0xffffff90 + *[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+0xffffff90 *[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xffffff90 *[0-9a-f]+: 66 6d[ ]+ins[ ]+WORD PTR es:\[edi\],dx *[0-9a-f]+: 66 6f[ ]+outs[ ]+dx,WORD PTR ds:\[esi\] @@ -504,10 +494,8 @@ Disassembly of section .text: *[0-9a-f]+: 66 98[ ]+cbw[ ]* *[0-9a-f]+: 66 99[ ]+cwd[ ]* *[0-9a-f]+: 66 9a 90 90 90 90[ ]+call[ ]+0x9090:0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 9c[ ]+pushf[ ]* - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 9d[ ]+popf[ ]* + *[0-9a-f]+: 66 9c[ ]+pushfw[ ]* + *[0-9a-f]+: 66 9d[ ]+popfw[ ]* *[0-9a-f]+: 66 a1 90 90 90 90[ ]+mov[ ]+ax,ds:0x90909090 *[0-9a-f]+: 66 a3 90 90 90 90[ ]+mov[ ]+ds:0x90909090,ax *[0-9a-f]+: 66 a5[ ]+movs[ ]+WORD PTR es:\[edi\],(WORD PTR )?ds:\[esi\] @@ -525,28 +513,21 @@ Disassembly of section .text: *[0-9a-f]+: 66 be 90 90[ ]+mov[ ]+si,0x9090 *[0-9a-f]+: 66 bf 90 90[ ]+mov[ ]+di,0x9090 *[0-9a-f]+: 66 c1 90 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],0x90 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: c2 90 90[ ]+ret[ ]+0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: c3[ ]+ret[ ]* + *[0-9a-f]+: 66 c2 90 90[ ]+retw[ ]+0x9090 + *[0-9a-f]+: 66 c3[ ]+retw[ ]* *[0-9a-f]+: 66 c4 90 90 90 90 90[ ]+les[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 c5 90 90 90 90 90[ ]+lds[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 c7 80 90 90 90 90 90 90[ ]+mov[ ]+WORD PTR \[eax-0x6f6f6f70\],0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: c8 90 90 90[ ]+enter[ ]+0x9090,0x90 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: c9[ ]+leave[ ]* - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: ca 90 90[ ]+retf[ ]+0x9090 - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: cb[ ]+retf[ ]* - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: cf[ ]+iret[ ]* + *[0-9a-f]+: 66 c8 90 90 90[ ]+enterw[ ]+0x9090,0x90 + *[0-9a-f]+: 66 c9[ ]+leavew[ ]* + *[0-9a-f]+: 66 ca 90 90[ ]+retfw[ ]+0x9090 + *[0-9a-f]+: 66 cb[ ]+retfw[ ]* + *[0-9a-f]+: 66 cf[ ]+iretw[ ]* *[0-9a-f]+: 66 d1 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],1 *[0-9a-f]+: 66 d3 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],cl *[0-9a-f]+: 66 e5 90[ ]+in[ ]+ax,0x90 *[0-9a-f]+: 66 e7 90[ ]+out[ ]+0x90,ax - *[0-9a-f]+: 66 e8 8f 90[ ]+call[ ]+(0x)?9918.* + *[0-9a-f]+: 66 e8 8f 90[ ]+callw[ ]+(0x)?9918.* *[0-9a-f]+: 66 ea 90 90 90 90[ ]+jmp[ ]+0x9090:0x9090 *[0-9a-f]+: 66 ed[ ]+in[ ]+ax,dx *[0-9a-f]+: 66 ef[ ]+out[ ]+dx,ax @@ -570,17 +551,13 @@ Disassembly of section .text: *[0-9a-f]+: 66 0f 4d 90 90 90 90 90[ ]+cmovge[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 0f 4e 90 90 90 90 90[ ]+cmovle[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] *[0-9a-f]+: 66 0f 4f 90 90 90 90 90[ ]+cmovg[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\] - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 0f a0[ ]+push[ ]+fs - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 0f a1[ ]+pop[ ]+fs + *[0-9a-f]+: 66 0f a0[ ]+pushw[ ]+fs + *[0-9a-f]+: 66 0f a1[ ]+popw[ ]+fs *[0-9a-f]+: 66 0f a3 90 90 90 90 90[ ]+bt[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 0f a4 90 90 90 90 90 90[ ]+shld[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,0x90 *[0-9a-f]+: 66 0f a5 90 90 90 90 90[ ]+shld[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,cl - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 0f a8[ ]+push[ ]+gs - *[0-9a-f]+: 66[ ]+data16 - *[0-9a-f]+: 0f a9[ ]+pop[ ]+gs + *[0-9a-f]+: 66 0f a8[ ]+pushw[ ]+gs + *[0-9a-f]+: 66 0f a9[ ]+popw[ ]+gs *[0-9a-f]+: 66 0f ab 90 90 90 90 90[ ]+bts[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx *[0-9a-f]+: 66 0f ac 90 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,0x90 *[0-9a-f]+: 66 0f ad 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,cl diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d index d16c185874..7c6dd0362c 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.d +++ b/gas/testsuite/gas/i386/x86-64-opcode.d @@ -295,5 +295,5 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 05 syscall [ ]*[a-f0-9]+: 0f 07 sysret [ ]*[a-f0-9]+: 0f 01 f8 swapgs - ... +[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222 #pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s index e9ee87aea0..cb9bbc1185 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.s +++ b/gas/testsuite/gas/i386/x86-64-opcode.s @@ -423,4 +423,4 @@ swapgs # -- -- -- -- 0F 01 f8 - .p2align 4,0 + pushw $0x2222 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 416d7bad3c..f6dae2fd9d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,13 @@ +2010-08-31 H.J. Lu + + PR binutils/11960 + * i386-dis.c (sIv): New. + (dis386): Replace Iq with sIv on "pushT". + (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT. + (x86_64_table): Replace {T|}/{P|} with P. + (putop): Add 'w' to 'T'/'P' if needed for Intel syntax. + (OP_sI): Update v_mode. Remove w_mode. + 2010-08-27 Nathan Froyd * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 2ee8e577a5..f83ac78cfb 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -253,6 +253,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Ib { OP_I, b_mode } #define sIb { OP_sI, b_mode } /* sign extened byte */ #define Iv { OP_I, v_mode } +#define sIv { OP_sI, v_mode } #define Iq { OP_I, q_mode } #define Iv64 { OP_I64, v_mode } #define Iw { OP_I, w_mode } @@ -1773,7 +1774,7 @@ static const struct dis386 dis386[] = { { Bad_Opcode }, /* op size prefix */ { Bad_Opcode }, /* adr size prefix */ /* 68 */ - { "pushT", { Iq } }, + { "pushT", { sIv } }, { "imulS", { Gv, Ev, Iv } }, { "pushT", { sIb } }, { "imulS", { Gv, Ev, sIb } }, @@ -2591,10 +2592,10 @@ static const struct dis386 reg_table[][8] = { { { "incQ", { Ev } }, { "decQ", { Ev } }, - { "callT", { indirEv } }, - { "JcallT", { indirEp } }, - { "jmpT", { indirEv } }, - { "JjmpT", { indirEp } }, + { "call{T|}", { indirEv } }, + { "Jcall{T|}", { indirEp } }, + { "jmp{T|}", { indirEv } }, + { "Jjmp{T|}", { indirEp } }, { "pushU", { stackEv } }, { Bad_Opcode }, }, @@ -5359,37 +5360,37 @@ static const struct dis386 prefix_table[][4] = { static const struct dis386 x86_64_table[][2] = { /* X86_64_06 */ { - { "push{T|}", { es } }, + { "pushP", { es } }, }, /* X86_64_07 */ { - { "pop{T|}", { es } }, + { "popP", { es } }, }, /* X86_64_0D */ { - { "push{T|}", { cs } }, + { "pushP", { cs } }, }, /* X86_64_16 */ { - { "push{T|}", { ss } }, + { "pushP", { ss } }, }, /* X86_64_17 */ { - { "pop{T|}", { ss } }, + { "popP", { ss } }, }, /* X86_64_1E */ { - { "push{T|}", { ds } }, + { "pushP", { ds } }, }, /* X86_64_1F */ { - { "pop{T|}", { ds } }, + { "popP", { ds } }, }, /* X86_64_27 */ @@ -5414,12 +5415,12 @@ static const struct dis386 x86_64_table[][2] = { /* X86_64_60 */ { - { "pusha{P|}", { XX } }, + { "pushaP", { XX } }, }, /* X86_64_61 */ { - { "popa{P|}", { XX } }, + { "popaP", { XX } }, }, /* X86_64_62 */ @@ -12335,9 +12336,9 @@ case_L: used_prefixes |= (prefixes & PREFIX_DATA); break; case 'T': - if (intel_syntax) - break; - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (!intel_syntax + && address_mode == mode_64bit + && (sizeflag & DFLAG)) { *obufp++ = 'q'; break; @@ -12345,7 +12346,16 @@ case_L: /* Fall through. */ case 'P': if (intel_syntax) - break; + { + if ((rex & REX_W) == 0 + && (prefixes & PREFIX_DATA)) + { + if ((sizeflag & DFLAG) == 0) + *obufp++ = 'w'; + used_prefixes |= (prefixes & PREFIX_DATA); + } + break; + } if ((prefixes & PREFIX_DATA) || (rex & REX_W) || (sizeflag & SUFFIX_ALWAYS)) @@ -13623,28 +13633,10 @@ OP_sI (int bytemode, int sizeflag) op -= 0x100; break; case v_mode: - USED_REX (REX_W); - if (rex & REX_W) + if (sizeflag & DFLAG) op = get32s (); else - { - if (sizeflag & DFLAG) - { - op = get32s (); - } - else - { - op = get16 (); - if ((op & 0x8000) != 0) - op -= 0x10000; - } - used_prefixes |= (prefixes & PREFIX_DATA); - } - break; - case w_mode: - op = get16 (); - if ((op & 0x8000) != 0) - op -= 0x10000; + op = get16 (); break; default: oappend (INTERNAL_DISASSEMBLER_ERROR);