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* gas/ppc/vle.d: Pass -a32 to assembler. 

* gas/ppc/vle-reloc.d: Likewise.
	* gas/ppc/vle-simple-1.d: Likewise, also match wider addresses.
	* gas/ppc/vle-simple-2.d: Likewise.
	* gas/ppc/vle-simple-3.d: Likewise.
	* gas/ppc/vle-simple-4.d: Likewise.
	* gas/ppc/vle-simple-5.d: Likewise.
	* gas/ppc/vle-simple-6.d: Likewise.
This commit is contained in:
Alan Modra 2012-05-17 07:03:20 +00:00
parent 2633a79cc0
commit d9fa356624
9 changed files with 43 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
gas/testsuite/ChangeLog
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@ -1,3 +1,14 @@
2012-05-17 Alan Modra <amodra@gmail.com>
* gas/ppc/vle.d: Pass -a32 to assembler.
* gas/ppc/vle-reloc.d: Likewise.
* gas/ppc/vle-simple-1.d: Likewise, also match wider addresses.
* gas/ppc/vle-simple-2.d: Likewise.
* gas/ppc/vle-simple-3.d: Likewise.
* gas/ppc/vle-simple-4.d: Likewise.
* gas/ppc/vle-simple-5.d: Likewise.
* gas/ppc/vle-simple-6.d: Likewise.
2012-05-16 Meador Inge <meadori@codesourcery.com> 2012-05-16 Meador Inge <meadori@codesourcery.com>
* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to * gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to

2
gas/testsuite/gas/ppc/vle-reloc.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE relocations #name: VLE relocations

22
gas/testsuite/gas/ppc/vle-simple-1.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 1 #name: VLE Simplified mnemonics 1
@ -6,34 +6,34 @@
Disassembly of section \.text: Disassembly of section \.text:
00000000 <target0>: 0+0 <target0>:
0: e6 03 se_beq 6 <target3> 0: e6 03 se_beq 6 <target3>
00000002 <target1>: 0+2 <target1>:
2: e1 03 se_ble 8 <target4> 2: e1 03 se_ble 8 <target4>
00000004 <target2>: 0+4 <target2>:
4: e0 00 se_bge 4 <target2> 4: e0 0+0 se_bge 4 <target2>
00000006 <target3>: 0+6 <target3>:
6: e5 fe se_bgt 2 <target1> 6: e5 fe se_bgt 2 <target1>
00000008 <target4>: 0+8 <target4>:
8: e1 ff se_ble 6 <target3> 8: e1 ff se_ble 6 <target3>
a: e4 03 se_blt 10 <target6> a: e4 03 se_blt 10 <target6>
0000000c <target5>: 0+c <target5>:
c: e2 fb se_bne 2 <target1> c: e2 fb se_bne 2 <target1>
e: e1 01 se_ble 10 <target6> e: e1 01 se_ble 10 <target6>
00000010 <target6>: 0+10 <target6>:
10: e0 fc se_bge 8 <target4> 10: e0 fc se_bge 8 <target4>
12: e3 fd se_bns c <target5> 12: e3 fd se_bns c <target5>
00000014 <target8>: 0+14 <target8>:
14: e3 f8 se_bns 4 <target2> 14: e3 f8 se_bns 4 <target2>
16: e7 ff se_bso 14 <target8> 16: e7 ff se_bso 14 <target8>
00000018 <target9>: 0+18 <target9>:
18: e6 fc se_beq 10 <target6> 18: e6 fc se_beq 10 <target6>
1a: e7 ff se_bso 18 <target9> 1a: e7 ff se_bso 18 <target9>

22
gas/testsuite/gas/ppc/vle-simple-2.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 2 #name: VLE Simplified mnemonics 2
@ -6,27 +6,27 @@
Disassembly of section .text: Disassembly of section .text:
00000000 <target0>: 0+0 <target0>:
0: 7a 20 00 0c e_bdnz c <target1> 0: 7a 20 00 0c e_bdnz c <target1>
4: 7a 20 00 09 e_bdnzl c <target1> 4: 7a 20 00 09 e_bdnzl c <target1>
8: 7a 30 00 10 e_bdz 18 <target2> 8: 7a 30 00 10 e_bdz 18 <target2>
0000000c <target1>: 0+c <target1>:
c: 7a 30 ff f5 e_bdzl 0 <target0> c: 7a 30 ff f5 e_bdzl 0 <target0>
10: 7a 12 ff f0 e_beq 0 <target0> 10: 7a 12 ff f0 e_beq 0 <target0>
14: 7a 16 00 8c e_beq cr1,a0 <target8> 14: 7a 16 00 8c e_beq cr1,a0 <target8>
00000018 <target2>: 0+18 <target2>:
18: 7a 12 ff f5 e_beql c <target1> 18: 7a 12 ff f5 e_beql c <target1>
1c: 7a 12 00 4d e_beql 68 <target6> 1c: 7a 12 00 4d e_beql 68 <target6>
20: 7a 01 00 04 e_ble 24 <target3> 20: 7a 01 00 04 e_ble 24 <target3>
00000024 <target3>: 0+24 <target3>:
24: 7a 03 ff dd e_bnsl 0 <target0> 24: 7a 03 ff dd e_bnsl 0 <target0>
28: 7a 04 ff e4 e_bge cr1,c <target1> 28: 7a 04 ff e4 e_bge cr1,c <target1>
2c: 7a 00 00 24 e_bge 50 <target5> 2c: 7a 00 00 24 e_bge 50 <target5>
00000030 <target4>: 0+30 <target4>:
30: 7a 08 ff f5 e_bgel cr2,24 <target3> 30: 7a 08 ff f5 e_bgel cr2,24 <target3>
34: 7a 00 ff fd e_bgel 30 <target4> 34: 7a 00 ff fd e_bgel 30 <target4>
38: 7a 11 ff c8 e_bgt 0 <target0> 38: 7a 11 ff c8 e_bgt 0 <target0>
@ -36,7 +36,7 @@ Disassembly of section .text:
48: 7a 0d 00 08 e_ble cr3,50 <target5> 48: 7a 0d 00 08 e_ble cr3,50 <target5>
4c: 7a 01 00 04 e_ble 50 <target5> 4c: 7a 01 00 04 e_ble 50 <target5>
00000050 <target5>: 0+50 <target5>:
50: 7a 01 ff e1 e_blel 30 <target4> 50: 7a 01 ff e1 e_blel 30 <target4>
54: 7a 01 ff dd e_blel 30 <target4> 54: 7a 01 ff dd e_blel 30 <target4>
58: 7a 14 ff cc e_blt cr1,24 <target3> 58: 7a 14 ff cc e_blt cr1,24 <target3>
@ -44,7 +44,7 @@ Disassembly of section .text:
60: 7a 10 ff a1 e_bltl 0 <target0> 60: 7a 10 ff a1 e_bltl 0 <target0>
64: 7a 14 ff 9d e_bltl cr1,0 <target0> 64: 7a 14 ff 9d e_bltl cr1,0 <target0>
00000068 <target6>: 0+68 <target6>:
68: 7a 02 00 18 e_bne 80 <target7> 68: 7a 02 00 18 e_bne 80 <target7>
6c: 7a 06 ff 94 e_bne cr1,0 <target0> 6c: 7a 06 ff 94 e_bne cr1,0 <target0>
70: 7a 02 ff e1 e_bnel 50 <target5> 70: 7a 02 ff e1 e_bnel 50 <target5>
@ -52,7 +52,7 @@ Disassembly of section .text:
78: 7a 01 00 48 e_ble c0 <target9> 78: 7a 01 00 48 e_ble c0 <target9>
7c: 7a 05 ff b4 e_ble cr1,30 <target4> 7c: 7a 05 ff b4 e_ble cr1,30 <target4>
00000080 <target7>: 0+80 <target7>:
80: 7a 09 ff e9 e_blel cr2,68 <target6> 80: 7a 09 ff e9 e_blel cr2,68 <target6>
84: 7a 01 00 1d e_blel a0 <target8> 84: 7a 01 00 1d e_blel a0 <target8>
88: 7a 04 ff c8 e_bge cr1,50 <target5> 88: 7a 04 ff c8 e_bge cr1,50 <target5>
@ -62,7 +62,7 @@ Disassembly of section .text:
98: 7a 03 ff 80 e_bns 18 <target2> 98: 7a 03 ff 80 e_bns 18 <target2>
9c: 7a 03 ff 7c e_bns 18 <target2> 9c: 7a 03 ff 7c e_bns 18 <target2>
000000a0 <target8>: 0+a0 <target8>:
a0: 7a 0b ff 61 e_bnsl cr2,0 <target0> a0: 7a 0b ff 61 e_bnsl cr2,0 <target0>
a4: 7a 03 ff c5 e_bnsl 68 <target6> a4: 7a 03 ff c5 e_bnsl 68 <target6>
a8: 7a 07 ff 64 e_bns cr1,c <target1> a8: 7a 07 ff 64 e_bns cr1,c <target1>
@ -72,7 +72,7 @@ Disassembly of section .text:
b8: 7a 17 ff 78 e_bso cr1,30 <target4> b8: 7a 17 ff 78 e_bso cr1,30 <target4>
bc: 7a 13 ff 74 e_bso 30 <target4> bc: 7a 13 ff 74 e_bso 30 <target4>
000000c0 <target9>: 0+c0 <target9>:
c0: 7a 13 ff e1 e_bsol a0 <target8> c0: 7a 13 ff e1 e_bsol a0 <target8>
c4: 7a 13 ff dd e_bsol a0 <target8> c4: 7a 13 ff dd e_bsol a0 <target8>
c8: 7a 11 ff b8 e_bgt 80 <target7> c8: 7a 11 ff b8 e_bgt 80 <target7>

4
gas/testsuite/gas/ppc/vle-simple-3.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 3 #name: VLE Simplified mnemonics 3
@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
00000000 <trap>: 0+0 <trap>:
0: 7f e0 00 08 trap 0: 7f e0 00 08 trap
4: 7e 01 10 08 twlt r1,r2 4: 7e 01 10 08 twlt r1,r2
8: 7e 83 20 08 twle r3,r4 8: 7e 83 20 08 twle r3,r4

4
gas/testsuite/gas/ppc/vle-simple-4.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 4 #name: VLE Simplified mnemonics 4
@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
00000000 <subtract>: 0+0 <subtract>:
0: 7c 23 10 50 subf r1,r3,r2 0: 7c 23 10 50 subf r1,r3,r2
4: 7c a3 20 51 subf. r5,r3,r4 4: 7c a3 20 51 subf. r5,r3,r4
8: 7c 21 14 50 subfo r1,r1,r2 8: 7c 21 14 50 subfo r1,r1,r2

4
gas/testsuite/gas/ppc/vle-simple-5.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 5 #name: VLE Simplified mnemonics 5
@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
00000000 <.text>: 0+0 <.text>:
0: 74 42 00 01 e_rlwinm r2,r2,0,0,0 0: 74 42 00 01 e_rlwinm r2,r2,0,0,0
4: 74 62 7d bf e_rlwinm r2,r3,15,22,31 4: 74 62 7d bf e_rlwinm r2,r3,15,22,31
8: 74 a4 f8 48 e_rlwimi r4,r5,31,1,4 8: 74 a4 f8 48 e_rlwimi r4,r5,31,1,4

4
gas/testsuite/gas/ppc/vle-simple-6.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: VLE Simplified mnemonics 6 #name: VLE Simplified mnemonics 6
@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
00000000 <.text>: 0+0 <.text>:
0: 7c b1 9b a6 mtmas1 r5 0: 7c b1 9b a6 mtmas1 r5
4: 7c 3a 0b a6 mtcsrr0 r1 4: 7c 3a 0b a6 mtcsrr0 r1
8: 7c 5b 0b a6 mtcsrr1 r2 8: 7c 5b 0b a6 mtcsrr1 r2

2
gas/testsuite/gas/ppc/vle.d
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@ -1,4 +1,4 @@
#as: -mvle #as: -a32 -mvle
#objdump: -dr -Mvle #objdump: -dr -Mvle
#name: Validate VLE instructions #name: Validate VLE instructions