2002-04-22 Michael Snyder <msnyder@redhat.com>
* arm-tdep.c: Some whitespace and coding standards tweaks.
This commit is contained in:
Michael Snyder
parent
a33f755889
commit
da3c6d4a30
@ -1,3 +1,7 @@
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2002-04-22 Michael Snyder <msnyder@redhat.com>
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* arm-tdep.c: Some whitespace and coding standards tweaks.
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2002-04-22 Jason Thorpe <thorpej@wasabisystems.com>
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* vax-tdep.c: Include regcache.h.
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122
gdb/arm-tdep.c
122
gdb/arm-tdep.c
@ -134,7 +134,8 @@ static const char **valid_flavors;
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/* Disassembly flavor to use. Default to "std" register names. */
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static const char *disassembly_flavor;
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static int current_option; /* Index to that option in the opcodes table. */
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/* Index to that option in the opcodes table. */
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static int current_option;
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/* This is used to keep the bfd arch_info in sync with the disassembly
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flavor. */
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@ -348,13 +349,16 @@ static CORE_ADDR
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thumb_skip_prologue (CORE_ADDR pc, CORE_ADDR func_end)
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{
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CORE_ADDR current_pc;
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int findmask = 0; /* findmask:
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bit 0 - push { rlist }
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bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
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bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
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*/
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/* findmask:
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bit 0 - push { rlist }
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bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
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bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
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*/
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int findmask = 0;
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for (current_pc = pc; current_pc + 2 < func_end && current_pc < pc + 40; current_pc += 2)
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for (current_pc = pc;
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current_pc + 2 < func_end && current_pc < pc + 40;
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current_pc += 2)
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{
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unsigned short insn = read_memory_unsigned_integer (current_pc, 2);
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@ -362,7 +366,8 @@ thumb_skip_prologue (CORE_ADDR pc, CORE_ADDR func_end)
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{
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findmask |= 1; /* push found */
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}
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR sub sp, #simm */
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
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sub sp, #simm */
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{
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if ((findmask & 1) == 0) /* before push ? */
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continue;
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@ -379,18 +384,21 @@ thumb_skip_prologue (CORE_ADDR pc, CORE_ADDR func_end)
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}
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else if (findmask == (4+2+1))
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{
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break; /* We have found one of each type of prologue instruction */
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/* We have found one of each type of prologue instruction */
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break;
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}
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else
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continue; /* something in the prolog that we don't care about or some
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instruction from outside the prolog scheduled here for optimization */
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/* something in the prolog that we don't care about or some
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instruction from outside the prolog scheduled here for
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optimization */
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continue;
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}
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return current_pc;
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}
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/* Advance the PC across any function entry prologue instructions to reach
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some "real" code.
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/* Advance the PC across any function entry prologue instructions to
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reach some "real" code.
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The APCS (ARM Procedure Call Standard) defines the following
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prologue:
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@ -500,8 +508,8 @@ arm_skip_prologue (CORE_ADDR pc)
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The frame size would thus be 36 bytes, and the frame offset would be
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12 bytes. The frame register is R7.
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The comments for thumb_skip_prolog() describe the algorithm we use to detect
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the end of the prolog */
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The comments for thumb_skip_prolog() describe the algorithm we use
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to detect the end of the prolog. */
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/* *INDENT-ON* */
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static void
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@ -510,12 +518,14 @@ thumb_scan_prologue (struct frame_info *fi)
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CORE_ADDR prologue_start;
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CORE_ADDR prologue_end;
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CORE_ADDR current_pc;
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int saved_reg[16]; /* which register has been copied to register n? */
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int findmask = 0; /* findmask:
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bit 0 - push { rlist }
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bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
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bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
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*/
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/* Which register has been copied to register n? */
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int saved_reg[16];
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/* findmask:
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bit 0 - push { rlist }
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bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
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bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
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*/
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int findmask = 0;
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int i;
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if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
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@ -528,8 +538,9 @@ thumb_scan_prologue (struct frame_info *fi)
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prologue_end = sal.end; /* (probably means no prologue) */
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}
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else
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prologue_end = prologue_start + 40; /* We're in the boondocks: allow for */
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/* 16 pushes, an add, and "mv fp,sp" */
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/* We're in the boondocks: allow for
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16 pushes, an add, and "mv fp,sp". */
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prologue_end = prologue_start + 40;
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prologue_end = min (prologue_end, fi->pc);
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@ -568,10 +579,12 @@ thumb_scan_prologue (struct frame_info *fi)
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fi->extra_info->framesize += 4;
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fi->saved_regs[saved_reg[regno]] =
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-(fi->extra_info->framesize);
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saved_reg[regno] = regno; /* reset saved register map */
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/* Reset saved register map. */
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saved_reg[regno] = regno;
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}
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}
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR sub sp, #simm */
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else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
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sub sp, #simm */
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{
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if ((findmask & 1) == 0) /* before push ? */
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continue;
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@ -602,13 +615,15 @@ thumb_scan_prologue (struct frame_info *fi)
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}
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else if ((insn & 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
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{
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int lo_reg = insn & 7; /* dest. register (r0-r7) */
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int lo_reg = insn & 7; /* dest. register (r0-r7) */
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int hi_reg = ((insn >> 3) & 7) + 8; /* source register (r8-15) */
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saved_reg[lo_reg] = hi_reg; /* remember hi reg was saved */
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}
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else
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continue; /* something in the prolog that we don't care about or some
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instruction from outside the prolog scheduled here for optimization */
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/* Something in the prolog that we don't care about or some
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instruction from outside the prolog scheduled here for
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optimization. */
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continue;
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}
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}
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@ -936,7 +951,7 @@ arm_find_callers_reg (struct frame_info *fi, int regnum)
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{
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for (; fi; fi = fi->next)
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
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return generic_read_register_dummy (fi->pc, fi->frame, regnum);
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else
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@ -955,7 +970,7 @@ arm_find_callers_reg (struct frame_info *fi, int regnum)
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static CORE_ADDR
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arm_frame_chain (struct frame_info *fi)
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{
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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CORE_ADDR fn_start, callers_pc, fp;
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/* is this a dummy frame? */
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@ -1053,11 +1068,11 @@ arm_init_extra_frame_info (int fromleaf, struct frame_info *fi)
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memset (fi->saved_regs, '\000', sizeof fi->saved_regs);
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
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{
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/* We need to setup fi->frame here because run_stack_dummy gets it wrong
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by assuming it's always FP. */
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/* We need to setup fi->frame here because run_stack_dummy gets
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it wrong by assuming it's always FP. */
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fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
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ARM_SP_REGNUM);
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fi->extra_info->framesize = 0;
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@ -1067,8 +1082,8 @@ arm_init_extra_frame_info (int fromleaf, struct frame_info *fi)
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else
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#endif
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/* Compute stack pointer for this frame. We use this value for both the
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sigtramp and call dummy cases. */
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/* Compute stack pointer for this frame. We use this value for both
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the sigtramp and call dummy cases. */
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if (!fi->next)
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sp = read_sp();
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else
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@ -1168,7 +1183,7 @@ arm_init_extra_frame_info (int fromleaf, struct frame_info *fi)
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static CORE_ADDR
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arm_frame_saved_pc (struct frame_info *fi)
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{
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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#if 0 /* FIXME: enable this code if we convert to new call dummy scheme. */
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if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
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return generic_read_register_dummy (fi->pc, fi->frame, ARM_PC_REGNUM);
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else
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@ -1456,10 +1471,10 @@ arm_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
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return sp;
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}
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/* Pop the current frame. So long as the frame info has been initialized
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properly (see arm_init_extra_frame_info), this code works for dummy frames
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as well as regular frames. I.e, there's no need to have a special case
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for dummy frames. */
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/* Pop the current frame. So long as the frame info has been
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initialized properly (see arm_init_extra_frame_info), this code
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works for dummy frames as well as regular frames. I.e, there's no
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need to have a special case for dummy frames. */
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static void
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arm_pop_frame (void)
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{
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@ -2022,10 +2037,11 @@ gdb_print_insn_arm (bfd_vma memaddr, disassemble_info *info)
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if (csym.native == NULL)
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{
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/* Create a fake symbol vector containing a Thumb symbol. This is
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solely so that the code in print_insn_little_arm() and
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print_insn_big_arm() in opcodes/arm-dis.c will detect the presence
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of a Thumb symbol and switch to decoding Thumb instructions. */
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/* Create a fake symbol vector containing a Thumb symbol.
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This is solely so that the code in print_insn_little_arm()
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and print_insn_big_arm() in opcodes/arm-dis.c will detect
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the presence of a Thumb symbol and switch to decoding
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Thumb instructions. */
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fake_target.flavour = bfd_target_coff_flavour;
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fake_bfd.xvec = &fake_target;
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@ -2381,10 +2397,10 @@ arm_skip_stub (CORE_ADDR pc)
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return 0; /* not a stub */
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}
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/* If the user changes the register disassembly flavor used for info register
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and other commands, we have to also switch the flavor used in opcodes
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for disassembly output.
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This function is run in the set disassembly_flavor command, and does that. */
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/* If the user changes the register disassembly flavor used for info
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register and other commands, we have to also switch the flavor used
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in opcodes for disassembly output. This function is run in the set
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disassembly_flavor command, and does that. */
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static void
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set_disassembly_flavor_sfunc (char *args, int from_tty,
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@ -2732,12 +2748,12 @@ arm_gdbarch_register_os_abi (enum arm_abi abi,
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(*handler_p)->init_abi = init_abi;
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}
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/* Initialize the current architecture based on INFO. If possible, re-use an
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architecture from ARCHES, which is a list of architectures already created
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during this debugging session.
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/* Initialize the current architecture based on INFO. If possible,
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re-use an architecture from ARCHES, which is a list of
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architectures already created during this debugging session.
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Called e.g. at program startup, when reading a core file, and when reading
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a binary file. */
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Called e.g. at program startup, when reading a core file, and when
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reading a binary file. */
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static struct gdbarch *
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arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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