From dbac4f5ba804fa7f8891696dbf41b0495db7446d Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 6 Aug 2002 22:06:08 +0000 Subject: [PATCH] * config/tc-alpha.c (cpu_types): Enabled ev67, ev68, -m21264a and m21264b processor names and cpu types. * doc/c-alpha.texi: Documented new types. --- gas/ChangeLog | 6 ++++++ gas/config/tc-alpha.c | 10 ++++++++-- gas/doc/c-alpha.texi | 6 +++++- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 88d8bae1f2..4bf98737ce 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2002-08-06 George France + + * config/tc-alpha.c (cpu_types): Enabled ev67, ev68, -m21264a + and m21264b processor names and cpu types. + * doc/c-alpha.texi: Documented new types. + 2002-08-06 Alan Modra * config/tc-ppc.c (md_apply_fix3): Adjust 16 bit XCOFF reloc offset. diff --git a/gas/config/tc-alpha.c b/gas/config/tc-alpha.c index b96eb46513..6ebd154e0c 100644 --- a/gas/config/tc-alpha.c +++ b/gas/config/tc-alpha.c @@ -576,6 +576,10 @@ static const struct cpu_type { |AXP_OPCODE_MAX) }, { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, + { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX + |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, + { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX + |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, { "ev4", AXP_OPCODE_BASE }, { "ev45", AXP_OPCODE_BASE }, @@ -584,6 +588,8 @@ static const struct cpu_type { { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, + { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, + { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, { "all", AXP_OPCODE_BASE }, { 0, 0 } @@ -1102,9 +1108,9 @@ md_show_usage (stream) Alpha options:\n\ -32addr treat addresses as 32-bit values\n\ -F lack floating point instructions support\n\ --mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\ +-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ specify variant of Alpha architecture\n\ --m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\ +-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ these variants include PALcode opcodes\n"), stream); #ifdef OBJ_EVAX diff --git a/gas/doc/c-alpha.texi b/gas/doc/c-alpha.texi index f067668951..5b52c5aebe 100644 --- a/gas/doc/c-alpha.texi +++ b/gas/doc/c-alpha.texi @@ -55,13 +55,17 @@ The following processor names are recognized: @code{21164a}, @code{21164pc}, @code{21264}, +@code{21264a}, +@code{21264b}, @code{ev4}, @code{ev5}, @code{lca45}, @code{ev5}, @code{ev56}, @code{pca56}, -@code{ev6}. +@code{ev6}, +@code{ev67}, +@code{ev68}. The special name @code{all} may be used to allow the assembler to accept instructions valid for any Alpha processor.