x86: tighten assertion in build_modrm_byte()

All VEX3SOURCES cases should have VexW set, and all should have a SIMD
register destination.
This commit is contained in:
Jan Beulich 2018-04-26 08:29:09 +02:00 committed by Jan Beulich
parent 6b8d358865
commit dcd7e32376
2 changed files with 8 additions and 4 deletions

View File

@ -1,3 +1,8 @@
2018-04-26 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Extend assertion in
vex_3_sources handling to cover more cases.
2018-04-26 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Drop code dealing with

View File

@ -6591,10 +6591,9 @@ build_modrm_byte (void)
&& i.tm.opcode_modifier.vexvvvv == VEXXDS
&& (i.tm.opcode_modifier.veximmext
|| (i.imm_operands == 1
&& i.types[0].bitfield.vec_imm4
&& (i.tm.opcode_modifier.vexw == VEXW0
|| i.tm.opcode_modifier.vexw == VEXW1)
&& i.tm.operand_types[dest].bitfield.regsimd)));
&& i.types[0].bitfield.vec_imm4))
&& i.tm.opcode_modifier.vexw
&& i.tm.operand_types[dest].bitfield.regsimd);
if (i.imm_operands == 0)
{