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gas/testsuite/ 

* gas/i386/x86-64-stack.s: Add cases for push segment register.
	* gas/i386/x86-64-stack.d: Updated.
	* gas/i386/x86-64-stack-suffix.d: Updated.
	* gas/i386/x86-64-stack-intel.d: Updated.
	* gas/i386/ilp32/x86-64-stack.d: Updated.
	* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
	* gas/i386/ilp32/x86-64-stack-intel.d: Updated.

opcodes/
	* i386-dis.c (print_insn): Print spaces between multiple excess
	prefixes.  Return actual number of excess prefixes consumed,
	not always one.

	* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
This commit is contained in:
Roland McGrath 2012-08-06 22:08:25 +00:00
parent 99262e37ef
commit de88229846
10 changed files with 93 additions and 6 deletions
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8
gas/testsuite/ChangeLog
View File

@ -41,6 +41,14 @@
2012-08-06 Roland McGrath <mcgrathr@google.com>
* gas/i386/x86-64-stack.s: Add cases for push segment register.
* gas/i386/x86-64-stack.d: Updated.
* gas/i386/x86-64-stack-suffix.d: Updated.
* gas/i386/x86-64-stack-intel.d: Updated.
* gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/i386/ilp32/x86-64-stack-intel.d: Updated.
* gas/i386/x86-64-stack.s: Add cases for push immediate.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.

10
gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d
View File

@ -56,5 +56,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 add eax,DWORD PTR \[rax\+rcx\*2\]
[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W push 0x4030201
[ ]*[a-f0-9]+: 0f a8 push gs
[ ]*[a-f0-9]+: 66 0f a8 pushw gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W push gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W push gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 90 nop
#pass

10
gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d
View File

@ -56,5 +56,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 addl \(%rax,%rcx,2\),%eax
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 66 0f a8 pushw %gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W pushq %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw %gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 90 nop
#pass

10
gas/testsuite/gas/i386/ilp32/x86-64-stack.d
View File

@ -56,5 +56,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 add \(%rax,%rcx,2\),%eax
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 66 0f a8 pushw %gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W pushq %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw %gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 90 nop
#pass

10
gas/testsuite/gas/i386/x86-64-stack-intel.d
View File

@ -56,5 +56,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 add eax,DWORD PTR \[rax\+rcx\*2\]
[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W push 0x4030201
[ ]*[a-f0-9]+: 0f a8 push gs
[ ]*[a-f0-9]+: 66 0f a8 pushw gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W push gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W push gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B push gs
[ ]*[a-f0-9]+: 90 nop
#pass

10
gas/testsuite/gas/i386/x86-64-stack-suffix.d
View File

@ -56,5 +56,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 addl \(%rax,%rcx,2\),%eax
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 66 0f a8 pushw %gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W pushq %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw %gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 90 nop
#pass

10
gas/testsuite/gas/i386/x86-64-stack.d
View File

@ -55,5 +55,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 03 04 48 add \(%rax,%rcx,2\),%eax
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 66 0f a8 pushw %gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W pushq %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data32 rex.W pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw %gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 90 nop
#pass

5
gas/testsuite/gas/i386/x86-64-stack.s
View File

@ -29,6 +29,11 @@ _start:
# push with a 4-byte immediate
try 0x68, 0x01, 0x02, 0x03, 0x04
# push a segment register
try 0x0f, 0xa8
# with extraneous rex.B
try 0x41, 0x0f, 0xa8
# This is just to synchronize the disassembly.
# Any new cases must come before this line!
nop

8
opcodes/ChangeLog
View File

@ -1,3 +1,11 @@
2012-08-06 Roland McGrath <mcgrathr@google.com>
* i386-dis.c (print_insn): Print spaces between multiple excess
prefixes. Return actual number of excess prefixes consumed,
not always one.
* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
2012-08-06 Roland McGrath <mcgrathr@google.com>
Victor Khimenko <khim@google.com>
H.J. Lu <hongjiu.lu@intel.com>

18
opcodes/i386-dis.c
View File

@ -11450,9 +11450,10 @@ print_insn (bfd_vma pc, disassemble_info *info)
for (i = 0;
i < (int) ARRAY_SIZE (all_prefixes) && all_prefixes[i];
i++)
(*info->fprintf_func) (info->stream, "%s",
(*info->fprintf_func) (info->stream, "%s%s",
i == 0 ? "" : " ",
prefix_name (all_prefixes[i], sizeflag));
return 1;
return i;
}
insn_codep = codep;
@ -13471,6 +13472,15 @@ OP_REG (int code, int sizeflag)
{
const char *s;
int add;
switch (code)
{
case es_reg: case ss_reg: case cs_reg:
case ds_reg: case fs_reg: case gs_reg:
oappend (names_seg[code - es_reg]);
return;
}
USED_REX (REX_B);
if (rex & REX_B)
add = 8;
@ -13483,10 +13493,6 @@ OP_REG (int code, int sizeflag)
case sp_reg: case bp_reg: case si_reg: case di_reg:
s = names16[code - ax_reg + add];
break;
case es_reg: case ss_reg: case cs_reg:
case ds_reg: case fs_reg: case gs_reg:
s = names_seg[code - es_reg + add];
break;
case al_reg: case ah_reg: case cl_reg: case ch_reg:
case dl_reg: case dh_reg: case bl_reg: case bh_reg:
USED_REX (0);