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sim/erc32: Corrected wrong CPU implementation and version ID in psr

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Jiri Gaisler 2015-02-19 23:31:20 +01:00 committed by Mike Frysinger
parent 53b5af48f6
commit df9bc4163b
2 changed files with 5 additions and 1 deletions
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4
sim/erc32/ChangeLog
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@ -1,3 +1,7 @@
2015-02-21 Jiri Gaisler <jiri@gaisler.se>
* exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr.
2015-02-21 Jiri Gaisler <jiri@gaisler.se>
* func.c (print_insn_sparc_sis): Add helper function for disassembly.

2
sim/erc32/exec.c
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@ -2011,7 +2011,7 @@ init_regs(sregs)
sregs->npc = 4;
sregs->trap = 0;
sregs->psr &= 0x00f03fdf;
sregs->psr |= 0x080; /* Set supervisor bit */
sregs->psr |= 0x11000080; /* Set supervisor bit */
sregs->breakpoint = 0;
sregs->annul = 0;
sregs->fpstate = FP_EXE_MODE;