[2/2][LD][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in LD.

This patch adds the following relocation support into binutils bfd linker.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

Those relocations includes both ip64 and ilp32 variant.
This commit is contained in:
Renlin Li 2018-03-28 18:06:05 +01:00
parent 84f1b9fb08
commit e04ef02299
53 changed files with 615 additions and 4 deletions

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@ -1,3 +1,20 @@
2018-03-28 Renlin Li <renlin.li@arm.com>
PR ld/22970
* elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Add cases for
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
(elfNN_aarch64_final_link_relocate): Support new relocations.
* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Support new
relocations.
(_bfd_aarch64_elf_resolve_relocation): Support new relocations.
2018-03-28 Renlin Li <renlin.li@arm.com>
PR ld/22970

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@ -201,6 +201,14 @@
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
@ -5830,6 +5838,14 @@ bad_ifunc_reloc:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:

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@ -285,11 +285,18 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
/* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
which computes the (pc-relative) page base. */
12 bits address offset. */
contents = reencode_ldst_pos_imm (contents, addend);
break;
@ -457,6 +464,14 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = value + addend;
break;

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@ -1,3 +1,56 @@
2018-03-23 Renlin Li <renlin.li@arm.com>
PR ld/22970
* testsuite/ld-aarch64/aarch64-elf.exp: Update to run new tests.
* testsuite/ld-aarch64/emit-relocs-552-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-552-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-552.d: New.
* testsuite/ld-aarch64/emit-relocs-552.s: New.
* testsuite/ld-aarch64/emit-relocs-553.d: New.
* testsuite/ld-aarch64/emit-relocs-553.s: New.
* testsuite/ld-aarch64/emit-relocs-554-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-554-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-554.d: New.
* testsuite/ld-aarch64/emit-relocs-554.s: New.
* testsuite/ld-aarch64/emit-relocs-555.d: New.
* testsuite/ld-aarch64/emit-relocs-555.s: New.
* testsuite/ld-aarch64/emit-relocs-556-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-556-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-556.d: New.
* testsuite/ld-aarch64/emit-relocs-556.s: New.
* testsuite/ld-aarch64/emit-relocs-557.d: New.
* testsuite/ld-aarch64/emit-relocs-557.s: New.
* testsuite/ld-aarch64/emit-relocs-558-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-558-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-558.d: New.
* testsuite/ld-aarch64/emit-relocs-558.s: New.
* testsuite/ld-aarch64/emit-relocs-559.d: New.
* testsuite/ld-aarch64/emit-relocs-559.s: New.
* testsuite/ld-aarch64/emit-relocs-112-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-112-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-112.d: New.
* testsuite/ld-aarch64/emit-relocs-112.s: New.
* testsuite/ld-aarch64/emit-relocs-113.d: New.
* testsuite/ld-aarch64/emit-relocs-113.s: New.
* testsuite/ld-aarch64/emit-relocs-114-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-114-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-114.d: New.
* testsuite/ld-aarch64/emit-relocs-114.s: New.
* testsuite/ld-aarch64/emit-relocs-115.d: New.
* testsuite/ld-aarch64/emit-relocs-115.s: New.
* testsuite/ld-aarch64/emit-relocs-116-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-116-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-116.d: New.
* testsuite/ld-aarch64/emit-relocs-116.s: New.
* testsuite/ld-aarch64/emit-relocs-117.d: New.
* testsuite/ld-aarch64/emit-relocs-117.s: New.
* testsuite/ld-aarch64/emit-relocs-118-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-118-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-118.d: New.
* testsuite/ld-aarch64/emit-relocs-118.s: New.
* testsuite/ld-aarch64/emit-relocs-119.d: New.
* testsuite/ld-aarch64/emit-relocs-119.s: New.
2018-03-28 Eric Botcazou <ebotcazou@adacore.com>
PR ld/22972

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@ -99,8 +99,22 @@ run_dump_test "emit-relocs-89"
run_dump_test "emit-relocs-90"
run_dump_test "emit-relocs-90-overflow"
run_dump_test "emit-relocs-92"
run_dump_test_lp64 "emit-relocs-257"
run_dump_test_lp64 "emit-relocs-257-be"
run_dump_test "emit-relocs-112"
run_dump_test "emit-relocs-112-overflow"
run_dump_test "emit-relocs-113"
run_dump_test "emit-relocs-114"
run_dump_test "emit-relocs-114-overflow"
run_dump_test "emit-relocs-115"
run_dump_test "emit-relocs-116"
run_dump_test "emit-relocs-116-overflow"
run_dump_test "emit-relocs-117"
run_dump_test "emit-relocs-118"
run_dump_test "emit-relocs-118-overflow"
run_dump_test "emit-relocs-119"
run_dump_test "emit-relocs-257"
run_dump_test "emit-relocs-257-be"
# 258 is tested in 257
# 259 is tested in 257
run_dump_test_lp64 "emit-relocs-258-dyn-bad"
@ -197,6 +211,18 @@ run_dump_test_lp64 "emit-relocs-536"
run_dump_test_lp64 "emit-relocs-537"
run_dump_test_lp64 "emit-relocs-537-overflow"
run_dump_test_lp64 "emit-relocs-538"
run_dump_test_lp64 "emit-relocs-552"
run_dump_test_lp64 "emit-relocs-552-overflow"
run_dump_test_lp64 "emit-relocs-553"
run_dump_test_lp64 "emit-relocs-554"
run_dump_test_lp64 "emit-relocs-554-overflow"
run_dump_test_lp64 "emit-relocs-555"
run_dump_test_lp64 "emit-relocs-556"
run_dump_test_lp64 "emit-relocs-556-overflow"
run_dump_test_lp64 "emit-relocs-557"
run_dump_test_lp64 "emit-relocs-558"
run_dump_test_lp64 "emit-relocs-558-overflow"
run_dump_test_lp64 "emit-relocs-559"
run_dump_test "reloc-overflow-bad"

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@ -0,0 +1,5 @@
#source: emit-relocs-552-overflow.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12 against symbol `v2' .*

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@ -0,0 +1,11 @@
.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsb x22, [x1, #:tprel_lo12:v2]

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@ -0,0 +1,8 @@
#source: emit-relocs-552.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: 39803115 ldrsb x21, \[x8, #12\]
10000: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12 v2

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@ -0,0 +1,10 @@
.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsb x21, [x8, #:tprel_lo12:v2]

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@ -0,0 +1,10 @@
#source: emit-relocs-553.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: 3980309d ldrsb x29, \[x4, #12\]
10000: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC v2
10004: 398040f2 ldrsb x18, \[x7, #16\]
10004: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC v3

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@ -0,0 +1,17 @@
.global v1
.global v2
.size v2, 4100
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 4100
v3:
.word 0xcafecafe
.text
ldrsb x29, [x4, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsb x18, [x7, #:tprel_lo12_nc:v3]

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@ -0,0 +1,5 @@
#source: emit-relocs-554-overflow.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12 against symbol `v2' .*

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@ -0,0 +1,11 @@
.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsh x2, [x17, #:tprel_lo12:v2]

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@ -0,0 +1,8 @@
#source: emit-relocs-554.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: 798018eb ldrsh x11, \[x7, #12\]
10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12 v2

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@ -0,0 +1,10 @@
.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsh x11, [x7, #:tprel_lo12:v2]

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@ -0,0 +1,10 @@
#source: emit-relocs-555.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: 798019d6 ldrsh x22, \[x14, #12\]
10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v2
10004: 79a72a28 ldrsh x8, \[x17, #5012\]
10004: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v3

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@ -0,0 +1,17 @@
.global v1
.global v2
.size v2, 5000
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 5000
v3:
.word 0xcafecafe
.text
ldrsh x22, [x14, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsh x8, [x17, #:tprel_lo12_nc:v3]

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@ -0,0 +1,5 @@
#source: emit-relocs-556-overflow.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12 against symbol `v2' .*

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@ -0,0 +1,11 @@
.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsw x2, [x17, #:tprel_lo12:v2]

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@ -0,0 +1,8 @@
#source: emit-relocs-556.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: b9800e61 ldrsw x1, \[x19, #12\]
10000: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12 v2

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@ -0,0 +1,10 @@
.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsw x1, [x19, #:tprel_lo12:v2]

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@ -0,0 +1,10 @@
#source: emit-relocs-557.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: b9800dd6 ldrsw x22, \[x14, #12\]
10000: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC v2
10004: b9800e28 ldrsw x8, \[x17, #12\]
10004: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC v3

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@ -0,0 +1,17 @@
.global v1
.global v2
.size v2, 16384
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 16384
v3:
.word 0xcafecafe
.text
ldrsw x22, [x14, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsw x8, [x17, #:tprel_lo12_nc:v3]

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@ -0,0 +1,5 @@
#source: emit-relocs-558-overflow.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12 against symbol `v2' .*

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@ -0,0 +1,11 @@
.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldr x12, [x13, #:tprel_lo12:v2]

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@ -0,0 +1,8 @@
#source: emit-relocs-558.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: f9400920 ldr x0, \[x9, #16\]
10000: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12 v2

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@ -0,0 +1,12 @@
.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
.word 0xdeaddead
v2:
.word 0xcafecafe
.word 0xcafecafe
.text
ldr x0, [x9, #:tprel_lo12:v2]

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@ -0,0 +1,10 @@
#source: emit-relocs-559.s
#as: -mabi=ilp32
#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0 --emit-relocs
#objdump: -dr
#...
00010000 <.text>:
10000: f9400882 ldr x2, \[x4, #16\]
10000: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC v2
10004: f9400a2e ldr x14, \[x17, #16\]
10004: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC v3

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@ -0,0 +1,19 @@
.global v1
.global v2
.size v2, 32768
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
.word 0xdeaddead
v2:
.zero 32768
v3:
.word 0xcafecafe
.word 0xcafecafe
.text
ldr x2, [x4, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldr x14, [x17, #:tprel_lo12_nc:v3]

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@ -0,0 +1,4 @@
#source: emit-relocs-552-overflow.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLE_LDST8_TPREL_LO12 against symbol `v2' .*

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@ -0,0 +1,11 @@
.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsb x22, [x1, #:tprel_lo12:v2]

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@ -0,0 +1,7 @@
#source: emit-relocs-552.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: 39805115 ldrsb x21, \[x8, #20\]
10000: R_AARCH64_TLSLE_LDST8_TPREL_LO12 v2

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@ -0,0 +1,10 @@
.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsb x21, [x8, #:tprel_lo12:v2]

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#source: emit-relocs-553.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: 3980509d ldrsb x29, \[x4, #20\]
10000: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC v2
10004: 398060f2 ldrsb x18, \[x7, #24\]
10004: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC v3

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.global v1
.global v2
.size v2, 4100
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 4100
v3:
.word 0xcafecafe
.text
ldrsb x29, [x4, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsb x18, [x7, #:tprel_lo12_nc:v3]

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#source: emit-relocs-554-overflow.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLE_LDST16_TPREL_LO12 against symbol `v2' .*

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.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsh x2, [x17, #:tprel_lo12:v2]

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#source: emit-relocs-554.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: 798028eb ldrsh x11, \[x7, #20\]
10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12 v2

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.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsh x11, [x7, #:tprel_lo12:v2]

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#source: emit-relocs-555.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: 798029d6 ldrsh x22, \[x14, #20\]
10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v2
10004: 79a73a28 ldrsh x8, \[x17, #5020\]
10004: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v3

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.global v1
.global v2
.size v2, 5000
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 5000
v3:
.word 0xcafecafe
.text
ldrsh x22, [x14, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsh x8, [x17, #:tprel_lo12_nc:v3]

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#source: emit-relocs-556-overflow.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLE_LDST32_TPREL_LO12 against symbol `v2' .*

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.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldrsw x2, [x17, #:tprel_lo12:v2]

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#source: emit-relocs-556.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: b9801661 ldrsw x1, \[x19, #20\]
10000: R_AARCH64_TLSLE_LDST32_TPREL_LO12 v2

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.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.word 0xcafecafe
.text
ldrsw x1, [x19, #:tprel_lo12:v2]

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#source: emit-relocs-557.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: b98015d6 ldrsw x22, \[x14, #20\]
10000: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC v2
10004: b9801628 ldrsw x8, \[x17, #20\]
10004: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC v3

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.global v1
.global v2
.size v2, 16384
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
v2:
.zero 16384
v3:
.word 0xcafecafe
.text
ldrsw x22, [x14, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldrsw x8, [x17, #:tprel_lo12_nc:v3]

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#source: emit-relocs-558-overflow.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLE_LDST64_TPREL_LO12 against symbol `v2' .*

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.global v1
.size v1, 4096
.global v2
.section .tdata,"awT",%progbits
v1:
.zero 4096
v2:
.word 0xcafecafe
.text
ldr x12, [x13, #:tprel_lo12:v2]

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#source: emit-relocs-558.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: f9400d20 ldr x0, \[x9, #24\]
10000: R_AARCH64_TLSLE_LDST64_TPREL_LO12 v2

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.global v1
.global v2
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
.word 0xdeaddead
v2:
.word 0xcafecafe
.word 0xcafecafe
.text
ldr x0, [x9, #:tprel_lo12:v2]

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#source: emit-relocs-559.s
#ld: -T relocs.ld -e0 --emit-relocs
#objdump: -dr
#...
0000000000010000 <.text>:
10000: f9400c82 ldr x2, \[x4, #24\]
10000: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC v2
10004: f9400e2e ldr x14, \[x17, #24\]
10004: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC v3

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.global v1
.global v2
.size v2, 32768
.global v3
.section .tdata,"awT",%progbits
v1:
.word 0xdeaddead
.word 0xdeaddead
v2:
.zero 32768
v3:
.word 0xcafecafe
.word 0xcafecafe
.text
ldr x2, [x4, #:tprel_lo12_nc:v2]
# should not issue overflow error.
ldr x14, [x17, #:tprel_lo12_nc:v3]