sim: bfin: respect the port level on signals to the SIC

The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop.  So use the incoming level
to figure out when to set the int bits and when to clear it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-04-11 05:23:26 +00:00
parent 8aacdaf48d
commit e10d6db33d
2 changed files with 32 additions and 16 deletions

View File

@ -1,3 +1,10 @@
2011-04-11 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (bfin_sic_port_event): New helper function.
(bfin_sic_52x_port_event, bfin_sic_537_port_event,
bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
in the trace output, and call the new bfin_sic_port_event func.
2011-04-11 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_ports): Add p15.

View File

@ -758,6 +758,15 @@ static const struct hw_port_descriptor bfin_sic_52x_ports[] =
{ NULL, 0, 0, 0, },
};
static void
bfin_sic_port_event (struct hw *me, bu32 *isr, bu32 bit, int level)
{
if (level)
*isr |= bit;
else
*isr &= ~bit;
}
static void
bfin_sic_52x_port_event (struct hw *me, int my_port, struct hw *source,
int source_port, int level)
@ -767,14 +776,14 @@ bfin_sic_52x_port_event (struct hw *me, int my_port, struct hw *source,
bu32 pin = DEC_PIN (my_port);
bu32 bit = 1 << pin;
HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
my_port, idx, pin));
HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
level, my_port, idx, pin));
/* SIC only exists to forward interrupts from the system to the CEC. */
switch (idx)
{
case 0: sic->bf52x.isr0 |= bit; break;
case 1: sic->bf52x.isr1 |= bit; break;
case 0: bfin_sic_port_event (me, &sic->bf52x.isr0, bit, level); break;
case 1: bfin_sic_port_event (me, &sic->bf52x.isr1, bit, level); break;
}
/* XXX: Handle SIC wakeup source ?
@ -882,11 +891,11 @@ bfin_sic_537_port_event (struct hw *me, int my_port, struct hw *source,
bu32 pin = DEC_PIN (my_port);
bu32 bit = 1 << pin;
HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
my_port, idx, pin));
HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
level, my_port, idx, pin));
/* SIC only exists to forward interrupts from the system to the CEC. */
sic->bf537.isr |= bit;
bfin_sic_port_event (me, &sic->bf537.isr, bit, level);
/* XXX: Handle SIC wakeup source ?
if (sic->bf537.iwr & bit)
@ -1069,15 +1078,15 @@ bfin_sic_54x_port_event (struct hw *me, int my_port, struct hw *source,
bu32 pin = DEC_PIN (my_port);
bu32 bit = 1 << pin;
HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
my_port, idx, pin));
HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
level, my_port, idx, pin));
/* SIC only exists to forward interrupts from the system to the CEC. */
switch (idx)
{
case 0: sic->bf54x.isr0 |= bit; break;
case 1: sic->bf54x.isr1 |= bit; break;
case 2: sic->bf54x.isr2 |= bit; break;
case 0: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
case 1: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
case 2: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
}
/* XXX: Handle SIC wakeup source ?
@ -1173,14 +1182,14 @@ bfin_sic_561_port_event (struct hw *me, int my_port, struct hw *source,
bu32 pin = DEC_PIN (my_port);
bu32 bit = 1 << pin;
HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
my_port, idx, pin));
HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
level, my_port, idx, pin));
/* SIC only exists to forward interrupts from the system to the CEC. */
switch (idx)
{
case 0: sic->bf561.isr0 |= bit; break;
case 1: sic->bf561.isr1 |= bit; break;
case 0: bfin_sic_port_event (me, &sic->bf561.isr0, bit, level); break;
case 1: bfin_sic_port_event (me, &sic->bf561.isr1, bit, level); break;
}
/* XXX: Handle SIC wakeup source ?