sim: bfin: respect the port level on signals to the SIC
The SIC latches ints from peripherals to the CEC, but the peripherals need to be able to tell the SIC when to stop. So use the incoming level to figure out when to set the int bits and when to clear it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -1,3 +1,10 @@
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2011-04-11 Mike Frysinger <vapier@gentoo.org>
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* dv-bfin_sic.c (bfin_sic_port_event): New helper function.
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(bfin_sic_52x_port_event, bfin_sic_537_port_event,
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bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
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in the trace output, and call the new bfin_sic_port_event func.
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2011-04-11 Mike Frysinger <vapier@gentoo.org>
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* dv-bfin_gpio.c (bfin_gpio_ports): Add p15.
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@ -758,6 +758,15 @@ static const struct hw_port_descriptor bfin_sic_52x_ports[] =
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{ NULL, 0, 0, 0, },
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};
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static void
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bfin_sic_port_event (struct hw *me, bu32 *isr, bu32 bit, int level)
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{
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if (level)
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*isr |= bit;
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else
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*isr &= ~bit;
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}
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static void
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bfin_sic_52x_port_event (struct hw *me, int my_port, struct hw *source,
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int source_port, int level)
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@ -767,14 +776,14 @@ bfin_sic_52x_port_event (struct hw *me, int my_port, struct hw *source,
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bu32 pin = DEC_PIN (my_port);
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bu32 bit = 1 << pin;
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HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
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my_port, idx, pin));
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HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
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level, my_port, idx, pin));
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/* SIC only exists to forward interrupts from the system to the CEC. */
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switch (idx)
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{
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case 0: sic->bf52x.isr0 |= bit; break;
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case 1: sic->bf52x.isr1 |= bit; break;
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case 0: bfin_sic_port_event (me, &sic->bf52x.isr0, bit, level); break;
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case 1: bfin_sic_port_event (me, &sic->bf52x.isr1, bit, level); break;
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}
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/* XXX: Handle SIC wakeup source ?
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@ -882,11 +891,11 @@ bfin_sic_537_port_event (struct hw *me, int my_port, struct hw *source,
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bu32 pin = DEC_PIN (my_port);
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bu32 bit = 1 << pin;
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HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
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my_port, idx, pin));
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HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
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level, my_port, idx, pin));
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/* SIC only exists to forward interrupts from the system to the CEC. */
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sic->bf537.isr |= bit;
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bfin_sic_port_event (me, &sic->bf537.isr, bit, level);
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/* XXX: Handle SIC wakeup source ?
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if (sic->bf537.iwr & bit)
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@ -1069,15 +1078,15 @@ bfin_sic_54x_port_event (struct hw *me, int my_port, struct hw *source,
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bu32 pin = DEC_PIN (my_port);
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bu32 bit = 1 << pin;
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HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
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my_port, idx, pin));
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HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
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level, my_port, idx, pin));
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/* SIC only exists to forward interrupts from the system to the CEC. */
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switch (idx)
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{
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case 0: sic->bf54x.isr0 |= bit; break;
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case 1: sic->bf54x.isr1 |= bit; break;
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case 2: sic->bf54x.isr2 |= bit; break;
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case 0: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
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case 1: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
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case 2: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
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}
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/* XXX: Handle SIC wakeup source ?
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@ -1173,14 +1182,14 @@ bfin_sic_561_port_event (struct hw *me, int my_port, struct hw *source,
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bu32 pin = DEC_PIN (my_port);
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bu32 bit = 1 << pin;
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HW_TRACE ((me, "processing system int from %i (SIC %u pin %u)",
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my_port, idx, pin));
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HW_TRACE ((me, "processing level %i from port %i (SIC %u pin %u)",
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level, my_port, idx, pin));
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/* SIC only exists to forward interrupts from the system to the CEC. */
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switch (idx)
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{
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case 0: sic->bf561.isr0 |= bit; break;
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case 1: sic->bf561.isr1 |= bit; break;
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case 0: bfin_sic_port_event (me, &sic->bf561.isr0, bit, level); break;
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case 1: bfin_sic_port_event (me, &sic->bf561.isr1, bit, level); break;
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}
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/* XXX: Handle SIC wakeup source ?
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