* Fix for PR 16389, brought over from d30v branch.
Thu Jul 30 21:38:43 1998 Frank Ch. Eigler <fche@cygnus.com> * config/tc-d30v.c ({cur,prev}_left_kills_right_p): New variables. (write_2_short): Emit warning if new flag is set. (do_assemble): Set flags if left instruction is one of special "right-instruction-killer" type.
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@ -1,3 +1,17 @@
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Thu Jul 30 21:38:43 1998 Frank Ch. Eigler <fche@cygnus.com>
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* config/tc-d30v.c ({cur,prev}_left_kills_right_p): New variables.
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(write_2_short): Emit warning if new flag is set.
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(do_assemble): Set flags if left instruction is one of special
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"right-instruction-killer" type.
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Tue Jun 28 18:12:28 1998 Stan Cox <scox@cygnus.com>
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* config/tc-sparc.c (md_number_to_chars, cons_fix_new_sparc):
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Always output words in debug_info section as big endian.
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(sparc_target_format): Choose correct bfd target.
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(md_apply_fix3): Rename BFD_RELOC_SPARC_32LE to BFD_RELOC_SPARC_REV32.
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Tue Jul 28 11:01:21 1998 Jeffrey A Law (law@cygnus.com)
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* config/tc-mn10300.c (md_assemble): Fix "errmsg" initialization
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@ -83,6 +83,11 @@ static int prev_mul32_p = 0;
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static int flag_explicitly_parallel = 0;
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static int flag_xp_state = 0;
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/* Whether current and previous left sub-instruction disables
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execution of right sub-instruction. */
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static int cur_left_kills_right_p = 0;
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static int prev_left_kills_right_p = 0;
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/* The known current alignment of the current section. */
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static int d30v_current_align;
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static segT d30v_current_align_seg;
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@ -223,6 +228,16 @@ check_range (num, bits, flags)
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if (bits == 32)
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return 0;
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if (flags & OPERAND_SHIFT)
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{
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/* We know that all shifts are right by three bits.... */
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if (flags & OPERAND_SIGNED)
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num = (unsigned long) (((/*signed*/ long) num) >> 3);
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else
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num >>= 3;
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}
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if (flags & OPERAND_SIGNED)
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{
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max = (1 << (bits - 1))-1;
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@ -770,6 +785,10 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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case EXEC_SEQ: /* sequential */
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if (opcode1->op->unit == IU)
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as_fatal (_("IU instruction may not be in the left container"));
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if (prev_left_kills_right_p)
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as_warn (_("special left instruction `%s' kills instruction "
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"`%s' in right container"),
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opcode1->op->name, opcode2->op->name);
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insn = FM01 | (insn1 << 32) | insn2;
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fx = fx->next;
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break;
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@ -1404,6 +1423,45 @@ do_assemble (str, opcode, shortp, is_parallel)
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}
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}
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/* Propagate left_kills_right status */
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if (insn != -1)
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{
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prev_left_kills_right_p = cur_left_kills_right_p;
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if (opcode->op->flags_set & FLAG_LKR)
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{
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cur_left_kills_right_p = 1;
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if (strcmp (opcode->op->name, "mvtsys") == 0)
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{
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/* Left kills right for only mvtsys only for PSW/PSWH/PSWL/flags target. */
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if ((myops[0].X_op == O_register) &&
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((myops[0].X_add_number == OPERAND_CONTROL) || /* psw */
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(myops[0].X_add_number == OPERAND_CONTROL+MAX_CONTROL_REG+2) || /* pswh */
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(myops[0].X_add_number == OPERAND_CONTROL+MAX_CONTROL_REG+1) || /* pswl */
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(myops[0].X_add_number == OPERAND_FLAG+0) || /* f0 */
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(myops[0].X_add_number == OPERAND_FLAG+1) || /* f1 */
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(myops[0].X_add_number == OPERAND_FLAG+2) || /* f2 */
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(myops[0].X_add_number == OPERAND_FLAG+3) || /* f3 */
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(myops[0].X_add_number == OPERAND_FLAG+4) || /* f4 */
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(myops[0].X_add_number == OPERAND_FLAG+5) || /* f5 */
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(myops[0].X_add_number == OPERAND_FLAG+6) || /* f6 */
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(myops[0].X_add_number == OPERAND_FLAG+7))) /* f7 */
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{
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cur_left_kills_right_p = 1;
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}
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else
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{
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/* Other mvtsys target registers don't kill right instruction. */
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cur_left_kills_right_p = 0;
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}
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} /* mvtsys */
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}
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else
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cur_left_kills_right_p = 0;
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}
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return (insn);
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}
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@ -1859,8 +1917,11 @@ d30v_align (n, pfill, label)
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temporarily when -g is in effect. */
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int switched_seg_p = (d30v_current_align_seg != now_seg);
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if (d30v_current_align >= n && !switched_seg_p)
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return;
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/* Do not assume that if 'd30v_current_align >= n' and
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'! switched_seg_p' that it is safe to avoid performing
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this alignement request. The alignment of the current frag
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can be changed under our feet, for example by a .ascii
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directive in the source code. cf testsuite/gas/d30v/reloc.s */
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d30v_cleanup ();
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