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@ -26,6 +26,8 @@
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#include "linux-nat.h"
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#include "target-descriptions.h"
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#include "auxv.h"
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#include "observer.h"
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#include "gdbthread.h"
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#include "arm-tdep.h"
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#include "arm-linux-tdep.h"
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@ -61,6 +63,11 @@
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#define PTRACE_SETVFPREGS 28
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#endif
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#ifndef PTRACE_GETHBPREGS
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#define PTRACE_GETHBPREGS 29
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#define PTRACE_SETHBPREGS 30
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#endif
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/* These are in <asm/elf.h> in current kernels. */
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#define HWCAP_VFP 64
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#define HWCAP_IWMMXT 512
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@ -739,6 +746,564 @@ arm_linux_read_description (struct target_ops *ops)
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return NULL;
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}
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/* Information describing the hardware breakpoint capabilities. */
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struct arm_linux_hwbp_cap
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{
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gdb_byte arch;
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gdb_byte max_wp_length;
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gdb_byte wp_count;
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gdb_byte bp_count;
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};
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/* Get hold of the Hardware Breakpoint information for the target we are
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attached to. Returns NULL if the kernel doesn't support Hardware
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breakpoints at all, or a pointer to the information structure. */
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static const struct arm_linux_hwbp_cap *
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arm_linux_get_hwbp_cap (void)
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{
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/* The info structure we return. */
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static struct arm_linux_hwbp_cap info;
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/* Is INFO in a good state? -1 means that no attempt has been made to
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initialize INFO; 0 means an attempt has been made, but it failed; 1
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means INFO is in an initialized state. */
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static int available = -1;
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if (available == -1)
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{
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int tid;
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unsigned int val;
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tid = GET_THREAD_ID (inferior_ptid);
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if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
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available = 0;
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else
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{
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info.arch = (gdb_byte)((val >> 24) & 0xff);
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info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
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info.wp_count = (gdb_byte)((val >> 8) & 0xff);
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info.bp_count = (gdb_byte)(val & 0xff);
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available = (info.arch != 0);
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}
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}
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return available == 1 ? &info : NULL;
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}
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/* How many hardware breakpoints are available? */
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static int
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arm_linux_get_hw_breakpoint_count (void)
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{
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const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
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return cap != NULL ? cap->bp_count : 0;
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}
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/* How many hardware watchpoints are available? */
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static int
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arm_linux_get_hw_watchpoint_count (void)
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{
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const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
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return cap != NULL ? cap->wp_count : 0;
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}
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/* Have we got a free break-/watch-point available for use? Returns -1 if
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there is not an appropriate resource available, otherwise returns 1. */
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static int
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arm_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
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{
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if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
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|| type == bp_access_watchpoint || type == bp_watchpoint)
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{
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if (cnt + ot > arm_linux_get_hw_watchpoint_count ())
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return -1;
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}
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else if (type == bp_hardware_breakpoint)
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{
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if (cnt > arm_linux_get_hw_breakpoint_count ())
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return -1;
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}
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else
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gdb_assert (FALSE);
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return 1;
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}
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/* Enum describing the different types of ARM hardware break-/watch-points. */
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typedef enum
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{
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arm_hwbp_break = 0,
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arm_hwbp_load = 1,
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arm_hwbp_store = 2,
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arm_hwbp_access = 3
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} arm_hwbp_type;
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/* Type describing an ARM Hardware Breakpoint Control register value. */
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typedef unsigned int arm_hwbp_control_t;
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/* Structure used to keep track of hardware break-/watch-points. */
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struct arm_linux_hw_breakpoint
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{
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/* Address to break on, or being watched. */
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unsigned int address;
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/* Control register for break-/watch- point. */
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arm_hwbp_control_t control;
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};
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/* Structure containing arrays of the break and watch points which are have
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active in each thread.
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The Linux ptrace interface to hardware break-/watch-points presents the
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values in a vector centred around 0 (which is used fo generic information).
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Positive indicies refer to breakpoint addresses/control registers, negative
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indices to watchpoint addresses/control registers.
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The Linux vector is indexed as follows:
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-((i << 1) + 2): Control register for watchpoint i.
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-((i << 1) + 1): Address register for watchpoint i.
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0: Information register.
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((i << 1) + 1): Address register for breakpoint i.
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((i << 1) + 2): Control register for breakpoint i.
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This structure is used as a per-thread cache of the state stored by the
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kernel, so that we don't need to keep calling into the kernel to find a
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free breakpoint.
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We treat break-/watch-points with their enable bit clear as being deleted.
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*/
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typedef struct arm_linux_thread_points
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{
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/* Thread ID. */
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int tid;
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/* Breakpoints for thread. */
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struct arm_linux_hw_breakpoint *bpts;
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/* Watchpoint for threads. */
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struct arm_linux_hw_breakpoint *wpts;
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} *arm_linux_thread_points_p;
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DEF_VEC_P (arm_linux_thread_points_p);
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/* Vector of hardware breakpoints for each thread. */
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VEC(arm_linux_thread_points_p) *arm_threads = NULL;
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/* Find the list of hardware break-/watch-points for a thread with id TID.
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If no list exists for TID we return NULL if ALLOC_NEW is 0, otherwise we
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create a new list and return that. */
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static struct arm_linux_thread_points *
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arm_linux_find_breakpoints_by_tid (int tid, int alloc_new)
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{
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int i;
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struct arm_linux_thread_points *t;
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for (i = 0; VEC_iterate (arm_linux_thread_points_p, arm_threads, i, t); ++i)
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{
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if (t->tid == tid)
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return t;
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}
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t = NULL;
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if (alloc_new)
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{
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t = xmalloc (sizeof (struct arm_linux_thread_points));
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t->tid = tid;
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t->bpts = xzalloc (arm_linux_get_hw_breakpoint_count ()
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* sizeof (struct arm_linux_hw_breakpoint));
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t->wpts = xzalloc (arm_linux_get_hw_watchpoint_count ()
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* sizeof (struct arm_linux_hw_breakpoint));
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VEC_safe_push (arm_linux_thread_points_p, arm_threads, t);
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}
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return t;
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}
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/* Initialize an ARM hardware break-/watch-point control register value.
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BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
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type of break-/watch-point; ENABLE indicates whether the point is enabled.
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*/
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static arm_hwbp_control_t
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arm_hwbp_control_initialize (unsigned byte_address_select,
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arm_hwbp_type hwbp_type,
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int enable)
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{
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gdb_assert ((byte_address_select & ~0xffU) == 0);
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gdb_assert (hwbp_type != arm_hwbp_break
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|| ((byte_address_select & 0xfU) != 0));
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return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
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}
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/* Does the breakpoint control value CONTROL have the enable bit set? */
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static int
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arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
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{
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return control & 0x1;
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}
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/* Change a breakpoint control word so that it is in the disabled state. */
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static arm_hwbp_control_t
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arm_hwbp_control_disable (arm_hwbp_control_t control)
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{
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return control & ~0x1;
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}
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/* Initialise the hardware breakpoint structure P. The breakpoint will be
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enabled, and will point to the placed address of BP_TGT. */
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static void
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arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
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struct bp_target_info *bp_tgt,
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struct arm_linux_hw_breakpoint *p)
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{
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unsigned mask;
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CORE_ADDR address = bp_tgt->placed_address;
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/* We have to create a mask for the control register which says which bits
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of the word pointed to by address to break on. */
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if (arm_pc_is_thumb (gdbarch, address))
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mask = 0x3 << (address & 2);
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else
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mask = 0xf;
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p->address = (unsigned int) (address & ~3);
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p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
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}
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/* Get the ARM hardware breakpoint type from the RW value we're given when
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asked to set a watchpoint. */
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static arm_hwbp_type
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arm_linux_get_hwbp_type (int rw)
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{
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if (rw == hw_read)
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return arm_hwbp_load;
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else if (rw == hw_write)
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return arm_hwbp_store;
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else
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return arm_hwbp_access;
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}
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/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
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to LEN. The type of watchpoint is given in RW. */
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static void
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arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
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struct arm_linux_hw_breakpoint *p)
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{
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const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
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unsigned mask;
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gdb_assert (cap != NULL);
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gdb_assert (cap->max_wp_length != 0);
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mask = (1 << len) - 1;
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p->address = (unsigned int) addr;
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p->control = arm_hwbp_control_initialize (mask,
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arm_linux_get_hwbp_type (rw), 1);
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}
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/* Are two break-/watch-points equal? */
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static int
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arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
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const struct arm_linux_hw_breakpoint *p2)
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{
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return p1->address == p2->address && p1->control == p2->control;
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}
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/* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
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=1) BPT for thread TID. */
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static void
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arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
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int tid, int watchpoint)
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{
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struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 1);
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gdb_byte count, i;
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struct arm_linux_hw_breakpoint* bpts;
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int dir;
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gdb_assert (t != NULL);
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if (watchpoint)
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{
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count = arm_linux_get_hw_watchpoint_count ();
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bpts = t->wpts;
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dir = -1;
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}
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else
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{
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count = arm_linux_get_hw_breakpoint_count ();
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bpts = t->bpts;
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dir = 1;
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}
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for (i = 0; i < count; ++i)
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if (!arm_hwbp_control_is_enabled (bpts[i].control))
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{
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errno = 0;
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if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 1),
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&bpt->address) < 0)
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perror_with_name (_("Unexpected error setting breakpoint address"));
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if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
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&bpt->control) < 0)
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perror_with_name (_("Unexpected error setting breakpoint"));
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memcpy (bpts + i, bpt, sizeof (struct arm_linux_hw_breakpoint));
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break;
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}
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|
|
|
|
|
|
|
|
gdb_assert (i != count);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
|
|
|
|
|
(WATCHPOINT = 1) BPT for thread TID. */
|
|
|
|
|
static void
|
|
|
|
|
arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
|
|
|
|
|
int tid, int watchpoint)
|
|
|
|
|
{
|
|
|
|
|
struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 0);
|
|
|
|
|
gdb_byte count, i;
|
|
|
|
|
struct arm_linux_hw_breakpoint *bpts;
|
|
|
|
|
int dir;
|
|
|
|
|
|
|
|
|
|
gdb_assert (t != NULL);
|
|
|
|
|
|
|
|
|
|
if (watchpoint)
|
|
|
|
|
{
|
|
|
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
|
|
|
bpts = t->wpts;
|
|
|
|
|
dir = -1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
|
|
|
bpts = t->bpts;
|
|
|
|
|
dir = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < count; ++i)
|
|
|
|
|
if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
|
|
|
|
|
{
|
|
|
|
|
errno = 0;
|
|
|
|
|
bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
|
|
|
|
|
if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
|
|
|
|
|
&bpts[i].control) < 0)
|
|
|
|
|
perror_with_name (_("Unexpected error clearing breakpoint"));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gdb_assert (i != count);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Insert a Hardware breakpoint. */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_insert_hw_breakpoint (struct gdbarch *gdbarch,
|
|
|
|
|
struct bp_target_info *bp_tgt)
|
|
|
|
|
{
|
|
|
|
|
ptid_t ptid;
|
|
|
|
|
struct lwp_info *lp;
|
|
|
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
|
|
|
|
|
|
if (arm_linux_get_hw_breakpoint_count () == 0)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
|
|
|
|
|
ALL_LWPS (lp, ptid)
|
|
|
|
|
arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 0);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Remove a hardware breakpoint. */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_remove_hw_breakpoint (struct gdbarch *gdbarch,
|
|
|
|
|
struct bp_target_info *bp_tgt)
|
|
|
|
|
{
|
|
|
|
|
ptid_t ptid;
|
|
|
|
|
struct lwp_info *lp;
|
|
|
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
|
|
|
|
|
|
if (arm_linux_get_hw_breakpoint_count () == 0)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
|
|
|
|
|
ALL_LWPS (lp, ptid)
|
|
|
|
|
arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 0);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Are we able to use a hardware watchpoint for the LEN bytes starting at
|
|
|
|
|
ADDR? */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
|
|
|
|
|
{
|
|
|
|
|
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
|
|
|
|
|
CORE_ADDR max_wp_length, aligned_addr;
|
|
|
|
|
|
|
|
|
|
/* Can not set watchpoints for zero or negative lengths. */
|
|
|
|
|
if (len <= 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Need to be able to use the ptrace interface. */
|
|
|
|
|
if (cap == NULL || cap->wp_count == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Test that the range [ADDR, ADDR + LEN) fits into the largest address
|
|
|
|
|
range covered by a watchpoint. */
|
|
|
|
|
max_wp_length = (CORE_ADDR)cap->max_wp_length;
|
|
|
|
|
aligned_addr = addr & ~(max_wp_length - 1);
|
|
|
|
|
|
|
|
|
|
if (aligned_addr + max_wp_length < addr + len)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* The current ptrace interface can only handle watchpoints that are a
|
|
|
|
|
power of 2. */
|
|
|
|
|
if ((len & (len - 1)) != 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* All tests passed so we must be able to set a watchpoint. */
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Insert a Hardware breakpoint. */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw,
|
|
|
|
|
struct expression *cond)
|
|
|
|
|
{
|
|
|
|
|
ptid_t ptid;
|
|
|
|
|
struct lwp_info *lp;
|
|
|
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
|
|
|
|
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
|
|
|
|
|
ALL_LWPS (lp, ptid)
|
|
|
|
|
arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 1);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Remove a hardware breakpoint. */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw,
|
|
|
|
|
struct expression *cond)
|
|
|
|
|
{
|
|
|
|
|
ptid_t ptid;
|
|
|
|
|
struct lwp_info *lp;
|
|
|
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
|
|
|
|
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
|
|
|
|
|
ALL_LWPS (lp, ptid)
|
|
|
|
|
arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 1);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* What was the data address the target was stopped on accessing. */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
|
|
|
|
|
{
|
|
|
|
|
struct siginfo *siginfo_p = linux_nat_get_siginfo (inferior_ptid);
|
|
|
|
|
int slot = siginfo_p->si_errno;
|
|
|
|
|
|
|
|
|
|
/* This must be a hardware breakpoint. */
|
|
|
|
|
if (siginfo_p->si_signo != SIGTRAP
|
|
|
|
|
|| (siginfo_p->si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* We must be able to set hardware watchpoints. */
|
|
|
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* If we are in a positive slot then we're looking at a breakpoint and not
|
|
|
|
|
a watchpoint. */
|
|
|
|
|
if (slot >= 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
*addr_p = (CORE_ADDR) (uintptr_t) siginfo_p->si_addr;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Has the target been stopped by hitting a watchpoint? */
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_stopped_by_watchpoint (void)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR addr;
|
|
|
|
|
return arm_linux_stopped_data_address (¤t_target, &addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
arm_linux_watchpoint_addr_within_range (struct target_ops *target,
|
|
|
|
|
CORE_ADDR addr,
|
|
|
|
|
CORE_ADDR start, int length)
|
|
|
|
|
{
|
|
|
|
|
return start <= addr && start + length - 1 >= addr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle thread creation. We need to copy the breakpoints and watchpoints
|
|
|
|
|
in the parent thread to the child thread. */
|
|
|
|
|
static void
|
|
|
|
|
arm_linux_new_thread (ptid_t ptid)
|
|
|
|
|
{
|
|
|
|
|
int tid = TIDGET (ptid);
|
|
|
|
|
const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
|
|
|
|
|
|
|
|
|
|
if (info != NULL)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
struct arm_linux_thread_points *p;
|
|
|
|
|
struct arm_linux_hw_breakpoint *bpts;
|
|
|
|
|
|
|
|
|
|
if (VEC_empty (arm_linux_thread_points_p, arm_threads))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* Get a list of breakpoints from any thread. */
|
|
|
|
|
p = VEC_last (arm_linux_thread_points_p, arm_threads);
|
|
|
|
|
|
|
|
|
|
/* Copy that thread's breakpoints and watchpoints to the new thread. */
|
|
|
|
|
for (i = 0; i < info->bp_count; i++)
|
|
|
|
|
if (arm_hwbp_control_is_enabled (p->bpts[i].control))
|
|
|
|
|
arm_linux_insert_hw_breakpoint1 (p->bpts + i, tid, 0);
|
|
|
|
|
for (i = 0; i < info->wp_count; i++)
|
|
|
|
|
if (arm_hwbp_control_is_enabled (p->wpts[i].control))
|
|
|
|
|
arm_linux_insert_hw_breakpoint1 (p->wpts + i, tid, 1);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle thread exit. Tidy up the memory that has been allocated for the
|
|
|
|
|
thread. */
|
|
|
|
|
static void
|
|
|
|
|
arm_linux_thread_exit (struct thread_info *tp, int silent)
|
|
|
|
|
{
|
|
|
|
|
const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
|
|
|
|
|
|
|
|
|
|
if (info != NULL)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
int tid = TIDGET (tp->ptid);
|
|
|
|
|
struct arm_linux_thread_points *t = NULL, *p;
|
|
|
|
|
|
|
|
|
|
for (i = 0;
|
|
|
|
|
VEC_iterate (arm_linux_thread_points_p, arm_threads, i, p); i++)
|
|
|
|
|
{
|
|
|
|
|
if (p->tid == tid)
|
|
|
|
|
{
|
|
|
|
|
t = p;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (t == NULL)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
VEC_unordered_remove (arm_linux_thread_points_p, arm_threads, i);
|
|
|
|
|
|
|
|
|
|
xfree (t->bpts);
|
|
|
|
|
xfree (t->wpts);
|
|
|
|
|
xfree (t);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void _initialize_arm_linux_nat (void);
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
@ -755,8 +1320,23 @@ _initialize_arm_linux_nat (void)
|
|
|
|
|
t->to_fetch_registers = arm_linux_fetch_inferior_registers;
|
|
|
|
|
t->to_store_registers = arm_linux_store_inferior_registers;
|
|
|
|
|
|
|
|
|
|
/* Add our hardware breakpoint and watchpoint implementation. */
|
|
|
|
|
t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
|
|
|
|
|
t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
|
|
|
|
|
t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
|
|
|
|
|
t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
|
|
|
|
|
t->to_insert_watchpoint = arm_linux_insert_watchpoint;
|
|
|
|
|
t->to_remove_watchpoint = arm_linux_remove_watchpoint;
|
|
|
|
|
t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
|
|
|
|
|
t->to_stopped_data_address = arm_linux_stopped_data_address;
|
|
|
|
|
t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
|
|
|
|
|
|
|
|
|
|
t->to_read_description = arm_linux_read_description;
|
|
|
|
|
|
|
|
|
|
/* Register the target. */
|
|
|
|
|
linux_nat_add_target (t);
|
|
|
|
|
|
|
|
|
|
/* Handle thread creation and exit */
|
|
|
|
|
observer_attach_thread_exit (arm_linux_thread_exit);
|
|
|
|
|
linux_nat_set_new_thread (t, arm_linux_new_thread);
|
|
|
|
|
}
|
|
|
|
|