gas/
* config/tc-mips.c (macro_build): Remove gas_assert from 'o' case. Use a restricted gas_assert for 'i' and 'j'. gas/testsuite/ * gas/mips/elf-rel28.s, gas/mips/elf-rel28-n32.d, gas/mips/elf-rel28-n64.d: New test. * gas/mips/mips.exp: Run it.
This commit is contained in:
parent
361c311554
commit
e391c02431
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@ -1,3 +1,8 @@
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2010-11-13 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (macro_build): Remove gas_assert from 'o' case.
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Use a restricted gas_assert for 'i' and 'j'.
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2010-11-11 Mingming Sun <mingm.sun@gmail.com>
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* config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64.
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@ -3765,20 +3765,16 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
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case 'i':
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case 'j':
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case 'o':
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macro_read_relocs (&args, r);
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gas_assert (*r == BFD_RELOC_GPREL16
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|| *r == BFD_RELOC_MIPS_LITERAL
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|| *r == BFD_RELOC_MIPS_HIGHER
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|| *r == BFD_RELOC_HI16_S
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|| *r == BFD_RELOC_LO16
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|| *r == BFD_RELOC_MIPS_GOT16
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|| *r == BFD_RELOC_MIPS_CALL16
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|| *r == BFD_RELOC_MIPS_GOT_DISP
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|| *r == BFD_RELOC_MIPS_GOT_PAGE
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|| *r == BFD_RELOC_MIPS_GOT_OFST
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|| *r == BFD_RELOC_MIPS_GOT_LO16
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|| *r == BFD_RELOC_MIPS_CALL_LO16);
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|| *r == BFD_RELOC_MIPS_HIGHER
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|| *r == BFD_RELOC_HI16_S
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|| *r == BFD_RELOC_LO16
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|| *r == BFD_RELOC_MIPS_GOT_OFST);
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continue;
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case 'o':
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macro_read_relocs (&args, r);
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continue;
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case 'u':
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@ -9970,6 +9966,9 @@ do_msbd:
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/* Check whether there is only a single bracketed expression
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left. If so, it must be the base register and the
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constant must be zero. */
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offset_reloc[0] = BFD_RELOC_LO16;
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offset_reloc[1] = BFD_RELOC_UNUSED;
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offset_reloc[2] = BFD_RELOC_UNUSED;
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if (*s == '(' && strchr (s + 1, '(') == 0)
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{
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offset_expr.X_op = O_constant;
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@ -1,3 +1,9 @@
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2010-11-13 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/elf-rel28.s, gas/mips/elf-rel28-n32.d,
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gas/mips/elf-rel28-n64.d: New test.
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* gas/mips/mips.exp: Run it.
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2010-11-10 Richard Sandiford <richard.sandiford@linaro.org>
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* gas/arm/plt-1.s, gas/arm/plt-1.d: New test.
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@ -0,0 +1,96 @@
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#source: elf-rel28.s
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#as: -n32
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#objdump: -dr
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#name: MIPS ELF reloc 28 (n32)
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.*: file format .*
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Disassembly of section \.text:
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.* <foo>:
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL_HI16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL_LO16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_DISP bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_PAGE bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_OFST bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_HI16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_LO16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GPREL16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_HIGHEST bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_HIGHER bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_SUB bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_GD bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_LDM bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_HI16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_LO16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_HI16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_LO16 bar
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_GOTTPREL bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL_HI16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL_LO16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT_DISP bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT_PAGE bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT_OFST bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT_HI16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT_LO16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GOT16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_GPREL16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_HIGHEST bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_HIGHER bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_SUB bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_GD bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_LDM bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_HI16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_LO16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_HI16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_LO16 bar
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_TLS_GOTTPREL bar
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...
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@ -0,0 +1,180 @@
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#source: elf-rel28.s
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#as: -64
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#objdump: -dr
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#name: MIPS ELF reloc 28 (n64)
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.*: file format .*
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Disassembly of section \.text:
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.* <foo>:
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_CALL16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_DISP bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_PAGE bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_OFST bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GOT16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_GPREL16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_HIGHEST bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_HIGHER bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_SUB bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_GD bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_LDM bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_DTPREL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_TPREL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: dc840000 ld a0,0\(a0\)
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.*: R_MIPS_TLS_GOTTPREL bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL_HI16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL_LO16 bar
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.*: R_MIPS_NONE \*ABS\*
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
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.*: R_MIPS_CALL16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT_DISP bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT_PAGE bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT_OFST bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT_HI16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT_LO16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GOT16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_GPREL16 bar
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: R_MIPS_NONE \*ABS\*
|
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.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
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.*: R_MIPS_HIGHEST bar
|
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.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_HIGHER bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_SUB bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GD bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_LDM bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_DTPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_HI16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_TPREL_LO16 bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: fc840000 sd a0,0\(a0\)
|
||||
.*: R_MIPS_TLS_GOTTPREL bar
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
.*: R_MIPS_NONE \*ABS\*
|
||||
\.\.\.
|
|
@ -0,0 +1,48 @@
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|||
.ent foo
|
||||
foo:
|
||||
# Many of these do not make conceptual sense, but they should
|
||||
# at least assemble.
|
||||
ld $4,%call_hi(bar)($4)
|
||||
ld $4,%call_lo(bar)($4)
|
||||
ld $4,%call16(bar)($4)
|
||||
ld $4,%got_disp(bar)($4)
|
||||
ld $4,%got_page(bar)($4)
|
||||
ld $4,%got_ofst(bar)($4)
|
||||
ld $4,%got_hi(bar)($4)
|
||||
ld $4,%got_lo(bar)($4)
|
||||
ld $4,%got(bar)($4)
|
||||
ld $4,%gp_rel(bar)($4)
|
||||
ld $4,%half(bar)($4)
|
||||
ld $4,%highest(bar)($4)
|
||||
ld $4,%higher(bar)($4)
|
||||
ld $4,%neg(bar)($4)
|
||||
ld $4,%tlsgd(bar)($4)
|
||||
ld $4,%tlsldm(bar)($4)
|
||||
ld $4,%dtprel_hi(bar)($4)
|
||||
ld $4,%dtprel_lo(bar)($4)
|
||||
ld $4,%tprel_hi(bar)($4)
|
||||
ld $4,%tprel_lo(bar)($4)
|
||||
ld $4,%gottprel(bar)($4)
|
||||
|
||||
sd $4,%call_hi(bar)($4)
|
||||
sd $4,%call_lo(bar)($4)
|
||||
sd $4,%call16(bar)($4)
|
||||
sd $4,%got_disp(bar)($4)
|
||||
sd $4,%got_page(bar)($4)
|
||||
sd $4,%got_ofst(bar)($4)
|
||||
sd $4,%got_hi(bar)($4)
|
||||
sd $4,%got_lo(bar)($4)
|
||||
sd $4,%got(bar)($4)
|
||||
sd $4,%gp_rel(bar)($4)
|
||||
sd $4,%half(bar)($4)
|
||||
sd $4,%highest(bar)($4)
|
||||
sd $4,%higher(bar)($4)
|
||||
sd $4,%neg(bar)($4)
|
||||
sd $4,%tlsgd(bar)($4)
|
||||
sd $4,%tlsldm(bar)($4)
|
||||
sd $4,%dtprel_hi(bar)($4)
|
||||
sd $4,%dtprel_lo(bar)($4)
|
||||
sd $4,%tprel_hi(bar)($4)
|
||||
sd $4,%tprel_lo(bar)($4)
|
||||
sd $4,%gottprel(bar)($4)
|
||||
.end foo
|
|
@ -810,6 +810,11 @@ if { [istarget mips*-*-vxworks*] } {
|
|||
|
||||
run_dump_test_arches "elf-rel27" [mips_arch_list_all]
|
||||
|
||||
if $has_newabi {
|
||||
run_dump_test "elf-rel28-n32"
|
||||
run_dump_test "elf-rel28-n64"
|
||||
}
|
||||
|
||||
if { !$no_mips16 } {
|
||||
run_dump_test "${tmips}mips${el}16-e"
|
||||
run_dump_test "${tmips}mips${el}16-f"
|
||||
|
|
Loading…
Reference in New Issue