2007-05-22 Paul Brook <paul@codesourcery.com>
bunutils/ * objdump.c (find_symbol_for_address): Merge section and target specific filtering code. ld/testsuite/ * ld-arm-mixed-lib.d: Update expected output. * ld-arm/arm-app.d: Ditto. * ld-arm/mixed-app.d: Ditto. * ld-arm/arm-lib-plt32.d: Ditto. * ld-arm/arm-app-abs32.d: Ditto. * ld-arm/mixed-app-v5.d: Ditto. * ld-arm/armthumb-lib.d: Ditto. * ld-arm/arm-lib.d: Ditto. gas/testsuite/ * gas/arm/backslash-at.d: Update expected output.
This commit is contained in:
parent
23776285b7
commit
e39ff52a3b
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@ -1,3 +1,8 @@
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* objdump.c (find_symbol_for_address): Merge section and target
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specific filtering code.
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2007-05-22 Nick Clifton <nickc@redhat.com>
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2007-05-22 Nick Clifton <nickc@redhat.com>
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* doc/binutils.texi: Use @copying around the copyright notice.
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* doc/binutils.texi: Use @copying around the copyright notice.
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@ -687,6 +687,7 @@ find_symbol_for_address (bfd_vma vma,
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bfd *abfd;
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bfd *abfd;
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asection *sec;
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asection *sec;
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unsigned int opb;
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unsigned int opb;
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bfd_boolean want_section;
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if (sorted_symcount < 1)
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if (sorted_symcount < 1)
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return NULL;
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return NULL;
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@ -732,15 +733,19 @@ find_symbol_for_address (bfd_vma vma,
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Note that this may be wrong for some symbol references if the
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Note that this may be wrong for some symbol references if the
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sections have overlapping memory ranges, but in that case there's
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sections have overlapping memory ranges, but in that case there's
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no way to tell what's desired without looking at the relocation
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no way to tell what's desired without looking at the relocation
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table. */
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table.
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if (sorted_syms[thisplace]->section != sec
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&& (aux->require_sec
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Also give the target a chance to reject symbols. */
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want_section = (aux->require_sec
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|| ((abfd->flags & HAS_RELOC) != 0
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|| ((abfd->flags & HAS_RELOC) != 0
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&& vma >= bfd_get_section_vma (abfd, sec)
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&& vma >= bfd_get_section_vma (abfd, sec)
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&& vma < (bfd_get_section_vma (abfd, sec)
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&& vma < (bfd_get_section_vma (abfd, sec)
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+ bfd_section_size (abfd, sec) / opb))))
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+ bfd_section_size (abfd, sec) / opb)));
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if ((sorted_syms[thisplace]->section != sec && want_section)
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|| !info->symbol_is_valid (sorted_syms[thisplace], info))
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{
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{
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long i;
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long i;
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long newplace;
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for (i = thisplace + 1; i < sorted_symcount; i++)
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for (i = thisplace + 1; i < sorted_symcount; i++)
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{
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{
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@ -750,27 +755,36 @@ find_symbol_for_address (bfd_vma vma,
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}
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}
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--i;
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--i;
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newplace = sorted_symcount;
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for (; i >= 0; i--)
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for (; i >= 0; i--)
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{
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{
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if (sorted_syms[i]->section == sec
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if ((sorted_syms[i]->section == sec || !want_section)
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&& (i == 0
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&& info->symbol_is_valid (sorted_syms[i], info))
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|| sorted_syms[i - 1]->section != sec
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|| (bfd_asymbol_value (sorted_syms[i])
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!= bfd_asymbol_value (sorted_syms[i - 1]))))
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{
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{
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thisplace = i;
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if (newplace == sorted_symcount)
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newplace = i;
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if (bfd_asymbol_value (sorted_syms[i])
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!= bfd_asymbol_value (sorted_syms[newplace]))
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break;
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break;
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/* Remember this symbol and keep searching until we reach
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an earlier address. */
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newplace = i;
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}
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}
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}
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}
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if (sorted_syms[thisplace]->section != sec)
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if (newplace != sorted_symcount)
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thisplace = newplace;
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else
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{
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{
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/* We didn't find a good symbol with a smaller value.
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/* We didn't find a good symbol with a smaller value.
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Look for one with a larger value. */
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Look for one with a larger value. */
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for (i = thisplace + 1; i < sorted_symcount; i++)
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for (i = thisplace + 1; i < sorted_symcount; i++)
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{
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{
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if (sorted_syms[i]->section == sec)
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if ((sorted_syms[i]->section == sec || !want_section)
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&& info->symbol_is_valid (sorted_syms[i], info))
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{
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{
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thisplace = i;
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thisplace = i;
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break;
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break;
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@ -778,25 +792,12 @@ find_symbol_for_address (bfd_vma vma,
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}
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}
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}
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}
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if (sorted_syms[thisplace]->section != sec
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if ((sorted_syms[thisplace]->section != sec && want_section)
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&& (aux->require_sec
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|| !info->symbol_is_valid (sorted_syms[thisplace], info))
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|| ((abfd->flags & HAS_RELOC) != 0
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&& vma >= bfd_get_section_vma (abfd, sec)
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&& vma < (bfd_get_section_vma (abfd, sec)
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+ bfd_section_size (abfd, sec)))))
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/* There is no suitable symbol. */
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/* There is no suitable symbol. */
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return NULL;
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return NULL;
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}
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}
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/* Give the target a chance to reject the symbol. */
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while (! info->symbol_is_valid (sorted_syms [thisplace], info))
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{
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++ thisplace;
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if (thisplace >= sorted_symcount
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|| bfd_asymbol_value (sorted_syms [thisplace]) > vma)
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return NULL;
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}
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if (place != NULL)
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if (place != NULL)
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*place = thisplace;
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*place = thisplace;
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@ -1,3 +1,7 @@
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* gas/arm/backslash-at.d: Update expected output.
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2007-05-17 H.J. Lu <hongjiu.lu@intel.com>
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2007-05-17 H.J. Lu <hongjiu.lu@intel.com>
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2003-06-05 Michal Ludvig <mludvig@suse.cz>
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2003-06-05 Michal Ludvig <mludvig@suse.cz>
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@ -4,7 +4,7 @@
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.*: file format .*arm.*
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.*: file format .*arm.*
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Disassembly of section .text:
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Disassembly of section .text:
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00000000 <.text> 615c .short 0x615c
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00000000 <foo-0x2> 615c .short 0x615c
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00000002 <foo> e3a00000 mov r0, #0 ; 0x0
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00000002 <foo> e3a00000 mov r0, #0 ; 0x0
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00000006 <foo\+0x4> e3a00000 mov r0, #0 ; 0x0
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00000006 <foo\+0x4> e3a00000 mov r0, #0 ; 0x0
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0000000a <foo\+0x8> e3a00000 mov r0, #0 ; 0x0
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0000000a <foo\+0x8> e3a00000 mov r0, #0 ; 0x0
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@ -1,3 +1,14 @@
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* ld-arm-mixed-lib.d: Update expected output.
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* ld-arm/arm-app.d: Ditto.
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* ld-arm/mixed-app.d: Ditto.
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* ld-arm/arm-lib-plt32.d: Ditto.
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* ld-arm/arm-app-abs32.d: Ditto.
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* ld-arm/mixed-app-v5.d: Ditto.
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* ld-arm/armthumb-lib.d: Ditto.
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* ld-arm/arm-lib.d: Ditto.
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2007-05-21 Richard Sandiford <richard@codesourcery.com>
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2007-05-21 Richard Sandiford <richard@codesourcery.com>
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* ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s,
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* ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s,
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10>
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.*: e08fe00e add lr, pc, lr
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .* .*
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.*: .* .*
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@ -20,7 +20,7 @@ Disassembly of section .text:
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.* <_start>:
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.* <_start>:
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.*: e1a0c00d mov ip, sp
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14>
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.*: e59f0004 ldr r0, \[pc, #4\] ; .* <_start\+0x14>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e12fff1e bx lr
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.*: .* .*
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.*: .* .*
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10>
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.*: e08fe00e add lr, pc, lr
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: .*
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@ -27,7 +27,7 @@ Disassembly of section .text:
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.* <app_func>:
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.* <app_func>:
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.*: e1a0c00d mov ip, sp
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: ebfffff4 bl .* <.text-0xc>
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.*: ebfffff4 bl .* <_start-0xc>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e12fff1e bx lr
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10>
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.*: e08fe00e add lr, pc, lr
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: .*
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@ -20,7 +20,7 @@ Disassembly of section .text:
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.* <lib_func1>:
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.* <lib_func1>:
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.*: e1a0c00d mov ip, sp
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: ebfffff9 bl .* <\.text-0xc>
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.*: ebfffff9 bl .* <lib_func1-0xc>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e12fff1e bx lr
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10>
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.*: e08fe00e add lr, pc, lr
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: .*
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@ -20,7 +20,7 @@ Disassembly of section .text:
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.* <lib_func1>:
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.* <lib_func1>:
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.*: e1a0c00d mov ip, sp
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: ebfffff9 bl .* <\.text-0xc>
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.*: ebfffff9 bl .* <lib_func1-0xc>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e12fff1e bx lr
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1c>
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.*: e08fe00e add lr, pc, lr
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: .*
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@ -20,7 +20,7 @@ Disassembly of section .text:
|
||||||
.* <lib_func1>:
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.* <lib_func1>:
|
||||||
.*: e1a0c00d mov ip, sp
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.*: e1a0c00d mov ip, sp
|
||||||
.*: e92dd800 push {fp, ip, lr, pc}
|
.*: e92dd800 push {fp, ip, lr, pc}
|
||||||
.*: ebfffff. bl .* <.text-0x..?>
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.*: ebfffff. bl .* <lib_func1-0x..?>
|
||||||
.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e89d6800 ldm sp, {fp, sp, lr}
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||||||
.*: e12fff1e bx lr
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.*: e12fff1e bx lr
|
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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|
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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||||||
|
|
||||||
.* <.plt>:
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.* <.plt>:
|
||||||
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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||||||
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x1c>
|
||||||
.*: e08fe00e add lr, pc, lr
|
.*: e08fe00e add lr, pc, lr
|
||||||
.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: e5bef008 ldr pc, \[lr, #8\]!
|
||||||
.*: .*
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.*: .*
|
||||||
|
@ -48,7 +48,7 @@ Disassembly of section .text:
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||||||
|
|
||||||
.* <app_tfunc>:
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.* <app_tfunc>:
|
||||||
.*: b500 push {lr}
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.*: b500 push {lr}
|
||||||
.*: f7ff efc. blx .* <.text-0x..>
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.*: f7ff efc. blx .* <_start-0x..>
|
||||||
.*: bd00 pop {pc}
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.*: bd00 pop {pc}
|
||||||
.*: 4770 bx lr
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.*: 4770 bx lr
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.*: 46c0 nop \(mov r8, r8\)
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.*: 46c0 nop \(mov r8, r8\)
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@ -8,7 +8,7 @@ Disassembly of section .plt:
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.* <.plt>:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
|
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
|
||||||
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
|
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x2c>
|
||||||
.*: e08fe00e add lr, pc, lr
|
.*: e08fe00e add lr, pc, lr
|
||||||
.*: e5bef008 ldr pc, \[lr, #8\]!
|
.*: e5bef008 ldr pc, \[lr, #8\]!
|
||||||
.*: .*
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.*: .*
|
||||||
|
@ -50,7 +50,7 @@ Disassembly of section .text:
|
||||||
|
|
||||||
.* <app_tfunc>:
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.* <app_tfunc>:
|
||||||
.*: b500 push {lr}
|
.*: b500 push {lr}
|
||||||
.*: f7ff ffc. bl .* <.text-0x..>
|
.*: f7ff ffc. bl .* <_start-0x..>
|
||||||
.*: bd00 pop {pc}
|
.*: bd00 pop {pc}
|
||||||
.*: 4770 bx lr
|
.*: 4770 bx lr
|
||||||
.*: 46c0 nop \(mov r8, r8\)
|
.*: 46c0 nop \(mov r8, r8\)
|
||||||
|
|
|
@ -8,7 +8,7 @@ Disassembly of section .plt:
|
||||||
|
|
||||||
.* <.plt>:
|
.* <.plt>:
|
||||||
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
|
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
|
||||||
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
|
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1c>
|
||||||
.*: e08fe00e add lr, pc, lr
|
.*: e08fe00e add lr, pc, lr
|
||||||
.*: e5bef008 ldr pc, \[lr, #8\]!
|
.*: e5bef008 ldr pc, \[lr, #8\]!
|
||||||
.*: .*
|
.*: .*
|
||||||
|
@ -20,7 +20,7 @@ Disassembly of section .text:
|
||||||
.* <lib_func1>:
|
.* <lib_func1>:
|
||||||
.*: e1a0c00d mov ip, sp
|
.*: e1a0c00d mov ip, sp
|
||||||
.*: e92dd800 push {fp, ip, lr, pc}
|
.*: e92dd800 push {fp, ip, lr, pc}
|
||||||
.*: ebfffff. bl .* <.text-0x..?>
|
.*: ebfffff. bl .* <lib_func1-0x..?>
|
||||||
.*: e89d6800 ldm sp, {fp, sp, lr}
|
.*: e89d6800 ldm sp, {fp, sp, lr}
|
||||||
.*: e12fff1e bx lr
|
.*: e12fff1e bx lr
|
||||||
.*: e1a00000 nop \(mov r0,r0\)
|
.*: e1a00000 nop \(mov r0,r0\)
|
||||||
|
|
Loading…
Reference in New Issue