2008-12-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* ppc-instructions, ppc-spr-table: Add ability to read tbrl and tbru special registers.
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@ -1,3 +1,8 @@
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2008-12-15 Joel Sherrill <joel.sherrill@oarcorp.com>
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* ppc-instructions, ppc-spr-table: Add ability
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to read tbrl and tbru special registers.
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2008-11-18 Joel Sherrill <joel.sherrill@oarcorp.com>
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2008-11-18 Joel Sherrill <joel.sherrill@oarcorp.com>
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* configure: Regenerated.
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* configure: Regenerated.
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@ -3402,6 +3402,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
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case spr_dec:
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case spr_dec:
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*rT = cpu_get_decrementer(processor);
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*rT = cpu_get_decrementer(processor);
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break;
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break;
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case spr_tbrl:
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if (is_64bit_implementation) *rT = TB;
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else *rT = EXTRACTED64(TB, 32, 63);
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break;
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case spr_tbru:
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if (is_64bit_implementation) *rT = EXTRACTED64(TB, 0, 31);
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else *rT = EXTRACTED64(TB, 0, 31);
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break;
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case spr_tbu:
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case spr_tbu:
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case spr_tbl:
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case spr_tbl:
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/* NOTE - these SPR's are not readable. Use mftb[ul] */
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/* NOTE - these SPR's are not readable. Use mftb[ul] */
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@ -32,6 +32,8 @@ SDR1:25:0:0
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SRR0:26:0:0
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SRR0:26:0:0
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SRR1:27:0:0
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SRR1:27:0:0
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VRSAVE:256:0:0
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VRSAVE:256:0:0
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TBRL:268:0:0
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TBRU:269:0:0
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SPRG0:272:0:0
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SPRG0:272:0:0
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SPRG1:273:0:0
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SPRG1:273:0:0
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SPRG2:274:0:0
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SPRG2:274:0:0
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