* alpha-tdep.c: Move sigtramp handling of saved registers from
read_next_frame_reg to alpha_find_saved_regs, handle saved floating point registers. * mips-tdep.c: Move sigtramp handling of saved registers from read_next_frame_reg to mips_find_saved_regs, handle saved floating point registers. * config/mips/tm-irix3.h, config/mips/tm-irix5.h, config/mips/tm-mipsv4.h (SIGFRAME_FPREGSAVE_OFF): Define. * sparc-tdep.c (sparc_pc_adjust): Fix check for `unimp' instruction to handle functions returning structures with large sizes properly.
This commit is contained in:
Peter Schauer
parent
ac72325fa8
commit
e4dbd248df
@ -1,3 +1,37 @@
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Sat Jul 29 01:45:56 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
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* alpha-tdep.c: Move sigtramp handling of saved registers from
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read_next_frame_reg to alpha_find_saved_regs, handle saved
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floating point registers.
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* mips-tdep.c: Move sigtramp handling of saved registers from
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read_next_frame_reg to mips_find_saved_regs, handle saved
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floating point registers.
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* config/mips/tm-irix3.h, config/mips/tm-irix5.h,
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config/mips/tm-mipsv4.h (SIGFRAME_FPREGSAVE_OFF): Define.
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* sparc-tdep.c (sparc_pc_adjust): Fix check for `unimp'
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instruction to handle functions returning structures with
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large sizes properly.
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Fri Jul 28 11:50:17 1995 steve chamberlain <sac@slash.cygnus.com>
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* configure, configure.in (z8k-*-sim): deleted.
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Thu Jul 27 12:49:28 1995 Jeffrey A. Law <law@rtl.cygnus.com>
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* lynx-nat.c (child_wait): Handle threads exiting.
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Thu Jul 27 07:47:50 1995 Michael Meissner <meissner@cygnus.com>
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* rs6000-tdep.c (skip_prologue): Don't assume the update stack
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instruction is the last in the prologue, since xlc stores the lr
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after the stack update. Make sure offset is correct sign for
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large frames.
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(frame_saved_pc): Move test for signal before frameless.
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* config/rs6000/tm-rs6000.h (DEFAULT_LR_SAVE): Define.
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* config/powerpc/tm-ppc-eabi.h (DEFAULT_LR_SAVE): Redefine.
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Thu Jul 27 01:22:08 1995 Jeffrey A. Law <law@rtl.cygnus.com>
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* hppa-tdep.c (hppa_fix_call_dummy): Rewrite code for calling
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@ -149,6 +149,40 @@ alpha_find_saved_regs (frame)
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obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
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memset (frame->saved_regs, 0, sizeof (struct frame_saved_regs));
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/* If it is the frame for __sigtramp, the saved registers are located
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in a sigcontext structure somewhere on the stack. __sigtramp
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passes a pointer to the sigcontext structure on the stack.
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If the stack layout for __sigtramp changes, or if sigcontext offsets
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change, we might have to update this code. */
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#ifndef SIGFRAME_PC_OFF
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#define SIGFRAME_PC_OFF (2 * 8)
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#define SIGFRAME_REGSAVE_OFF (4 * 8)
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
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#endif
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if (frame->signal_handler_caller)
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{
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CORE_ADDR sigcontext_pointer_addr;
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CORE_ADDR sigcontext_addr;
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if (frame->next)
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sigcontext_pointer_addr = frame->next->frame;
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else
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sigcontext_pointer_addr = frame->frame;
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sigcontext_addr = read_memory_integer(sigcontext_pointer_addr, 8);
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for (ireg = 0; ireg < 32; ireg++)
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{
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reg_position = sigcontext_addr + SIGFRAME_REGSAVE_OFF + ireg * 8;
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frame->saved_regs->regs[ireg] = reg_position;
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}
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for (ireg = 0; ireg < 32; ireg++)
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{
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reg_position = sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + ireg * 8;
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frame->saved_regs->regs[FP0_REGNUM + ireg] = reg_position;
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}
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frame->saved_regs->regs[PC_REGNUM] = sigcontext_addr + SIGFRAME_PC_OFF;
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return;
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}
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proc_desc = frame->proc_desc;
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if (proc_desc == NULL)
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/* I'm not sure how/whether this can happen. Normally when we can't
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@ -164,7 +198,7 @@ alpha_find_saved_regs (frame)
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returnreg = PROC_PC_REG (proc_desc);
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/* Note that RA is always saved first, regardless of it's actual
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/* Note that RA is always saved first, regardless of its actual
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register number. */
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if (mask & (1 << returnreg))
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{
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@ -202,30 +236,11 @@ read_next_frame_reg(fi, regno)
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struct frame_info *fi;
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int regno;
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{
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/* If it is the frame for sigtramp we have a pointer to the sigcontext
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on the stack.
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If the stack layout for __sigtramp changes or if sigcontext offsets
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change we might have to update this code. */
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#ifndef SIGFRAME_PC_OFF
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#define SIGFRAME_PC_OFF (2 * 8)
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#define SIGFRAME_REGSAVE_OFF (4 * 8)
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#endif
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for (; fi; fi = fi->next)
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{
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if (fi->signal_handler_caller)
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{
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int offset;
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CORE_ADDR sigcontext_addr = read_memory_integer(fi->frame, 8);
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if (regno == PC_REGNUM)
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offset = SIGFRAME_PC_OFF;
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else if (regno < 32)
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offset = SIGFRAME_REGSAVE_OFF + regno * 8;
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else
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return 0;
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return read_memory_integer(sigcontext_addr + offset, 8);
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}
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else if (regno == SP_REGNUM)
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/* We have to get the saved sp from the sigcontext
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if it is a signal handler frame. */
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if (regno == SP_REGNUM && !fi->signal_handler_caller)
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return fi->frame;
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else
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{
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231
gdb/mips-tdep.c
231
gdb/mips-tdep.c
@ -43,6 +43,12 @@ extern struct obstack frame_cache_obstack;
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static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
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#endif
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static void mips_set_fpu_command PARAMS ((char *, int,
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struct cmd_list_element *));
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static void mips_show_fpu_command PARAMS ((char *, int,
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struct cmd_list_element *));
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void mips_set_processor_type_command PARAMS ((char *, int));
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int mips_set_processor_type PARAMS ((char *));
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@ -62,7 +68,9 @@ char *tmp_mips_processor_type;
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/* Some MIPS boards don't support floating point, so we permit the
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user to turn it off. */
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int mips_fpu = 1;
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enum mips_fpu_type mips_fpu;
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static char *mips_fpu_string;
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/* A set of original names, to be used when restoring back to generic
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registers from a specific set. */
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@ -120,6 +128,23 @@ char *mips_r3081_reg_names[] = {
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"", "", "ehi", "", "", "", "epc", "prid",
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};
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/* Names of LSI 33k registers. */
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char *mips_lsi33k_reg_names[] = {
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"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
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"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
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"epc", "hi", "lo", "sr", "cause","badvaddr",
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"dcic", "bpc", "bda", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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struct {
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char *name;
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char **regnames;
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@ -129,6 +154,7 @@ struct {
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{ "r3051", mips_r3051_reg_names },
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{ "r3071", mips_r3081_reg_names },
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{ "r3081", mips_r3081_reg_names },
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{ "lsi33k", mips_lsi33k_reg_names },
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{ NULL, NULL }
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};
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@ -178,6 +204,39 @@ mips_find_saved_regs (fci)
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obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
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memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
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/* If it is the frame for sigtramp, the saved registers are located
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in a sigcontext structure somewhere on the stack.
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If the stack layout for sigtramp changes we might have to change these
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constants and the companion fixup_sigtramp in mdebugread.c */
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#ifndef SIGFRAME_BASE
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/* To satisfy alignment restrictions, sigcontext is located 4 bytes
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above the sigtramp frame. */
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#define SIGFRAME_BASE 4
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#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
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#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 4 + 3 * 4)
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#endif
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#ifndef SIGFRAME_REG_SIZE
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#define SIGFRAME_REG_SIZE 4
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#endif
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if (fci->signal_handler_caller)
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{
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for (ireg = 0; ireg < 32; ireg++)
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{
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reg_position = fci->frame + SIGFRAME_REGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
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fci->saved_regs->regs[ireg] = reg_position;
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}
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for (ireg = 0; ireg < 32; ireg++)
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{
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reg_position = fci->frame + SIGFRAME_FPREGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
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fci->saved_regs->regs[FP0_REGNUM + ireg] = reg_position;
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}
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fci->saved_regs->regs[PC_REGNUM] = fci->frame + SIGFRAME_PC_OFF;
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return;
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}
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proc_desc = fci->proc_desc;
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if (proc_desc == NULL)
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/* I'm not sure how/whether this can happen. Normally when we can't
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@ -291,32 +350,12 @@ read_next_frame_reg(fi, regno)
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struct frame_info *fi;
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int regno;
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{
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/* If it is the frame for sigtramp we have a complete sigcontext
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somewhere above the frame and we get the saved registers from there.
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If the stack layout for sigtramp changes we might have to change these
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constants and the companion fixup_sigtramp in mdebugread.c */
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#ifndef SIGFRAME_BASE
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/* To satisfy alignment restrictions the sigcontext is located 4 bytes
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above the sigtramp frame. */
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#define SIGFRAME_BASE 4
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#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
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#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
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#endif
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#ifndef SIGFRAME_REG_SIZE
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#define SIGFRAME_REG_SIZE 4
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#endif
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for (; fi; fi = fi->next)
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{
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if (fi->signal_handler_caller)
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{
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int offset;
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if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
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else if (regno < 32) offset = (SIGFRAME_REGSAVE_OFF
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+ regno * SIGFRAME_REG_SIZE);
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else return 0;
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return read_memory_integer(fi->frame + offset, MIPS_REGSIZE);
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}
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else if (regno == SP_REGNUM) return fi->frame;
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/* We have to get the saved sp from the sigcontext
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if it is a signal handler frame. */
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if (regno == SP_REGNUM && !fi->signal_handler_caller)
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return fi->frame;
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else
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{
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if (fi->saved_regs == NULL)
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@ -510,6 +549,11 @@ find_proc_desc (pc, next_frame)
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0, NULL);
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}
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/* If we never found a PDR for this function in symbol reading, then
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examine prologues to find the information. */
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if (sym && ((mips_extra_func_info_t) SYMBOL_VALUE (sym))->pdr.framereg == -1)
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sym = NULL;
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if (sym)
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{
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/* IF this is the topmost frame AND
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@ -681,7 +725,7 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
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int fake_args = 0;
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for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
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value_ptr arg = value_arg_coerce (args[i]);
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value_ptr arg = args[i];
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m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
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/* This entire mips-specific routine is because doubles must be aligned
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* on 8-byte boundaries. It still isn't quite right, because MIPS decided
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@ -761,6 +805,9 @@ mips_push_dummy_frame()
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#define GEN_REG_SAVE_COUNT 22
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#define FLOAT_REG_SAVE_MASK MASK(0,19)
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#define FLOAT_REG_SAVE_COUNT 20
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#define FLOAT_SINGLE_REG_SAVE_MASK \
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((1<<18)|(1<<16)|(1<<14)|(1<<12)|(1<<10)|(1<<8)|(1<<6)|(1<<4)|(1<<2)|(1<<0))
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#define FLOAT_SINGLE_REG_SAVE_COUNT 10
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#define SPECIAL_REG_SAVE_COUNT 4
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/*
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* The registers we must save are all those not preserved across
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@ -784,7 +831,18 @@ mips_push_dummy_frame()
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* (low memory)
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*/
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PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
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PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
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switch (mips_fpu)
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{
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case MIPS_FPU_DOUBLE:
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PROC_FREG_MASK(proc_desc) = FLOAT_REG_SAVE_MASK;
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break;
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case MIPS_FPU_SINGLE:
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PROC_FREG_MASK(proc_desc) = FLOAT_SINGLE_REG_SAVE_MASK;
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break;
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case MIPS_FPU_NONE:
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PROC_FREG_MASK(proc_desc) = 0;
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break;
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}
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PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
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-sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
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PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
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@ -828,14 +886,16 @@ mips_push_dummy_frame()
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write_memory (sp - 8, buffer, REGISTER_RAW_SIZE (HI_REGNUM));
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read_register_gen (LO_REGNUM, buffer);
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write_memory (sp - 12, buffer, REGISTER_RAW_SIZE (LO_REGNUM));
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if (mips_fpu)
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if (mips_fpu != MIPS_FPU_NONE)
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read_register_gen (FCRCS_REGNUM, buffer);
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else
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memset (buffer, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM));
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write_memory (sp - 16, buffer, REGISTER_RAW_SIZE (FCRCS_REGNUM));
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sp -= 4 * (GEN_REG_SAVE_COUNT
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+ (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
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+ SPECIAL_REG_SAVE_COUNT);
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sp -= 4 * (GEN_REG_SAVE_COUNT + SPECIAL_REG_SAVE_COUNT);
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if (mips_fpu == MIPS_FPU_DOUBLE)
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sp -= 4 * FLOAT_REG_SAVE_COUNT;
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else if (mips_fpu == MIPS_FPU_SINGLE)
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sp -= 4 * FLOAT_SINGLE_REG_SAVE_COUNT;
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write_register (SP_REGNUM, sp);
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PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
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PROC_HIGH_ADDR(proc_desc) = sp;
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@ -894,7 +954,7 @@ mips_pop_frame()
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write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
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write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
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if (mips_fpu)
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if (mips_fpu != MIPS_FPU_NONE)
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write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
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}
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}
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@ -903,14 +963,7 @@ static void
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mips_print_register (regnum, all)
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int regnum, all;
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{
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unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
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struct type *our_type =
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init_type (TYPE_CODE_INT,
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/* We will fill in the length for each register. */
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0,
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TYPE_FLAG_UNSIGNED,
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NULL,
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NULL);
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char raw_buffer[MAX_REGISTER_RAW_SIZE];
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/* Get the data in raw format. */
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if (read_relative_register_raw_bytes (regnum, raw_buffer))
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@ -921,7 +974,8 @@ mips_print_register (regnum, all)
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/* If an even floating pointer register, also print as double. */
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if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
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&& !((regnum-FP0_REGNUM) & 1)) {
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&& !((regnum-FP0_REGNUM) & 1))
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{
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char dbuffer[MAX_REGISTER_RAW_SIZE];
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read_relative_register_raw_bytes (regnum, dbuffer);
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@ -1174,7 +1228,11 @@ mips_extract_return_value (valtype, regbuf, valbuf)
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{
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int regnum;
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regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
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regnum = 2;
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if (TYPE_CODE (valtype) == TYPE_CODE_FLT
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&& (mips_fpu == MIPS_FPU_DOUBLE
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|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4)))
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regnum = FP0_REGNUM;
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memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
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#ifdef REGISTER_CONVERT_TO_TYPE
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@ -1192,7 +1250,12 @@ mips_store_return_value (valtype, valbuf)
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int regnum;
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char raw_buffer[MAX_REGISTER_RAW_SIZE];
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regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
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regnum = 2;
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if (TYPE_CODE (valtype) == TYPE_CODE_FLT
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&& (mips_fpu == MIPS_FPU_DOUBLE
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|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4)))
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regnum = FP0_REGNUM;
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memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
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#ifdef REGISTER_CONVERT_FROM_TYPE
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@ -1218,6 +1281,69 @@ in_sigtramp (pc, ignore)
|
||||
return (pc >= sigtramp_address && pc < sigtramp_end);
|
||||
}
|
||||
|
||||
/* Command to set FPU type. mips_fpu_string will have been set to the
|
||||
user's argument. Set mips_fpu based on mips_fpu_string, and then
|
||||
canonicalize mips_fpu_string. */
|
||||
|
||||
/*ARGSUSED*/
|
||||
static void
|
||||
mips_set_fpu_command (args, from_tty, c)
|
||||
char *args;
|
||||
int from_tty;
|
||||
struct cmd_list_element *c;
|
||||
{
|
||||
char *err = NULL;
|
||||
|
||||
if (mips_fpu_string == NULL || *mips_fpu_string == '\0')
|
||||
mips_fpu = MIPS_FPU_DOUBLE;
|
||||
else if (strcasecmp (mips_fpu_string, "double") == 0
|
||||
|| strcasecmp (mips_fpu_string, "on") == 0
|
||||
|| strcasecmp (mips_fpu_string, "1") == 0
|
||||
|| strcasecmp (mips_fpu_string, "yes") == 0)
|
||||
mips_fpu = MIPS_FPU_DOUBLE;
|
||||
else if (strcasecmp (mips_fpu_string, "none") == 0
|
||||
|| strcasecmp (mips_fpu_string, "off") == 0
|
||||
|| strcasecmp (mips_fpu_string, "0") == 0
|
||||
|| strcasecmp (mips_fpu_string, "no") == 0)
|
||||
mips_fpu = MIPS_FPU_NONE;
|
||||
else if (strcasecmp (mips_fpu_string, "single") == 0)
|
||||
mips_fpu = MIPS_FPU_SINGLE;
|
||||
else
|
||||
err = strsave (mips_fpu_string);
|
||||
|
||||
if (mips_fpu_string != NULL)
|
||||
free (mips_fpu_string);
|
||||
|
||||
switch (mips_fpu)
|
||||
{
|
||||
case MIPS_FPU_DOUBLE:
|
||||
mips_fpu_string = strsave ("double");
|
||||
break;
|
||||
case MIPS_FPU_SINGLE:
|
||||
mips_fpu_string = strsave ("single");
|
||||
break;
|
||||
case MIPS_FPU_NONE:
|
||||
mips_fpu_string = strsave ("none");
|
||||
break;
|
||||
}
|
||||
|
||||
if (err != NULL)
|
||||
{
|
||||
struct cleanup *cleanups = make_cleanup (free, err);
|
||||
error ("Unknown FPU type `%s'. Use `double', `none', or `single'.",
|
||||
err);
|
||||
do_cleanups (cleanups);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
mips_show_fpu_command (args, from_tty, c)
|
||||
char *args;
|
||||
int from_tty;
|
||||
struct cmd_list_element *c;
|
||||
{
|
||||
}
|
||||
|
||||
/* Command to set the processor type. */
|
||||
|
||||
void
|
||||
@ -1332,13 +1458,20 @@ _initialize_mips_tdep ()
|
||||
/* Let the user turn off floating point and set the fence post for
|
||||
heuristic_proc_start. */
|
||||
|
||||
add_show_from_set
|
||||
(add_set_cmd ("mipsfpu", class_support, var_boolean,
|
||||
(char *) &mips_fpu,
|
||||
c = add_set_cmd ("mipsfpu", class_support, var_string_noescape,
|
||||
(char *) &mips_fpu_string,
|
||||
"Set use of floating point coprocessor.\n\
|
||||
Turn off to avoid using floating point instructions when calling functions\n\
|
||||
or dealing with return values.", &setlist),
|
||||
&showlist);
|
||||
Set to `none' to avoid using floating point instructions when calling\n\
|
||||
functions or dealing with return values. Set to `single' to use only\n\
|
||||
single precision floating point as on the R4650. Set to `double' for\n\
|
||||
normal floating point support.",
|
||||
&setlist);
|
||||
c->function.sfunc = mips_set_fpu_command;
|
||||
c = add_show_from_set (c, &showlist);
|
||||
c->function.sfunc = mips_show_fpu_command;
|
||||
|
||||
mips_fpu = MIPS_FPU_DOUBLE;
|
||||
mips_fpu_string = strsave ("double");
|
||||
|
||||
c = add_set_cmd ("processor", class_support, var_string_noescape,
|
||||
(char *) &tmp_mips_processor_type,
|
||||
|
||||
@ -1043,7 +1043,7 @@ sparc_pc_adjust(pc)
|
||||
|
||||
err = target_read_memory (pc + 8, buf, sizeof(long));
|
||||
insn = extract_unsigned_integer (buf, 4);
|
||||
if ((err == 0) && (insn & 0xfffffe00) == 0)
|
||||
if ((err == 0) && (insn & 0xffc00000) == 0)
|
||||
return pc+12;
|
||||
else
|
||||
return pc+8;
|
||||
@ -1139,6 +1139,7 @@ prgregset_t *gregsetp;
|
||||
{
|
||||
register int regi;
|
||||
register prgreg_t *regp = (prgreg_t *) gregsetp;
|
||||
static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0};
|
||||
|
||||
/* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
|
||||
for (regi = G0_REGNUM ; regi <= I7_REGNUM ; regi++)
|
||||
@ -1151,6 +1152,11 @@ prgregset_t *gregsetp;
|
||||
supply_register (PC_REGNUM, (char *) (regp + R_PC));
|
||||
supply_register (NPC_REGNUM,(char *) (regp + R_nPC));
|
||||
supply_register (Y_REGNUM, (char *) (regp + R_Y));
|
||||
|
||||
/* Fill inaccessible registers with zero. */
|
||||
supply_register (WIM_REGNUM, zerobuf);
|
||||
supply_register (TBR_REGNUM, zerobuf);
|
||||
supply_register (CPS_REGNUM, zerobuf);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
Loading…
Reference in New Issue
Block a user