* sim-main.h: Delete inclusion of ansidecl.h.
* cpu.h: Regenerate. * cpux.h: Regenerate.
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@ -1,3 +1,11 @@
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1999-01-11 Doug Evans <devans@casey.cygnus.com>
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* sim-main.h: Delete inclusion of ansidecl.h.
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* cpu.h: Regenerate.
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start-sanitize-m32rx
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* cpux.h: Regenerate.
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end-sanitize-m32rx
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1999-01-06 Doug Evans <devans@casey.cygnus.com>
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1999-01-06 Doug Evans <devans@casey.cygnus.com>
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* cpu.h: Regenerate.
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* cpu.h: Regenerate.
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@ -118,17 +118,7 @@ typedef struct {
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int empty;
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int empty;
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} MODEL_TEST_DATA;
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} MODEL_TEST_DATA;
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/* The ARGBUF struct. */
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union sem_fields {
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struct argbuf {
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/* These are the baseclass definitions. */
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PCADDR addr;
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const IDESC *idesc;
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char trace_p;
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char profile_p;
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/* cpu specific data follows */
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union sem semantic;
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int written;
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union {
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struct { /* empty format for unspecified field list */
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struct { /* empty format for unspecified field list */
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int empty;
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int empty;
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} fmt_empty;
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} fmt_empty;
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@ -440,29 +430,41 @@ struct argbuf {
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#endif
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#endif
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} cti;
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} cti;
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#if WITH_SCACHE_PBB
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#if WITH_SCACHE_PBB
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/* Writeback handler. */
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/* Writeback handler. */
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struct {
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struct {
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/* Pointer to argbuf entry for insn whose results need writing back. */
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/* Pointer to argbuf entry for insn whose results need writing back. */
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const struct argbuf *abuf;
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const struct argbuf *abuf;
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} write;
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} write;
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/* x-before handler */
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/* x-before handler */
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struct {
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struct {
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/*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
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/*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
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int first_p;
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int first_p;
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} before;
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} before;
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/* x-after handler */
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/* x-after handler */
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struct {
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struct {
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int empty;
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int empty;
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} after;
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} after;
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/* This entry is used to terminate each pbb. */
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/* This entry is used to terminate each pbb. */
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struct {
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struct {
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/* Number of insns in pbb. */
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/* Number of insns in pbb. */
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int insn_count;
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int insn_count;
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/* Next pbb to execute. */
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/* Next pbb to execute. */
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SCACHE *next;
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SCACHE *next;
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} chain;
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} chain;
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#endif
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#endif
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} fields;
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};
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/* The ARGBUF struct. */
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struct argbuf {
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/* These are the baseclass definitions. */
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PCADDR addr;
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const IDESC *idesc;
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char trace_p;
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char profile_p;
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/* cpu specific data follows */
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union sem semantic;
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int written;
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union sem_fields fields;
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};
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};
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/* A cached insn.
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/* A cached insn.
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@ -114,17 +114,7 @@ typedef struct {
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int empty;
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int empty;
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} MODEL_M32RX_DATA;
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} MODEL_M32RX_DATA;
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/* The ARGBUF struct. */
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union sem_fields {
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struct argbuf {
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/* These are the baseclass definitions. */
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PCADDR addr;
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const IDESC *idesc;
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char trace_p;
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char profile_p;
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/* cpu specific data follows */
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union sem semantic;
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int written;
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union {
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struct { /* empty format for unspecified field list */
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struct { /* empty format for unspecified field list */
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int empty;
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int empty;
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} fmt_empty;
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} fmt_empty;
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@ -494,29 +484,41 @@ struct argbuf {
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#endif
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#endif
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} cti;
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} cti;
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#if WITH_SCACHE_PBB
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#if WITH_SCACHE_PBB
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/* Writeback handler. */
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/* Writeback handler. */
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struct {
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struct {
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/* Pointer to argbuf entry for insn whose results need writing back. */
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/* Pointer to argbuf entry for insn whose results need writing back. */
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const struct argbuf *abuf;
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const struct argbuf *abuf;
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} write;
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} write;
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/* x-before handler */
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/* x-before handler */
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struct {
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struct {
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/*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
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/*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
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int first_p;
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int first_p;
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} before;
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} before;
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/* x-after handler */
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/* x-after handler */
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struct {
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struct {
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int empty;
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int empty;
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} after;
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} after;
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/* This entry is used to terminate each pbb. */
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/* This entry is used to terminate each pbb. */
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struct {
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struct {
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/* Number of insns in pbb. */
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/* Number of insns in pbb. */
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int insn_count;
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int insn_count;
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/* Next pbb to execute. */
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/* Next pbb to execute. */
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SCACHE *next;
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SCACHE *next;
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} chain;
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} chain;
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#endif
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#endif
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} fields;
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};
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/* The ARGBUF struct. */
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struct argbuf {
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/* These are the baseclass definitions. */
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PCADDR addr;
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const IDESC *idesc;
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char trace_p;
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char profile_p;
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/* cpu specific data follows */
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union sem semantic;
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int written;
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union sem_fields fields;
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};
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};
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/* A cached insn.
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/* A cached insn.
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