Patches from WRS:
Mon Sep 21 14:39:56 1992 Ian Lance Taylor (ian@cygnus.com) * m68k-pinsn (print_insn_arg, fetch_arg): added support for operands to memory management instructions, from WRS.
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@ -206,6 +206,30 @@ print_insn_arg (d, buffer, p, addr, stream)
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switch (*d)
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{
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case 'c': /* cache identifier */
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{
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static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
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val = fetch_arg (buffer, place, 2);
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fprintf_filtered (stream, cacheFieldName[val]);
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break;
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}
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case 'a': /* address register indirect only. Cf. case '+'. */
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{
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fprintf_filtered (stream,
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"%s@",
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reg_names [fetch_arg (buffer, place, 3) + 8]);
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break;
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}
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case '_': /* 32-bit absolute address for move16. */
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{
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val = NEXTLONG (p);
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fprintf_filtered (stream, "@#");
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print_address (val, stream);
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break;
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}
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case 'C':
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fprintf_filtered (stream, "ccr");
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break;
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@ -222,8 +246,11 @@ print_insn_arg (d, buffer, p, addr, stream)
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{
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static struct { char *name; int value; } names[]
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= {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
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{"tc", 0x003}, {"itt0",0x004}, {"itt1", 0x005},
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{"dtt0",0x006}, {"dtt1",0x007},
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{"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
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{"msp", 0x803}, {"isp", 0x804}};
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{"msp", 0x803}, {"isp", 0x804}, {"mmusr",0x805},
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{"urp", 0x806}, {"srp", 0x807}};
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val = fetch_arg (buffer, place, 12);
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for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
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@ -672,12 +699,18 @@ fetch_arg (buffer, code, bits)
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val >>= 10;
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break;
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case 'e':
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val = (buffer[1] >> 6);
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break;
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default:
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abort ();
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}
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switch (bits)
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{
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case 2:
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return val & 3;
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case 3:
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return val & 7;
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case 4:
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