* mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
MN10x00 processors.
* disassemble (ARCH_mn10x00): Define.
(disassembler): Handle bfd_arch_mn10x00.
* configure.in: Recognize bfd_mn10x00_arch.
* configure: Rebuilt.
Continue stubbing out for Matsushita work.
This commit is contained in:
Jeff Law
parent
072b27ea5e
commit
e7c50ceffd
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@ -1,3 +1,12 @@
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Wed Oct 2 23:28:42 1996 Jeffrey A Law (law@cygnus.com)
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* mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
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MN10x00 processors.
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* disassemble (ARCH_mn10x00): Define.
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(disassembler): Handle bfd_arch_mn10x00.
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* configure.in: Recognize bfd_mn10x00_arch.
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* configure: Rebuilt.
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Tue Oct 1 10:49:11 1996 Ian Lance Taylor <ian@cygnus.com>
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* i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
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@ -1030,6 +1030,7 @@ fi
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echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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# On Suns, sometimes $CPP names a directory.
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if test -n "$CPP" && test -d "$CPP"; then
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@ -1045,13 +1046,13 @@ else
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# On the NeXT, cc -E runs the code through the compiler's parser,
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# not just through cpp.
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cat > conftest.$ac_ext <<EOF
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#line 1049 "configure"
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#line 1050 "configure"
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#include "confdefs.h"
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#include <assert.h>
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Syntax Error
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:1055: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:1056: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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:
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@ -1060,13 +1061,13 @@ else
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rm -rf conftest*
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CPP="${CC-cc} -E -traditional-cpp"
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cat > conftest.$ac_ext <<EOF
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#line 1064 "configure"
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#line 1065 "configure"
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#include "confdefs.h"
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#include <assert.h>
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Syntax Error
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:1070: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:1071: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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:
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@ -1094,12 +1095,12 @@ if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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echo $ac_n "(cached) $ac_c" 1>&6
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else
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cat > conftest.$ac_ext <<EOF
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#line 1098 "configure"
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#line 1099 "configure"
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#include "confdefs.h"
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#include <$ac_hdr>
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EOF
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ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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{ (eval echo configure:1103: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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{ (eval echo configure:1104: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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ac_err=`grep -v '^ *+' conftest.out`
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if test -z "$ac_err"; then
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rm -rf conftest*
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@ -1173,7 +1174,7 @@ if test x${all_targets} = xfalse ; then
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bfd_arm_arch) ta="$ta arm-dis.o" ;;
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bfd_convex_arch) ;;
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# start-sanitize-d10v
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bfd_d10v_arch) ta="$ta d10v-dis.o d10v-opc.o " ;;
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bfd_d10v_arch) ta="$ta d10v-dis.o d10v-opc.o" ;;
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# end-sanitize-d10v
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bfd_h8300_arch) ta="$ta h8300-dis.o" ;;
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bfd_h8500_arch) ta="$ta h8500-dis.o" ;;
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@ -1184,6 +1185,7 @@ if test x${all_targets} = xfalse ; then
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bfd_m68k_arch) ta="$ta m68k-dis.o m68k-opc.o" ;;
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bfd_m88k_arch) ta="$ta m88k-dis.o" ;;
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bfd_mips_arch) ta="$ta mips-dis.o mips-opc.o" ;;
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bfd_mn10x00_arch) ta="$ta mn10x00-dis.o mn10x00-opc.o" ;;
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bfd_ns32k_arch) ta="$ta ns32k-dis.o" ;;
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bfd_powerpc_arch) ta="$ta ppc-dis.o ppc-opc.o" ;;
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bfd_pyramid_arch) ;;
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@ -1192,6 +1194,9 @@ if test x${all_targets} = xfalse ; then
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bfd_sh_arch) ta="$ta sh-dis.o" ;;
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bfd_sparc_arch) ta="$ta sparc-dis.o sparc-opc.o" ;;
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bfd_tahoe_arch) ;;
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# start-sanitize-v850
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bfd_v850_arch) ta="$ta v850-opc.o v850-dis.o" ;;
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# end-sanitize-v850
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bfd_vax_arch) ;;
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bfd_w65_arch) ta="$ta w65-dis.o" ;;
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bfd_we32k_arch) ;;
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@ -1379,6 +1384,7 @@ s%@COMMON_SHLIB@%$COMMON_SHLIB%g
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s%@SHLIB_DEP@%$SHLIB_DEP%g
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s%@BFD_PICLIST@%$BFD_PICLIST%g
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s%@SHLINK@%$SHLINK%g
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s%@INSTALL_SHLIB@%$INSTALL_SHLIB%g
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s%@CPP@%$CPP%g
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s%@archdefs@%$archdefs%g
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s%@BFD_MACHINES@%$BFD_MACHINES%g
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@ -111,6 +111,7 @@ AC_SUBST(COMMON_SHLIB)
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AC_SUBST(SHLIB_DEP)
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AC_SUBST(BFD_PICLIST)
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AC_SUBST(SHLINK)
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AC_SUBST(INSTALL_SHLIB)
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AC_CHECK_HEADERS(string.h strings.h)
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@ -174,6 +175,7 @@ if test x${all_targets} = xfalse ; then
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bfd_m68k_arch) ta="$ta m68k-dis.o m68k-opc.o" ;;
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bfd_m88k_arch) ta="$ta m88k-dis.o" ;;
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bfd_mips_arch) ta="$ta mips-dis.o mips-opc.o" ;;
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bfd_mn10x00_arch) ta="$ta mn10x00-dis.o mn10x00-opc.o" ;;
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bfd_ns32k_arch) ta="$ta ns32k-dis.o" ;;
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bfd_powerpc_arch) ta="$ta ppc-dis.o ppc-opc.o" ;;
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bfd_pyramid_arch) ;;
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@ -182,6 +184,9 @@ if test x${all_targets} = xfalse ; then
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bfd_sh_arch) ta="$ta sh-dis.o" ;;
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bfd_sparc_arch) ta="$ta sparc-dis.o sparc-opc.o" ;;
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bfd_tahoe_arch) ;;
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# start-sanitize-v850
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bfd_v850_arch) ta="$ta v850-opc.o v850-dis.o" ;;
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# end-sanitize-v850
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bfd_vax_arch) ;;
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bfd_w65_arch) ta="$ta w65-dis.o" ;;
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bfd_we32k_arch) ;;
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@ -28,6 +28,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* start-sanitize-d10v */
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#define ARCH_d10v
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/* end-sanitize-d10v */
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/* start-sanitize-v850 */
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#define ARCH_v850
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/* end-sanitize-v850 */
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#define ARCH_h8300
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#define ARCH_h8500
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#define ARCH_hppa
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@ -36,6 +39,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#define ARCH_m68k
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#define ARCH_m88k
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#define ARCH_mips
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#define ARCH_mn10x00
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#define ARCH_ns32k
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#define ARCH_powerpc
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#define ARCH_rs6000
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@ -64,17 +68,7 @@ disassembler (abfd)
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#endif
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#ifdef ARCH_alpha
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case bfd_arch_alpha:
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switch (bfd_get_flavour (abfd))
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{
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case bfd_target_ecoff_flavour:
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case bfd_target_elf_flavour:
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default:
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disassemble = print_insn_alpha_osf;
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break;
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case bfd_target_evax_flavour:
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disassemble = print_insn_alpha_vms;
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break;
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}
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disassemble = print_insn_alpha;
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break;
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#endif
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/* start-sanitize-arc */
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@ -155,6 +149,11 @@ disassembler (abfd)
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disassemble = print_insn_little_mips;
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break;
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#endif
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#ifdef ARCH_mn10x00
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case bfd_arch_mn10x00:
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disassemble = print_insn_mn10x00;
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break;
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#endif
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#ifdef ARCH_powerpc
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case bfd_arch_powerpc:
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if (bfd_big_endian (abfd))
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@ -181,6 +180,13 @@ disassembler (abfd)
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disassemble = print_insn_sparc;
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break;
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#endif
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/* start-sanitize-v850 */
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#ifdef ARCH_v850
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case bfd_arch_v850:
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disassemble = print_insn_v850;
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break;
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#endif
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/* end-sanitize-v850 */
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#ifdef ARCH_w65
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case bfd_arch_w65:
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disassemble = print_insn_w65;
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@ -0,0 +1,34 @@
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/* Disassemble MN10x00 instructions.
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Copyright (C) 1996 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "ansidecl.h"
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#include "opcode/mn10x00.h"
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#include "dis-asm.h"
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static void disassemble PARAMS ((bfd_vma memaddr,
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struct disassemble_info *info,
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unsigned long insn));
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int
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print_insn_mn10x00 (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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}
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@ -0,0 +1,51 @@
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/* Assemble Matsushita MN10x00 instructions.
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Copyright (C) 1996 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "ansidecl.h"
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#include "opcode/mn10x00.h"
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const struct mn10x00_operand mn10x00_operands[] = {
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#define UNUSED 0
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{ 0, 0, 0 },
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} ;
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/* The opcode table.
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The format of the opcode table is:
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NAME OPCODE MASK { OPERANDS }
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NAME is the name of the instruction.
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OPCODE is the instruction opcode.
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MASK is the opcode mask; this is used to tell the disassembler
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which bits in the actual opcode must match OPCODE.
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OPERANDS is the list of operands.
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The disassembler reads the table in order and prints the first
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instruction which matches, so this table is sorted to put more
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specific instructions before more general instructions. It is also
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sorted by major opcode. */
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const struct mn10x00_opcode mn10x00_opcodes[] = {
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{ 0, 0, 0, {0}, } } ;
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const int mn10x00_num_opcodes =
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sizeof (mn10x00_opcodes) / sizeof (mn10x00_opcodes[0]);
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