OpenE2K
/
binutils-gdb
12
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

* v850-opc.c (v850_opcodes): Add null opcode to mark the 

end of the opcode table.
For the simulator
This commit is contained in:
Jeff Law 1996-08-28 21:56:03 +00:00
parent 1049a07218
commit e7dd77751d
2 changed files with 31 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
opcodes/ChangeLog
View File

@ -1,6 +1,24 @@
start-sanitize-v850
Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com)
* v850-opc.c (v850_opcodes): Add null opcode to mark the
end of the opcode table.
end-sanitize-v850
start-sanitize-d10v
Mon Aug 26 13:35:53 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-opc.c (pre_defined_registers): Added register pairs,
"r0-r1", "r2-r3", etc.
end-sanitize-d10v
start-sanitize-v850
Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com)
* v850-opc.c (v850_operands): Make I16 be a signed operand.
Create I16U for an unsigned 16bit mmediate operand.
(v850_opcodes): Use I16U for "ori", "andi" and "xori".
* v850-opc.c (v850_operands): Define EP operand.
(IF4A, IF4B, IF4C, IF4D): Use EP.

18
opcodes/v850-opc.c
View File

@ -42,7 +42,7 @@ const struct v850_operand v850_operands[] = {
/* The IMM16 field in a format 6 insn. */
#define I16 (I5U+1)
{ 16, 16, 0, 0, 0 },
{ 16, 16, 0, 0, V850_OPERAND_SIGNED },
/* The signed DISP7 field in a format 4 insn. */
#define D7S (I16+1)
@ -78,7 +78,11 @@ const struct v850_operand v850_operands[] = {
/* EP Register. */
#define EP (SR1+1)
{ 0, 0, 0, 0, V850_OPERAND_EP }
{ 0, 0, 0, 0, V850_OPERAND_EP },
/* The IMM16 field (unsigned0 in a format 6 insn. */
#define I16U (EP+1)
{ 16, 16, 0, 0, 0},
} ;
@ -103,6 +107,9 @@ const struct v850_operand v850_operands[] = {
/* 3 operand instruction (Format VI) */
#define IF6 {I16, R1, R2}
/* 3 operand instruction (Format VI) */
#define IF6U {I16U, R1, R2}
/* 32-bit load/store instruction (Format VII) */
#define IF7A {D16, R1, R2}
#define IF7B {R2, D16, R1}
@ -172,11 +179,11 @@ const struct v850_opcode v850_opcodes[] = {
/* logical operation instructions */
{ "tst", OP(0x0b), OP_MASK, IF1, 2 },
{ "or", OP(0x08), OP_MASK, IF1, 2 },
{ "ori", OP(0x34), OP_MASK, IF6, 4 },
{ "ori", OP(0x34), OP_MASK, IF6U, 4 },
{ "and", OP(0x0a), OP_MASK, IF1, 2 },
{ "andi", OP(0x36), OP_MASK, IF6, 4 },
{ "andi", OP(0x36), OP_MASK, IF6U, 4 },
{ "xor", OP(0x09), OP_MASK, IF1, 2 },
{ "xori", OP(0x35), OP_MASK, IF6, 4 },
{ "xori", OP(0x35), OP_MASK, IF6U, 4 },
{ "not", OP(0x01), OP_MASK, IF1, 2 },
{ "sar", OP(0x15), OP_MASK, {I5U, R2}, 2 },
{ "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2}, 4 },
@ -230,6 +237,7 @@ const struct v850_opcode v850_opcodes[] = {
{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), {R2,SR1}, 4 },
{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), {SR1,R2}, 4 },
{ "nop", one(0x00), one(0xff), {0}, 2 },
{ 0, 0, 0, {0}, 0 },
} ;