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x86: drop CpuVREX 

It is fully redundant with CpuAVX512F.
This commit is contained in:
Jan Beulich 2018-07-31 10:52:37 +02:00 committed by Jan Beulich
parent ef6ba1ed0d
commit e951d5ca3d
7 changed files with 4361 additions and 4352 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2018-07-31 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (parse_real_register): Use cpuavx512f instead
of cpuvrex.
2018-07-30 Jan Beulich <jbeulich@suse.com> 2018-07-30 Jan Beulich <jbeulich@suse.com>
PR gas/23465 PR gas/23465

2
gas/config/tc-i386.c
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@ -10376,7 +10376,7 @@ parse_real_register (char *reg_string, char **end_op)
mode, and require EVEX encoding. */ mode, and require EVEX encoding. */
if (r->reg_flags & RegVRex) if (r->reg_flags & RegVRex)
{ {
if (!cpu_arch_flags.bitfield.cpuvrex if (!cpu_arch_flags.bitfield.cpuavx512f
|| flag_code != CODE_64BIT) || flag_code != CODE_64BIT)
return (const reg_entry *) NULL; return (const reg_entry *) NULL;

8
opcodes/ChangeLog
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@ -1,3 +1,11 @@
2018-07-31 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (cpu_flag_init): Drop CpuVREX uses.
(cpu_flags): Drop CpuVREX.
* i386-opc.h (CpuVREX): Delete.
(union i386_cpu_flags): Remove cpuvrex.
* i386-init.h, i386-tbl.h: Re-generate.
2018-07-30 Jim Wilson <jimw@sifive.com> 2018-07-30 Jim Wilson <jimw@sifive.com>
* riscv-dis.c (riscv_disassemble_insn): Set insn_type and data_size * riscv-dis.c (riscv_disassemble_insn): Set insn_type and data_size

5
opcodes/i386-gen.c
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@ -198,7 +198,7 @@ static initializer cpu_flag_init[] =
{ "CPU_AVX2_FLAGS", { "CPU_AVX2_FLAGS",
"CPU_AVX_FLAGS|CpuAVX2" }, "CPU_AVX_FLAGS|CpuAVX2" },
{ "CPU_AVX512F_FLAGS", { "CPU_AVX512F_FLAGS",
"CPU_AVX2_FLAGS|CpuVREX|CpuAVX512F" }, "CPU_AVX2_FLAGS|CpuAVX512F" },
{ "CPU_AVX512CD_FLAGS", { "CPU_AVX512CD_FLAGS",
"CPU_AVX512F_FLAGS|CpuAVX512CD" }, "CPU_AVX512F_FLAGS|CpuAVX512CD" },
{ "CPU_AVX512ER_FLAGS", { "CPU_AVX512ER_FLAGS",
@ -316,7 +316,7 @@ static initializer cpu_flag_init[] =
{ "CPU_ANY_AVX2_FLAGS", { "CPU_ANY_AVX2_FLAGS",
"CpuAVX2" }, "CpuAVX2" },
{ "CPU_ANY_AVX512F_FLAGS", { "CPU_ANY_AVX512F_FLAGS",
"CpuVREX|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512F" }, "CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG" },
{ "CPU_ANY_AVX512CD_FLAGS", { "CPU_ANY_AVX512CD_FLAGS",
"CpuAVX512CD" }, "CpuAVX512CD" },
{ "CPU_ANY_AVX512ER_FLAGS", { "CPU_ANY_AVX512ER_FLAGS",
@ -551,7 +551,6 @@ static bitfield cpu_flags[] =
BITFIELD (CpuPRFCHW), BITFIELD (CpuPRFCHW),
BITFIELD (CpuSMAP), BITFIELD (CpuSMAP),
BITFIELD (CpuSHA), BITFIELD (CpuSHA),
BITFIELD (CpuVREX),
BITFIELD (CpuClflushOpt), BITFIELD (CpuClflushOpt),
BITFIELD (CpuXSAVES), BITFIELD (CpuXSAVES),
BITFIELD (CpuXSAVEC), BITFIELD (CpuXSAVEC),

432
opcodes/i386-init.h
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3
opcodes/i386-opc.h
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@ -174,8 +174,6 @@ enum
CpuSMAP, CpuSMAP,
/* SHA instructions required. */ /* SHA instructions required. */
CpuSHA, CpuSHA,
/* VREX support required */
CpuVREX,
/* CLFLUSHOPT instruction required */ /* CLFLUSHOPT instruction required */
CpuClflushOpt, CpuClflushOpt,
/* XSAVES/XRSTORS instruction required */ /* XSAVES/XRSTORS instruction required */
@ -329,7 +327,6 @@ typedef union i386_cpu_flags
unsigned int cpuprfchw:1; unsigned int cpuprfchw:1;
unsigned int cpusmap:1; unsigned int cpusmap:1;
unsigned int cpusha:1; unsigned int cpusha:1;
unsigned int cpuvrex:1;
unsigned int cpuclflushopt:1; unsigned int cpuclflushopt:1;
unsigned int cpuxsaves:1; unsigned int cpuxsaves:1;
unsigned int cpuxsavec:1; unsigned int cpuxsavec:1;

8258
opcodes/i386-tbl.h
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