bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for R_THM_CALL to 25 and remove FIXME comment. (using_thumb2): New function. (elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding. include/ * elf/arm.h: Define TAG_CPU_ARCH_* constants. ld/testsuite/ * ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl, thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests. * ld-arm/thumb1-bl.d: New. * ld-arm/thumb1-bl.s: New. * ld-arm/thumb2-bl-as-thumb1-bad.d: New. * ld-arm/thumb2-bl-as-thumb1-bad.s: New. * ld-arm/thumb2-bl-bad.d: New. * ld-arm/thumb2-bl-bad.s: New. * ld-arm/thumb2-bl.d: New. * ld-arm/thumb2-bl.s: New.
This commit is contained in:
Mark Shinwell
parent
32a5b2f1dd
commit
e95de06338
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@ -1,3 +1,10 @@
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2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
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* elf32-arm.c (elf32_arm_howto_table_1): Change offset for
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R_THM_CALL to 25 and remove FIXME comment.
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(using_thumb2): New function.
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(elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding.
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2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
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* elf32-arm.c (elf32_arm_final_link_relocate): Add cases
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@ -217,11 +217,10 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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0xffffffff, /* dst_mask */
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FALSE), /* pcrel_offset */
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/* FIXME: Has two more bits of offset in Thumb32. */
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HOWTO (R_ARM_THM_CALL, /* type */
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1, /* rightshift */
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2, /* size (0 = byte, 1 = short, 2 = long) */
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23, /* bitsize */
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25, /* bitsize */
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TRUE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_signed,/* complain_on_overflow */
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@ -3534,6 +3533,14 @@ identify_add_or_sub(bfd_vma insn)
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return 0;
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}
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/* Determine if we're dealing with a Thumb-2 object. */
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static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
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{
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int arch = elf32_arm_get_eabi_attr_int (globals->obfd, Tag_CPU_arch);
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return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
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}
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/* Perform a relocation as part of a final link. */
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static bfd_reloc_status_type
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@ -4056,22 +4063,33 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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/* Thumb BL (branch long instruction). */
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{
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bfd_vma relocation;
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bfd_vma reloc_sign;
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bfd_boolean overflow = FALSE;
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bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
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bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
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bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
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bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
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bfd_signed_vma reloc_signed_max;
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bfd_signed_vma reloc_signed_min;
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bfd_vma check;
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bfd_signed_vma signed_check;
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int bitsize;
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int thumb2 = using_thumb2 (globals);
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/* Need to refetch the addend and squish the two 11 bit pieces
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together. */
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/* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
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with Thumb-1) involving the J1 and J2 bits. */
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if (globals->use_rel)
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{
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bfd_vma upper = upper_insn & 0x7ff;
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bfd_vma lower = lower_insn & 0x7ff;
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upper = (upper ^ 0x400) - 0x400; /* Sign extend. */
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addend = (upper << 12) | (lower << 1);
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bfd_vma s = (upper_insn & (1 << 10)) >> 10;
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bfd_vma upper = upper_insn & 0x3ff;
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bfd_vma lower = lower_insn & 0x7ff;
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bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
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bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
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bfd_vma i1 = j1 ^ s ? 0 : 1;
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bfd_vma i2 = j2 ^ s ? 0 : 1;
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addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
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/* Sign extend. */
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addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
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signed_addend = addend;
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}
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@ -4148,6 +4166,15 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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else
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signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
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/* Calculate the permissable maximum and minimum values for
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this relocation according to whether we're relocating for
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Thumb-2 or not. */
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bitsize = howto->bitsize;
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if (!thumb2)
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bitsize -= 2;
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reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
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reloc_signed_min = ~reloc_signed_max;
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/* Assumes two's complement. */
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if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
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overflow = TRUE;
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@ -4159,9 +4186,17 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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1 of the base address. */
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relocation = (relocation + 2) & ~ 3;
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/* Put RELOCATION back into the insn. */
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upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 12) & 0x7ff);
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lower_insn = (lower_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 1) & 0x7ff);
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/* Put RELOCATION back into the insn. Assumes two's complement.
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We use the Thumb-2 encoding, which is safe even if dealing with
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a Thumb-1 instruction by virtue of our overflow check above. */
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reloc_sign = (signed_check < 0) ? 1 : 0;
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upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
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| ((relocation >> 12) & 0x3ff)
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| (reloc_sign << 10);
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lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
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| (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
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| (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
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| ((relocation >> 1) & 0x7ff);
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/* Put the relocated value back in the object file: */
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bfd_put_16 (input_bfd, upper_insn, hit_data);
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@ -1,3 +1,7 @@
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2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
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* elf/arm.h: Define TAG_CPU_ARCH_* constants.
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2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
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* dis-asm.h: Add prototypes for Score disassembler routines.
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@ -84,6 +84,19 @@
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#define PF_ARM_PI 0x20000000 /* Segment is position-independent. */
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#define PF_ARM_ABS 0x40000000 /* Segment must be loaded at its base address. */
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/* Values for the Tag_CPU_arch EABI attribute. */
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#define TAG_CPU_ARCH_PRE_V4 0
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#define TAG_CPU_ARCH_V4 1
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#define TAG_CPU_ARCH_V4T 2
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#define TAG_CPU_ARCH_V5T 3
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#define TAG_CPU_ARCH_V5TE 4
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#define TAG_CPU_ARCH_V5TEJ 5
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#define TAG_CPU_ARCH_V6 6
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#define TAG_CPU_ARCH_V6KZ 7
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#define TAG_CPU_ARCH_V6T2 8
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#define TAG_CPU_ARCH_V6K 9
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#define TAG_CPU_ARCH_V7 10
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/* Relocation types. */
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START_RELOC_NUMBERS (elf_arm_reloc_type)
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@ -1,3 +1,16 @@
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2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
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* ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl,
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thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests.
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* ld-arm/thumb1-bl.d: New.
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* ld-arm/thumb1-bl.s: New.
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* ld-arm/thumb2-bl-as-thumb1-bad.d: New.
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* ld-arm/thumb2-bl-as-thumb1-bad.s: New.
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* ld-arm/thumb2-bl-bad.d: New.
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* ld-arm/thumb2-bl-bad.s: New.
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* ld-arm/thumb2-bl.d: New.
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* ld-arm/thumb2-bl.s: New.
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2006-10-17 Alan Modra <amodra@bigpond.net.au>
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* ld-arm/mixed-app.sym, ld-cris/ldsym1.d, ld-cris/libdso-12.d,
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@ -62,6 +62,12 @@ set armelftests {
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{"Group relocations" "-Ttext 0x8000 --section-start zero=0x0 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" {group-relocs.s}
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{{objdump -Dr group-relocs.d}}
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"group-relocs"}
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{"Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x401000" "" {thumb1-bl.s}
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{{objdump -dr thumb1-bl.d}}
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"thumb1-bl"}
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{"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x1001000" "" {thumb2-bl.s}
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{{objdump -dr thumb2-bl.d}}
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"thumb2-bl"}
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{"Simple non-PIC shared library" "-shared" "" {arm-lib.s}
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{{objdump -fdw arm-lib.d} {objdump -Rw arm-lib.r}}
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"arm-lib.so"}
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@ -146,4 +152,6 @@ run_dump_test "group-relocs-alu-bad"
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run_dump_test "group-relocs-ldr-bad"
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run_dump_test "group-relocs-ldrs-bad"
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run_dump_test "group-relocs-ldc-bad"
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run_dump_test "thumb2-bl-as-thumb1-bad"
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run_dump_test "thumb2-bl-bad"
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@ -0,0 +1,11 @@
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.*thumb1-bl: file format elf32-.*arm
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Disassembly of section .text:
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00001000 <_start>:
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1000: f3ff fffe bl 401000 <bar>
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Disassembly of section .foo:
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00401000 <bar>:
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401000: 4770 bx lr
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@ -0,0 +1,22 @@
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@ Test to ensure that a Thumb-1 BL works.
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.arch armv5t
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.global _start
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.syntax unified
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@ We will place the section .text at 0x1000.
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.text
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.thumb_func
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_start:
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bl bar
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@ We will place the section .foo at 0x401000.
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.section .foo, "xa"
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.thumb_func
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bar:
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bx lr
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@ -0,0 +1,4 @@
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#name: Thumb-2-as-Thumb-1 BL failure test
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#source: thumb2-bl-as-thumb1-bad.s
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#ld: -Ttext 0x1000 --section-start .foo=0x401004
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#error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'
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@ -0,0 +1,22 @@
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@ Test to ensure that a Thumb-1 BL with a Thumb-2-only offset fails.
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.arch armv5t
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.global _start
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.syntax unified
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@ We will place the section .text at 0x1000.
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.text
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.thumb_func
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_start:
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bl bar
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@ We will place the section .foo at 0x401004.
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.section .foo, "xa"
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.thumb_func
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bar:
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bx lr
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@ -0,0 +1,4 @@
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#name: Thumb-2 BL failure test
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#source: thumb2-bl-bad.s
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#ld: -Ttext 0x1000 --section-start .foo=0x1001004
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#error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'
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@ -0,0 +1,22 @@
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@ Test to ensure that a Thumb-2 BL with an oversize offset fails.
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.arch armv7
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.global _start
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.syntax unified
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@ We will place the section .text at 0x1000.
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.text
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.thumb_func
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_start:
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bl bar
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@ We will place the section .foo at 0x1001004.
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.section .foo, "xa"
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.thumb_func
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bar:
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bx lr
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@ -0,0 +1,11 @@
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.*thumb2-bl: file format elf32-.*arm
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Disassembly of section .text:
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00001000 <_start>:
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1000: f3ff d7fe bl 1001000 <bar>
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Disassembly of section .foo:
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01001000 <bar>:
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1001000: 4770 bx lr
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@ -0,0 +1,23 @@
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@ Test to ensure that a Thumb-2 BL works with an offset that is
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@ not permissable for Thumb-1.
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.arch armv7
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.global _start
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.syntax unified
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@ We will place the section .text at 0x1000.
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.text
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.thumb_func
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_start:
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bl bar
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@ We will place the section .foo at 0x1001000.
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.section .foo, "xa"
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.thumb_func
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bar:
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bx lr
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