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This patch adds the necessary support to the assembler to allow wiring 

the X-Gene scheduling description up in the respective GCC backend.

	* config/tc-arm.c (arm_cpus): Add support for APM X-Gene 1 and
	X-Gene 2.
	* doc/c-arm.texi (ARM Options): Mention xgene1 and xgene2.
This commit is contained in:
Philipp Tomsich 2015-01-09 20:00:14 +00:00 committed by Nick Clifton
parent 588dcc3edb
commit ea0d6bb94c
3 changed files with 20 additions and 1 deletions
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6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2015-01-09 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config/tc-arm.c (arm_cpus): Add support for APM X-Gene 1 and
X-Gene 2.
* doc/c-arm.texi (ARM Options): Mention xgene1 and xgene2.
2015-01-07 Jan Beulich <jbeulich@suse.com>
* config/tc-arm.c (struct arm_option_extension_value_table):

5
gas/config/tc-arm.c
View File

@ -24463,6 +24463,11 @@ static const struct arm_cpu_option_table arm_cpus[] =
ARM_CPU_OPT ("marvell-whitney", ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP
| ARM_EXT_SEC, 0),
FPU_ARCH_NEON_VFP_V4, NULL),
/* APM X-Gene family. */
ARM_CPU_OPT ("xgene1", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
"APM X-Gene 1"),
ARM_CPU_OPT ("xgene2", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
"APM X-Gene 2"),
{ NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, NULL }
};

10
gas/doc/c-arm.texi
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@ -129,6 +129,10 @@ recognized:
@code{cortex-m1},
@code{cortex-m0},
@code{cortex-m0plus},
@code{marvell-pj4},
@code{marvell-whitney},
@code{xgene1},
@code{xgene2},
@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
@code{i80200} (Intel XScale processor)
@code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
@ -156,13 +160,16 @@ been added, again in ascending alphabetical order. For example,
The following extensions are currently supported:
@code{crc}
@code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}),
@code{fp} (Floating Point Extensions for v8-A architecture),
@code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures),
@code{iwmmxt},
@code{iwmmxt2},
@code{xscale},
@code{maverick},
@code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures),
@code{mp} (Multiprocessing Extensions for v7-A and v7-R
architectures),
@code{os} (Operating System for v6M architecture),
@code{sec} (Security Extensions for v6K and v7-A architectures),
@code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}),
@ -207,6 +214,7 @@ names are recognized:
@code{armv7e-m},
@code{armv8-a},
@code{iwmmxt}
@code{iwmmxt2}
and
@code{xscale}.
If both @code{-mcpu} and