* config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
only for V850_OPERAND_DISP operands.
This commit is contained in:
Alan Modra
parent
e85ca5bb79
commit
ec178e1bbb
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@ -1,3 +1,8 @@
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2003-07-15 Alan Modra <amodra@bigpond.net.au>
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* config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
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only for V850_OPERAND_DISP operands.
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2003-07-15 Alan Modra <amodra@bigpond.net.au>
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* frags.c (frag_more): Move segment checks to..
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@ -197,7 +197,7 @@ v850_offset (ignore)
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int temp = get_absolute_expression ();
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pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
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(offsetT) temp, (char *) 0);
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(offsetT) temp, (char *) 0);
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*pfrag = 0;
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demand_empty_rest_of_line ();
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@ -396,12 +396,12 @@ v850_comm (area)
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}
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else
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{
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segT old_sec;
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int old_subsec;
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segT old_sec;
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int old_subsec;
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allocate_common:
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old_sec = now_seg;
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old_subsec = now_subseg;
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old_sec = now_seg;
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old_subsec = now_subseg;
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S_SET_VALUE (symbolP, (valueT) size);
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S_SET_ALIGN (symbolP, temp);
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@ -477,7 +477,7 @@ set_machine (number)
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switch (machine)
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{
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case 0: processor_mask = PROCESSOR_V850; break;
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case 0: processor_mask = PROCESSOR_V850; break;
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case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
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}
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}
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@ -539,8 +539,8 @@ const pseudo_typeS md_pseudo_table[] =
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{ "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
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{ "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
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{ "v850e", set_machine, bfd_mach_v850e },
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{ "longcall", v850_longcode, 1 },
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{ "longjump", v850_longcode, 2 },
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{ "longcall", v850_longcode, 1 },
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{ "longjump", v850_longcode, 2 },
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{ NULL, NULL, 0 }
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};
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@ -749,7 +749,7 @@ register_name (expressionP)
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/* Look to see if it's in the register table. */
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if (reg_number >= 0)
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{
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expressionP->X_op = O_register;
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expressionP->X_op = O_register;
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expressionP->X_add_number = reg_number;
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/* Make the rest nice. */
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@ -770,10 +770,10 @@ register_name (expressionP)
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/* Summary of system_register_name().
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in: INPUT_LINE_POINTER points to 1st char of operand.
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EXPRESSIONP points to an expression structure to be filled in.
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ACCEPT_NUMBERS is true iff numerical register names may be used.
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ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
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accepted.
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EXPRESSIONP points to an expression structure to be filled in.
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ACCEPT_NUMBERS is true iff numerical register names may be used.
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ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
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accepted.
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out: An expressionS structure in expressionP.
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The operand may have been a register: in this case, X_op == O_register,
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@ -837,7 +837,7 @@ system_register_name (expressionP, accept_numbers, accept_list_names)
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/* Look to see if it's in the register table. */
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if (reg_number >= 0)
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{
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expressionP->X_op = O_register;
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expressionP->X_op = O_register;
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expressionP->X_add_number = reg_number;
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/* Make the rest nice. */
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@ -888,7 +888,7 @@ cc_name (expressionP)
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/* Look to see if it's in the register table. */
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if (reg_number >= 0)
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{
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expressionP->X_op = O_constant;
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expressionP->X_op = O_constant;
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expressionP->X_add_number = reg_number;
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/* Make the rest nice. */
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@ -919,13 +919,13 @@ skip_white_space ()
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/* Summary of parse_register_list ().
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in: INPUT_LINE_POINTER points to 1st char of a list of registers.
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INSN is the partially constructed instruction.
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OPERAND is the operand being inserted.
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INSN is the partially constructed instruction.
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OPERAND is the operand being inserted.
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out: NULL if the parse completed successfully, otherwise a
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pointer to an error message is returned. If the parse
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completes the correct bit fields in the instruction
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will be filled in.
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pointer to an error message is returned. If the parse
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completes the correct bit fields in the instruction
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will be filled in.
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Parses register lists with the syntax:
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@ -1158,7 +1158,6 @@ md_show_usage (stream)
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fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
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fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
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fprintf (stream, _(" -mrelax Enable relaxation\n"));
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}
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int
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@ -1347,7 +1346,7 @@ md_begin ()
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else
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/* xgettext:c-format */
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as_bad (_("Unable to determine default target processor from string: %s"),
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TARGET_CPU);
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TARGET_CPU);
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v850_hash = hash_new ();
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@ -1509,13 +1508,13 @@ v850_reloc_prefix (operand)
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return reloc; \
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}
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CHECK_ ("hi0", BFD_RELOC_HI16 );
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CHECK_ ("hi", BFD_RELOC_HI16_S );
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CHECK_ ("lo", BFD_RELOC_LO16 );
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CHECK_ ("hi0", BFD_RELOC_HI16 );
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CHECK_ ("hi", BFD_RELOC_HI16_S );
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CHECK_ ("lo", BFD_RELOC_LO16 );
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CHECK_ ("sdaoff", handle_sdaoff (operand));
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CHECK_ ("zdaoff", handle_zdaoff (operand));
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CHECK_ ("tdaoff", handle_tdaoff (operand));
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CHECK_ ("hilo", BFD_RELOC_32 );
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CHECK_ ("hilo", BFD_RELOC_32 );
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CHECK_ ("ctoff", handle_ctoff (operand) );
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/* Restore skipped parenthesis. */
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@ -1791,8 +1790,8 @@ md_assemble (str)
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}
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extra_data_after_insn = TRUE;
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extra_data_len = 4;
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extra_data = 0;
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extra_data_len = 4;
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extra_data = 0;
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break;
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default:
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@ -1820,8 +1819,8 @@ md_assemble (str)
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}
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extra_data_after_insn = TRUE;
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extra_data_len = 4;
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extra_data = ex.X_add_number;
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extra_data_len = 4;
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extra_data = ex.X_add_number;
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}
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if (fc > MAX_INSN_FIXUPS)
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@ -1897,7 +1896,7 @@ md_assemble (str)
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/* The parse_register_list() function has already done
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everything, so fake a dummy expression. */
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ex.X_op = O_constant;
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ex.X_op = O_constant;
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ex.X_add_number = 0;
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}
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else if (operand->flags & V850E_IMMEDIATE16)
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@ -1917,9 +1916,9 @@ md_assemble (str)
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}
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extra_data_after_insn = TRUE;
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extra_data_len = 2;
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extra_data = ex.X_add_number;
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ex.X_add_number = 0;
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extra_data_len = 2;
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extra_data = ex.X_add_number;
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ex.X_add_number = 0;
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}
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else if (operand->flags & V850E_IMMEDIATE32)
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{
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@ -1929,9 +1928,9 @@ md_assemble (str)
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errmsg = _("constant expression expected");
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extra_data_after_insn = TRUE;
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extra_data_len = 4;
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extra_data = ex.X_add_number;
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ex.X_add_number = 0;
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extra_data_len = 4;
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extra_data = ex.X_add_number;
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ex.X_add_number = 0;
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}
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else if (register_name (&ex)
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&& (operand->flags & V850_OPERAND_REG) == 0)
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@ -2216,7 +2215,7 @@ md_assemble (str)
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fix_new_exp (frag_now,
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f - frag_now->fr_literal, 4,
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& fixups[i].exp,
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1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
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(operand->flags & V850_OPERAND_DISP) != 0,
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(bfd_reloc_code_real_type) (fixups[i].opindex
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+ (int) BFD_RELOC_UNUSED));
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}
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@ -2235,7 +2234,7 @@ tc_gen_reloc (seg, fixp)
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{
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arelent *reloc;
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reloc = (arelent *) xmalloc (sizeof (arelent));
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reloc = (arelent *) xmalloc (sizeof (arelent));
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reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
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*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
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reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
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@ -2255,7 +2254,7 @@ tc_gen_reloc (seg, fixp)
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reloc->addend = fixp->fx_addnumber;
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}
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reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
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reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
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if (reloc->howto == (reloc_howto_type *) NULL)
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{
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@ -2285,7 +2284,7 @@ v850_handle_align (frag)
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&& now_seg != v850_seg_table[TBSS_SECTION].s
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&& now_seg != v850_seg_table[ZBSS_SECTION].s)
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fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
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BFD_RELOC_V850_ALIGN);
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BFD_RELOC_V850_ALIGN);
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}
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/* Return current size of variable part of frag. */
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@ -2370,7 +2369,7 @@ md_apply_fix3 (fixP, valueP, seg)
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operand = &v850_operands[opindex];
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/* Fetch the instruction, insert the fully resolved operand
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value, and stuff the instruction back again.
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value, and stuff the instruction back again.
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Note the instruction has been stored in little endian
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format! */
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