gas/
2007-09-12 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (md_assemble): Move handling of extrq/insertq after generic operand swapping, and swap only the immediate operands. gas/testsuite/ 2007-09-12 Jan Beulich <jbeulich@novell.com> * gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax code. * gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
This commit is contained in:
Jan Beulich
parent
a18e2996a2
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ec56d5c0f6
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@ -1,3 +1,8 @@
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2007-09-12 Jan Beulich <jbeulich@novell.com>
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* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
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after generic operand swapping, and swap only the immediate operands.
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2007-09-11 Nathan Sidwell <nathan@codesourcery.com>
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* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
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@ -2135,20 +2135,6 @@ md_assemble (line)
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if (line == NULL)
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return;
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/* The order of the immediates should be reversed
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for 2 immediates extrq and insertq instructions */
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if ((i.imm_operands == 2)
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&& ((strcmp (mnemonic, "extrq") == 0)
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|| (strcmp (mnemonic, "insertq") == 0)))
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{
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swap_2_operands (0, 1);
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/* "extrq" and insertq" are the only two instructions whose operands
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have to be reversed even though they have two immediate operands.
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*/
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if (intel_syntax)
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swap_operands ();
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}
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/* Now we've parsed the mnemonic into a set of templates, and have the
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operands at hand. */
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@ -2164,6 +2150,13 @@ md_assemble (line)
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&& operand_type_check (i.types[1], imm)))
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swap_operands ();
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/* The order of the immediates should be reversed
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for 2 immediates extrq and insertq instructions */
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if (i.imm_operands == 2
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&& (strcmp (mnemonic, "extrq") == 0
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|| strcmp (mnemonic, "insertq") == 0))
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swap_2_operands (0, 1);
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if (i.imm_operands)
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optimize_imm ();
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@ -1,3 +1,8 @@
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2007-09-12 Jan Beulich <jbeulich@novell.com>
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* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
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code.
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* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
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2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/svme.s: Updated to allow eax in 64bit.
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@ -20,4 +20,18 @@ Disassembly of section .text:
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32: f2 0f 78 ca 02 04[ ]*insertq \$0x4,\$0x2,%xmm2,%xmm1
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38: f2 0f 2b 09[ ]+movntsd %xmm1,\(%ecx\)
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3c: f3 0f 2b 09[ ]+movntss %xmm1,\(%ecx\)
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[ ]*[a-f0-9]+: f3 0f bd 19[ ]+lzcnt \(%ecx\),%ebx
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[ ]*[a-f0-9]+: 66 f3 0f bd 19[ ]+lzcnt \(%ecx\),%bx
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[ ]*[a-f0-9]+: f3 0f bd d9[ ]+lzcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 66 f3 0f bd d9[ ]+lzcnt %cx,%bx
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[ ]*[a-f0-9]+: f3 0f b8 19[ ]+popcnt \(%ecx\),%ebx
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[ ]*[a-f0-9]+: 66 f3 0f b8 19[ ]+popcnt \(%ecx\),%bx
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[ ]*[a-f0-9]+: f3 0f b8 d9[ ]+popcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 66 f3 0f b8 d9[ ]+popcnt %cx,%bx
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[ ]*[a-f0-9]+: 66 0f 79 ca[ ]+extrq %xmm2,%xmm1
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[ ]*[a-f0-9]+: 66 0f 78 c1 02 04[ ]*extrq \$0x4,\$0x2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 79 ca[ ]+insertq %xmm2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 78 ca 02 04[ ]*insertq \$0x4,\$0x2,%xmm2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 2b 09[ ]+movntsd %xmm1,\(%ecx\)
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[ ]*[a-f0-9]+: f3 0f 2b 09[ ]+movntss %xmm1,\(%ecx\)
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#pass
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@ -17,5 +17,21 @@ foo:
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movntsd %xmm1,(%ecx)
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movntss %xmm1,(%ecx)
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.intel_syntax noprefix
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lzcnt ebx,[ecx]
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lzcnt bx,[ecx]
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lzcnt ebx,ecx
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lzcnt bx,cx
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popcnt ebx,[ecx]
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popcnt bx,[ecx]
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popcnt ebx,ecx
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popcnt bx,cx
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extrq xmm1,xmm2
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extrq xmm1,2,4
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insertq xmm1,xmm2
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insertq xmm1,xmm2,2,4
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movntsd [ecx],xmm1
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movntss [ecx],xmm1
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# Force a good alignment.
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.p2align 4,0
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@ -24,4 +24,22 @@ Disassembly of section .text:
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46: f2 0f 78 ca 02 04[ ]+insertq \$0x4,\$0x2,%xmm2,%xmm1
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4c: f2 0f 2b 09[ ]+movntsd %xmm1,\(%rcx\)
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50: f3 0f 2b 09[ ]+movntss %xmm1,\(%rcx\)
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...
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[ ]*[a-f0-9]+: f3 48 0f bd 19[ ]+lzcnt \(%rcx\),%rbx
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[ ]*[a-f0-9]+: f3 0f bd 19[ ]+lzcnt \(%rcx\),%ebx
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[ ]*[a-f0-9]+: 66 f3 0f bd 19[ ]+lzcnt \(%rcx\),%bx
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[ ]*[a-f0-9]+: f3 48 0f bd d9[ ]+lzcnt %rcx,%rbx
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[ ]*[a-f0-9]+: f3 0f bd d9[ ]+lzcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 66 f3 0f bd d9[ ]+lzcnt %cx,%bx
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[ ]*[a-f0-9]+: f3 48 0f b8 19[ ]+popcnt \(%rcx\),%rbx
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[ ]*[a-f0-9]+: f3 0f b8 19[ ]+popcnt \(%rcx\),%ebx
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[ ]*[a-f0-9]+: 66 f3 0f b8 19[ ]+popcnt \(%rcx\),%bx
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[ ]*[a-f0-9]+: f3 48 0f b8 d9[ ]+popcnt %rcx,%rbx
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[ ]*[a-f0-9]+: f3 0f b8 d9[ ]+popcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 66 f3 0f b8 d9[ ]+popcnt %cx,%bx
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[ ]*[a-f0-9]+: 66 0f 79 ca[ ]+extrq %xmm2,%xmm1
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[ ]*[a-f0-9]+: 66 0f 78 c1 02 04[ ]*extrq \$0x4,\$0x2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 79 ca[ ]+insertq %xmm2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 78 ca 02 04[ ]*insertq \$0x4,\$0x2,%xmm2,%xmm1
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[ ]*[a-f0-9]+: f2 0f 2b 09[ ]+movntsd %xmm1,\(%rcx\)
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[ ]*[a-f0-9]+: f3 0f 2b 09[ ]+movntss %xmm1,\(%rcx\)
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#pass
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@ -21,5 +21,25 @@ foo:
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movntsd %xmm1,(%rcx)
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movntss %xmm1,(%rcx)
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.intel_syntax noprefix
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lzcnt rbx,[rcx]
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lzcnt ebx,[rcx]
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lzcnt bx,[rcx]
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lzcnt rbx,rcx
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lzcnt ebx,ecx
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lzcnt bx,cx
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popcnt rbx,[rcx]
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popcnt ebx,[rcx]
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popcnt bx,[rcx]
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popcnt rbx,rcx
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popcnt ebx,ecx
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popcnt bx,cx
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extrq xmm1,xmm2
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extrq xmm1,2,4
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insertq xmm1,xmm2
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insertq xmm1,xmm2,2,4
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movntsd [rcx],xmm1
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movntss [rcx],xmm1
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# Force a good alignment.
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.p2align 4,0
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