From ec694b8956f6190e733dcf7b49399f928a40f051 Mon Sep 17 00:00:00 2001
From: Nick Clifton <nickc@redhat.com>
Date: Sun, 9 Apr 2000 20:25:17 +0000
Subject: [PATCH] Add 'avr' to Makefile.am Add M32R docs to as.texinfo

---
 gas/ChangeLog      | 10 ++++++++++
 gas/Makefile.am    |  3 +++
 gas/doc/as.texinfo | 40 +++++++++++++++++++++++++++++++++++++++-
 3 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6b47aa3133..8d4c973157 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2000-04-09  Nick Clifton  <nickc@cygnus.com>
+
+	* Makefile.am (CPU_TYPES): Add 'avr'.
+	(TARGET_CPU_CFILES): Add 'tc-avr.c'.
+	(TARGET_CPU_HFILES): Add 'tc-avr.h'.
+
+	* makefine.in: Regenerate.
+
+	* doc/as.texinfo: Add M32R documentation.
+
 Fri Apr  7 15:56:57 2000  Andrew Cagney  <cagney@b1.cygnus.com>
  
 	* configure.in (WARN_CFLAGS): Set to -W -Wall by default.  Add
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 79a5c9fec9..b0a65ba430 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -41,6 +41,7 @@ CPU_TYPES = \
 	alpha \
 	arc \
 	arm \
+	avr \
 	d10v \
 	d30v \
 	fr30 \
@@ -199,6 +200,7 @@ TARGET_CPU_CFILES = \
 	config/tc-alpha.c \
 	config/tc-arc.c \
 	config/tc-arm.c \
+	config/tc-avr.c \
 	config/tc-d10v.c \
 	config/tc-d30v.c \
 	config/tc-fr30.c \
@@ -234,6 +236,7 @@ TARGET_CPU_HFILES = \
 	config/tc-alpha.h \
 	config/tc-arc.h \
 	config/tc-arm.h \
+	config/tc-avr.h \
 	config/tc-d10v.h \
 	config/tc-d30v.h \
 	config/tc-fr30.h \
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 5917a007d0..f9cf578f18 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -257,11 +257,15 @@ Here is a brief summary of how to invoke @code{@value{AS}}.  For details,
  [ -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC ]
  [ -b ] [ -no-relax ]
 @end ifset
+@ifset M32R
+ [ --m32rx | --[no-]warn-explicit-parallel-conflicts | --W[n]p ]
+@end ifset
 @ifset M680X0
  [ -l ] [ -m68000 | -m68010 | -m68020 | ... ]
 @end ifset
 @ifset MCORE
  [ -jsri2bsr ] [ -sifilter ] [ -relax ]
+ [ -mcpu=[210|340] ]
 @end ifset
 @ifset MIPS
  [ -nocpp ] [ -EL ] [ -EB ] [ -G @var{num} ] [ -mcpu=@var{CPU} ]
@@ -486,6 +490,26 @@ error if necessary.
 @end table
 @end ifset
 
+@ifset M32R
+The following options are available when @value{AS} is configured for the
+Mitsubishi M32R series.
+
+@table @code
+
+@item --m32rx
+Specify which processor in the M32R family is the target.  The default
+is normally the M32R, but this option changes it to the M32RX.
+
+@item --warn-explicit-parallel-conflicts or --Wp
+Produce warning messages when questionable parallel constructs are
+encountered. 
+
+@item --no-warn-explicit-parallel-conflicts or --Wnp
+Do not produce warning messages when questionable parallel constructs are 
+encountered. 
+
+@end table
+@end ifset
 
 @ifset M680X0
 The following options are available when @value{AS} is configured for the
@@ -534,7 +558,6 @@ Generate ``little endian'' format output.
 @end table
 @end ifset
 
-
 @ifset SPARC
 The following options are available when @code{@value{AS}} is configured
 for the SPARC architecture:
@@ -659,6 +682,15 @@ The default can be overidden by the @samp{-sifilter} command line option.
 @item -relax
 Alter jump instructions for long displacements.
 
+@item -mcpu=[210|340]
+Select the cpu type on the target hardware.  This controls which instructions
+can be assembled.
+
+@item -EB
+Assemble for a big endian target.
+
+@item -EL
+Assemble for a little endian target.
 
 @end table
 @end ifset
@@ -4936,6 +4968,9 @@ subject, see the hardware manufacturer's manual.
 @ifset I960
 * i960-Dependent::              Intel 80960 Dependent Features
 @end ifset
+@ifset M32R
+* M32R-Dependent::              M32R Dependent Features
+@end ifset
 @ifset M680X0
 * M68K-Dependent::              M680x0 Dependent Features
 @end ifset
@@ -5109,6 +5144,9 @@ family.
 @include c-i960.texi
 @end ifset
 
+@ifset M32R
+@include c-m32r.texi
+@end ifset
 
 @ifset M680X0
 @include c-m68k.texi