From 2001-12-09 Julien Ducourthial <jducourt@noos.fr>:
* ppc-instructions (lswx): Do the register control with the register count. Initialize the right register in the loop. (mtfsfi) : Correct prefix for the instruction.
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@ -1,3 +1,10 @@
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2002-03-23 Andrew Cagney <ac131313@redhat.com>
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From 2001-12-09 Julien Ducourthial <jducourt@noos.fr>:
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* ppc-instructions (lswx): Do the register control with the
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register count. Initialize the right register in the loop.
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(mtfsfi) : Correct prefix for the instruction.
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2002-02-24 Andrew Cagney <ac131313@redhat.com>
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2002-02-24 Andrew Cagney <ac131313@redhat.com>
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From wiz at danbala:
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From wiz at danbala:
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@ -2275,11 +2275,11 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
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r = RT - 1;
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r = RT - 1;
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i = 32;
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i = 32;
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nr = (n + 3) / 4;
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nr = (n + 3) / 4;
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if (((RT + n >= 32)
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if (((RT + nr >= 32)
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? ((RA >= RT || RA < (RT + n) % 32)
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? ((RA >= RT || RA < (RT + nr) % 32)
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|| (RB >= RT || RB < (RT + n) % 32))
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|| (RB >= RT || RB < (RT + nr) % 32))
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: ((RA >= RT && RA < RT + n)
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: ((RA >= RT && RA < RT + nr)
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|| (RB >= RT && RB < RT + n)))
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|| (RB >= RT && RB < RT + nr)))
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|| (RT == RA || RT == RB))
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|| (RT == RA || RT == RB))
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program_interrupt(processor, cia,
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program_interrupt(processor, cia,
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illegal_instruction_program_interrupt);
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illegal_instruction_program_interrupt);
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@ -2288,7 +2288,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
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while (n > 0) {
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while (n > 0) {
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if (i == 32) {
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if (i == 32) {
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r = (r + 1) % 32;
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r = (r + 1) % 32;
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GPR(i) = 0;
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GPR(r) = 0;
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}
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}
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GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
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GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
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i = i + 8;
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i = i + 8;
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@ -4582,7 +4582,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
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FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */
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FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */
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FPSCR_END(0);
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FPSCR_END(0);
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0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate
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0.63,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate
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FPSCR_BEGIN;
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FPSCR_BEGIN;
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FPSCR_SET(BF, U);
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FPSCR_SET(BF, U);
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FPSCR_END(Rc);
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FPSCR_END(Rc);
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