sparc: support %dN and %qN syntax for FP registers.

The SPARC Refence Manual documents the %dN and %qN syntax to
refer to double and quad-precision floating-point registers,
respectively.  See OSA2015 Appendix C, Assembly Language Syntax,
C1.1 Register Names.

This patch adds support for these names to GAS.  This eases the
porting of software from Solaris to GNU/Linux, as these register
names have been supported by the Solaris linker for a long time
and many assembler require that support.

gas/ChangeLog:

2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
	double and quad-precision floating-point registers.
This commit is contained in:
Jose E. Marchesi 2015-12-09 07:32:52 -05:00
parent b593e3d9b0
commit ec892a0718
2 changed files with 16 additions and 5 deletions

View File

@ -1,3 +1,8 @@
2015-12-09 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
double and quad-precision floating-point registers.
2015-12-09 Nick Clifton <nickc@redhat.com>
* config/tc-rx.c (rx_relax_frag): Fix compile time warning.

View File

@ -2370,7 +2370,9 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
char format;
if (*s++ == '%'
&& ((format = *s) == 'f')
&& ((format = *s) == 'f'
|| format == 'd'
|| format == 'q')
&& ISDIGIT (*++s))
{
for (mask = 0; ISDIGIT (*s); ++s)
@ -2381,19 +2383,23 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
if ((*args == 'v'
|| *args == 'B'
|| *args == '5'
|| *args == 'H')
|| *args == 'H'
|| format == 'd')
&& (mask & 1))
{
/* register must be even numbered */
break;
} /* register must be even numbered */
}
if ((*args == 'V'
|| *args == 'R'
|| *args == 'J')
|| *args == 'J'
|| format == 'q')
&& (mask & 3))
{
/* register must be multiple of 4 */
break;
} /* register must be multiple of 4 */
}
if (mask >= 64)
{