gas/
2009-04-20 Jan Beulich <jbeulich@novell.com> * Makefile.am: Add explicit dependency of tc-i386.o on tc-i386-intel.c. * Makefile.in: Likewise. * config/tc-i386.c (i386_finalize_immediate): Declare, broken out from i386_immediate. (i386_immediate): Slightly re-arrange, call i386_finalize_immediate. (i386_finalize_displacement): Declare, broken out from i386_displacement. (i386_displacement): Slightly re-arrange, call i386_finalize_displacement. (i386_intel_simplify, i386_intel_parse_name): Declare. (this_operand): Initialize to -1. (set_intel_syntax): Set expression rank for O_full_ptr. (md_assemble): Set this_operand back to -1 after parsing operands. (x86_cons): Negate intel_syntax to indicate state. Call i386_intel_simplify. (md_operand): Convert if to switch. Handle '[' for Intel syntax. (i386_intel_operand): Delete, including all helper functions and data. * config/tc-i386-intel.c: New file, all new code. * config/tc-i386.h (i386_operator): Declare. (md_operator): Define to i386_operator. (i386_need_index_operator): Declare. (md_need_index_operator): Define to i386_need_index_operator. (O_full_ptr): Define. gas/testsuite/ 2009-04-20 Jan Beulich <jbeulich@novell.com> * gas/i386/equ.s: Adjust. * gas/i386/equ.d: Remove reference to equ.e. * gas/i386/equ.e: Delete. * gas/i386/intel-expr.s: New. * gas/i386/intel-expr.d: New. * gas/i386/i386.exp: Run new test. * gas/i386/intel.s: Adjust. * gas/i386/intel.e: Remove no longer valid warning messages. * gas/i386/intel16.s: Adjust. * gas/i386/intel16.d: Remove reference to intel16.e. * gas/i386/intel16.e: Delete. * gas/i386/intelbad.s: Add more tests. * gas/i386/intelbad.l: Adjust. * gas/i386/intelok.s: Remove now unneeded equates. Add more tests. * gas/i386/intelok.d: Remove reference to intelok.e. Adjust. * gas/i386/intelok.e: Delete. * gas/i386/x86_64.s: Adjust. * gas/i386/x86_64.d: Remove reference to x86_64.e. * gas/i386/x86_64.e: Delete.
This commit is contained in:
Jan Beulich
parent
fcaed75e52
commit
ee86248cee
@ -1,3 +1,34 @@
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2009-04-20 Jan Beulich <jbeulich@novell.com>
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* Makefile.am: Add explicit dependency of tc-i386.o on
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tc-i386-intel.c.
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* Makefile.in: Likewise.
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* config/tc-i386.c (i386_finalize_immediate): Declare, broken
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out from i386_immediate.
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(i386_immediate): Slightly re-arrange, call
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i386_finalize_immediate.
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(i386_finalize_displacement): Declare, broken out from
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i386_displacement.
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(i386_displacement): Slightly re-arrange, call
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i386_finalize_displacement.
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(i386_intel_simplify, i386_intel_parse_name): Declare.
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(this_operand): Initialize to -1.
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(set_intel_syntax): Set expression rank for O_full_ptr.
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(md_assemble): Set this_operand back to -1 after parsing
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operands.
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(x86_cons): Negate intel_syntax to indicate state. Call
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i386_intel_simplify.
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(md_operand): Convert if to switch. Handle '[' for Intel
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syntax.
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(i386_intel_operand): Delete, including all helper functions
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and data.
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* config/tc-i386-intel.c: New file, all new code.
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* config/tc-i386.h (i386_operator): Declare.
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(md_operator): Define to i386_operator.
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(i386_need_index_operator): Declare.
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(md_need_index_operator): Define to i386_need_index_operator.
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(O_full_ptr): Define.
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2009-04-20 Jan Beulich <jbeulich@novell.com>
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* expr.c (operand): Call md_need_index_operator() and
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@ -614,6 +614,8 @@ e-crisaout.o: $(srcdir)/config/e-crisaout.c
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e-criself.o: $(srcdir)/config/e-criself.c
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$(COMPILE) -c $(srcdir)/config/e-criself.c
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tc-i386.o: $(srcdir)/config/tc-i386-intel.c
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xtensa-relax.o: $(srcdir)/config/xtensa-relax.c
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$(COMPILE) -c $(srcdir)/config/xtensa-relax.c
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@ -2667,6 +2667,8 @@ e-crisaout.o: $(srcdir)/config/e-crisaout.c
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e-criself.o: $(srcdir)/config/e-criself.c
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$(COMPILE) -c $(srcdir)/config/e-criself.c
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tc-i386.o: $(srcdir)/config/tc-i386-intel.c
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xtensa-relax.o: $(srcdir)/config/xtensa-relax.c
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$(COMPILE) -c $(srcdir)/config/xtensa-relax.c
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845
gas/config/tc-i386-intel.c
Normal file
845
gas/config/tc-i386-intel.c
Normal file
@ -0,0 +1,845 @@
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/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
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Copyright 2009
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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static struct
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{
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operatorT op_modifier; /* Operand modifier. */
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int is_mem; /* 1 if operand is memory reference. */
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unsigned int in_offset; /* >=1 if processing operand of offset. */
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unsigned int in_bracket; /* >=1 if processing operand in brackets. */
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unsigned int in_scale; /* >=1 if processing multipication operand
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* in brackets. */
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i386_operand_type reloc_types; /* Value obtained from lex_got(). */
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const reg_entry *base; /* Base register (if any). */
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const reg_entry *index; /* Index register (if any). */
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offsetT scale_factor; /* Accumulated scale factor. */
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symbolS *seg;
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}
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intel_state;
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/* offset X_add_symbol */
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#define O_offset O_md32
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/* byte ptr X_add_symbol */
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#define O_byte_ptr O_md31
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/* word ptr X_add_symbol */
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#define O_word_ptr O_md30
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/* dword ptr X_add_symbol */
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#define O_dword_ptr O_md29
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/* qword ptr X_add_symbol */
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#define O_qword_ptr O_md28
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/* oword ptr X_add_symbol */
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#define O_oword_ptr O_md27
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/* fword ptr X_add_symbol */
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#define O_fword_ptr O_md26
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/* tbyte ptr X_add_symbol */
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#define O_tbyte_ptr O_md25
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/* xmmword ptr X_add_symbol */
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#define O_xmmword_ptr O_md24
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/* ymmword ptr X_add_symbol */
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#define O_ymmword_ptr O_md23
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/* near ptr X_add_symbol */
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#define O_near_ptr O_md22
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/* far ptr X_add_symbol */
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#define O_far_ptr O_md21
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/* offset X_add_symbol */
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#define O_short O_md20
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static struct
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{
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const char *name;
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operatorT operator;
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unsigned int operands;
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}
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const i386_operators[] =
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{
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{ "and", O_bit_and, 2 },
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{ "eq", O_eq, 2 },
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{ "ge", O_ge, 2 },
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{ "gt", O_gt, 2 },
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{ "le", O_le, 2 },
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{ "lt", O_lt, 2 },
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{ "mod", O_modulus, 2 },
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{ "ne", O_ne, 2 },
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{ "not", O_bit_not, 1 },
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{ "offset", O_offset, 1 },
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{ "or", O_bit_inclusive_or, 2 },
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{ "shl", O_left_shift, 2 },
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{ "short", O_short, 1 },
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{ "shr", O_right_shift, 2 },
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{ "xor", O_bit_exclusive_or, 2 },
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{ NULL, O_illegal, 0 }
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};
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static struct
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{
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const char *name;
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operatorT operator;
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unsigned short sz[3];
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}
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const i386_types[] =
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{
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#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
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I386_TYPE(byte, 1),
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I386_TYPE(word, 2),
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I386_TYPE(dword, 4),
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I386_TYPE(fword, 6),
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I386_TYPE(qword, 8),
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I386_TYPE(tbyte, 10),
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I386_TYPE(oword, 16),
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I386_TYPE(xmmword, 16),
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I386_TYPE(ymmword, 32),
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#undef I386_TYPE
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{ "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
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{ "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
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{ NULL, O_illegal, { 0, 0, 0 } }
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};
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operatorT i386_operator (const char *name, unsigned int operands, char *pc)
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{
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unsigned int j;
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if (!intel_syntax)
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return O_absent;
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if (!name)
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{
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if (operands != 2)
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return O_illegal;
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switch (*input_line_pointer)
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{
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case ':':
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++input_line_pointer;
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return O_full_ptr;
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case '[':
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++input_line_pointer;
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return O_index;
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case '@':
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if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
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{
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int adjust = 0;
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char *gotfree_input_line = lex_got (&i.reloc[this_operand],
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&adjust,
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&intel_state.reloc_types);
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if (!gotfree_input_line)
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break;
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free (gotfree_input_line);
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*input_line_pointer++ = '+';
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memset (input_line_pointer, '0', adjust - 1);
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input_line_pointer[adjust - 1] = ' ';
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return O_add;
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}
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break;
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}
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return O_illegal;
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}
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for (j = 0; i386_operators[j].name; ++j)
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if (strcasecmp(i386_operators[j].name, name) == 0)
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{
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if (i386_operators[j].operands
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&& i386_operators[j].operands != operands)
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return O_illegal;
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return i386_operators[j].operator;
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}
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for (j = 0; i386_types[j].name; ++j)
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if (strcasecmp(i386_types[j].name, name) == 0)
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break;
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if (i386_types[j].name && *pc == ' ')
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{
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char *name = ++input_line_pointer;
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char c = get_symbol_end ();
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if (strcasecmp (name, "ptr") == 0)
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{
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name[-1] = *pc;
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*pc = c;
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if (intel_syntax > 0 || operands != 1)
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return O_illegal;
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return i386_types[j].operator;
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}
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*input_line_pointer = c;
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input_line_pointer = name - 1;
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}
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return O_absent;
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}
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static int i386_intel_parse_name (const char *name, expressionS *e)
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{
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unsigned int i;
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for (i = 0; i386_types[i].name; ++i)
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if (strcasecmp(i386_types[i].name, name) == 0)
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{
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e->X_op = O_constant;
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e->X_add_number = i386_types[i].sz[flag_code];
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e->X_add_symbol = NULL;
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e->X_op_symbol = NULL;
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return 1;
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}
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return 0;
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}
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static INLINE int i386_intel_check (const reg_entry *reg,
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const reg_entry *base,
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const reg_entry *index)
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{
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if ((this_operand >= 0 && reg != i.op[this_operand].regs)
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|| base != intel_state.base || index != intel_state.index)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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return 1;
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}
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static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
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{
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if (S_GET_SEGMENT (sym) == absolute_section)
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{
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offsetT val = e->X_add_number;
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*e = *symbol_get_value_expression (sym);
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e->X_add_number += val;
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}
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else
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{
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e->X_add_symbol = sym;
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e->X_op_symbol = NULL;
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e->X_op = O_symbol;
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}
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}
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static int i386_intel_simplify (expressionS *);
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static INLINE int i386_intel_simplify_symbol(symbolS *sym)
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{
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int ret = i386_intel_simplify (symbol_get_value_expression (sym));
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if (ret == 2)
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{
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S_SET_SEGMENT(sym, absolute_section);
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ret = 1;
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}
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return ret;
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}
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static int i386_intel_simplify (expressionS *e)
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{
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const reg_entry *reg = this_operand >= 0 ? i.op[this_operand].regs : NULL;
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const reg_entry *base = intel_state.base;
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const reg_entry *index = intel_state.index;
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int ret;
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if (!intel_syntax)
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return 1;
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switch (e->X_op)
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{
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case O_index:
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if (e->X_add_symbol)
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{
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if (!i386_intel_simplify_symbol (e->X_add_symbol)
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|| !i386_intel_check(reg, intel_state.base, intel_state.index))
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return 0;;
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}
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if (!intel_state.in_offset)
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++intel_state.in_bracket;
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ret = i386_intel_simplify_symbol (e->X_op_symbol);
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if (!intel_state.in_offset)
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--intel_state.in_bracket;
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if (!ret)
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return 0;
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if (e->X_add_symbol)
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e->X_op = O_add;
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else
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i386_intel_fold (e, e->X_op_symbol);
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break;
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case O_offset:
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++intel_state.in_offset;
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ret = i386_intel_simplify_symbol (e->X_add_symbol);
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--intel_state.in_offset;
|
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if (!ret || !i386_intel_check(reg, base, index))
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return 0;
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i386_intel_fold (e, e->X_add_symbol);
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return ret;
|
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|
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case O_byte_ptr:
|
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case O_word_ptr:
|
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case O_dword_ptr:
|
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case O_fword_ptr:
|
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case O_qword_ptr:
|
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case O_tbyte_ptr:
|
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case O_oword_ptr:
|
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case O_xmmword_ptr:
|
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case O_ymmword_ptr:
|
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case O_near_ptr:
|
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case O_far_ptr:
|
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if (intel_state.op_modifier == O_absent)
|
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intel_state.op_modifier = e->X_op;
|
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/* FALLTHROUGH */
|
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case O_short:
|
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if (symbol_get_value_expression (e->X_add_symbol)->X_op == O_register)
|
||||
{
|
||||
as_bad (_("invalid use of register"));
|
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return 0;
|
||||
}
|
||||
if (!i386_intel_simplify_symbol (e->X_add_symbol))
|
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return 0;
|
||||
i386_intel_fold (e, e->X_add_symbol);
|
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break;
|
||||
|
||||
case O_full_ptr:
|
||||
if (symbol_get_value_expression (e->X_op_symbol)->X_op == O_register)
|
||||
{
|
||||
as_bad (_("invalid use of register"));
|
||||
return 0;
|
||||
}
|
||||
if (!i386_intel_simplify_symbol (e->X_op_symbol)
|
||||
|| !i386_intel_check(reg, intel_state.base, intel_state.index))
|
||||
return 0;
|
||||
if (!intel_state.in_offset)
|
||||
intel_state.seg = e->X_add_symbol;
|
||||
i386_intel_fold (e, e->X_op_symbol);
|
||||
break;
|
||||
|
||||
case O_register:
|
||||
if (this_operand < 0 || intel_state.in_offset)
|
||||
{
|
||||
as_bad (_("invalid use of register"));
|
||||
return 0;
|
||||
}
|
||||
if (!intel_state.in_bracket)
|
||||
{
|
||||
if (i.op[this_operand].regs)
|
||||
{
|
||||
as_bad (_("invalid use of register"));
|
||||
return 0;
|
||||
}
|
||||
if (i386_regtab[e->X_add_number].reg_type.bitfield.sreg3
|
||||
&& i386_regtab[e->X_add_number].reg_num == RegFlat)
|
||||
{
|
||||
as_bad (_("invalid use of pseudo-register"));
|
||||
return 0;
|
||||
}
|
||||
i.op[this_operand].regs = i386_regtab + e->X_add_number;
|
||||
}
|
||||
else if (!intel_state.base && !intel_state.in_scale)
|
||||
intel_state.base = i386_regtab + e->X_add_number;
|
||||
else if (!intel_state.index)
|
||||
intel_state.index = i386_regtab + e->X_add_number;
|
||||
else
|
||||
{
|
||||
/* esp is invalid as index */
|
||||
intel_state.index = i386_regtab + REGNAM_EAX + 4;
|
||||
}
|
||||
e->X_op = O_constant;
|
||||
e->X_add_number = 0;
|
||||
return 2;
|
||||
|
||||
case O_multiply:
|
||||
if (this_operand >= 0 && intel_state.in_bracket)
|
||||
{
|
||||
expressionS *scale = NULL;
|
||||
|
||||
if (intel_state.index)
|
||||
--scale;
|
||||
|
||||
if (!intel_state.in_scale++)
|
||||
intel_state.scale_factor = 1;
|
||||
|
||||
ret = i386_intel_simplify_symbol (e->X_add_symbol);
|
||||
if (ret && !scale && intel_state.index)
|
||||
scale = symbol_get_value_expression (e->X_op_symbol);
|
||||
|
||||
if (ret)
|
||||
ret = i386_intel_simplify_symbol (e->X_op_symbol);
|
||||
if (ret && !scale && intel_state.index)
|
||||
scale = symbol_get_value_expression (e->X_add_symbol);
|
||||
|
||||
if (ret && scale && (scale + 1))
|
||||
{
|
||||
resolve_expression (scale);
|
||||
if (scale->X_op != O_constant
|
||||
|| intel_state.index->reg_type.bitfield.reg16)
|
||||
scale->X_add_number = 0;
|
||||
intel_state.scale_factor *= scale->X_add_number;
|
||||
}
|
||||
|
||||
--intel_state.in_scale;
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
if (!intel_state.in_scale)
|
||||
switch (intel_state.scale_factor)
|
||||
{
|
||||
case 1:
|
||||
i.log2_scale_factor = 0;
|
||||
break;
|
||||
case 2:
|
||||
i.log2_scale_factor = 1;
|
||||
break;
|
||||
case 4:
|
||||
i.log2_scale_factor = 2;
|
||||
break;
|
||||
case 8:
|
||||
i.log2_scale_factor = 3;
|
||||
break;
|
||||
default:
|
||||
/* esp is invalid as index */
|
||||
intel_state.index = i386_regtab + REGNAM_EAX + 4;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
if (e->X_add_symbol && !i386_intel_simplify_symbol (e->X_add_symbol))
|
||||
return 0;
|
||||
if (e->X_op == O_add || e->X_op == O_subtract)
|
||||
{
|
||||
base = intel_state.base;
|
||||
index = intel_state.index;
|
||||
}
|
||||
if (!i386_intel_check (reg, base, index)
|
||||
|| (e->X_op_symbol && !i386_intel_simplify_symbol (e->X_op_symbol))
|
||||
|| !i386_intel_check (reg,
|
||||
e->X_op != O_add ? base : intel_state.base,
|
||||
e->X_op != O_add ? index : intel_state.index))
|
||||
return 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (this_operand >= 0 && e->X_op == O_symbol && !intel_state.in_offset)
|
||||
{
|
||||
segT seg = S_GET_SEGMENT (e->X_add_symbol);
|
||||
|
||||
if (seg != absolute_section
|
||||
&& seg != reg_section
|
||||
&& seg != expr_section)
|
||||
intel_state.is_mem |= 2 - !intel_state.in_bracket;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int i386_need_index_operator (void)
|
||||
{
|
||||
return intel_syntax < 0;
|
||||
}
|
||||
|
||||
static int
|
||||
i386_intel_operand (char *operand_string, int got_a_float)
|
||||
{
|
||||
char *saved_input_line_pointer, *buf;
|
||||
segT exp_seg;
|
||||
expressionS exp, *expP;
|
||||
char suffix = 0;
|
||||
int ret;
|
||||
|
||||
/* Initialize state structure. */
|
||||
intel_state.op_modifier = O_absent;
|
||||
intel_state.is_mem = 0;
|
||||
intel_state.base = NULL;
|
||||
intel_state.index = NULL;
|
||||
intel_state.seg = NULL;
|
||||
operand_type_set (&intel_state.reloc_types, ~0);
|
||||
assert (!intel_state.in_offset);
|
||||
assert (!intel_state.in_bracket);
|
||||
assert (!intel_state.in_scale);
|
||||
|
||||
saved_input_line_pointer = input_line_pointer;
|
||||
input_line_pointer = buf = xstrdup (operand_string);
|
||||
|
||||
intel_syntax = -1;
|
||||
memset (&exp, 0, sizeof(exp));
|
||||
exp_seg = expression (&exp);
|
||||
ret = i386_intel_simplify (&exp);
|
||||
intel_syntax = 1;
|
||||
|
||||
SKIP_WHITESPACE ();
|
||||
if (!is_end_of_line[(unsigned char) *input_line_pointer])
|
||||
{
|
||||
as_bad (_("junk `%s' after expression"), input_line_pointer);
|
||||
ret = 0;
|
||||
}
|
||||
else if (exp.X_op == O_illegal || exp.X_op == O_absent)
|
||||
{
|
||||
as_bad (_("invalid expression"));
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
input_line_pointer = saved_input_line_pointer;
|
||||
free (buf);
|
||||
|
||||
assert (!intel_state.in_offset);
|
||||
assert (!intel_state.in_bracket);
|
||||
assert (!intel_state.in_scale);
|
||||
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
if (intel_state.op_modifier != O_absent
|
||||
&& current_templates->start->base_opcode != 0x8d /* lea */)
|
||||
{
|
||||
i.types[this_operand].bitfield.unspecified = 0;
|
||||
|
||||
switch (intel_state.op_modifier)
|
||||
{
|
||||
case O_byte_ptr:
|
||||
i.types[this_operand].bitfield.byte = 1;
|
||||
suffix = BYTE_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_word_ptr:
|
||||
i.types[this_operand].bitfield.word = 1;
|
||||
if ((current_templates->start->name[0] == 'l'
|
||||
&& current_templates->start->name[2] == 's'
|
||||
&& current_templates->start->name[3] == 0)
|
||||
|| current_templates->start->base_opcode == 0x62 /* bound */)
|
||||
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
||||
else if (got_a_float == 2) /* "fi..." */
|
||||
suffix = SHORT_MNEM_SUFFIX;
|
||||
else
|
||||
suffix = WORD_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_dword_ptr:
|
||||
i.types[this_operand].bitfield.dword = 1;
|
||||
if ((current_templates->start->name[0] == 'l'
|
||||
&& current_templates->start->name[2] == 's'
|
||||
&& current_templates->start->name[3] == 0)
|
||||
|| current_templates->start->base_opcode == 0x62 /* bound */)
|
||||
suffix = WORD_MNEM_SUFFIX;
|
||||
else if (flag_code == CODE_16BIT
|
||||
&& (current_templates->start->opcode_modifier.jump
|
||||
|| current_templates->start->opcode_modifier.jumpdword))
|
||||
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
||||
else if (got_a_float == 1) /* "f..." */
|
||||
suffix = SHORT_MNEM_SUFFIX;
|
||||
else
|
||||
suffix = LONG_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_fword_ptr:
|
||||
i.types[this_operand].bitfield.fword = 1;
|
||||
if (current_templates->start->name[0] == 'l'
|
||||
&& current_templates->start->name[2] == 's'
|
||||
&& current_templates->start->name[3] == 0)
|
||||
suffix = LONG_MNEM_SUFFIX;
|
||||
else if (!got_a_float)
|
||||
{
|
||||
if (flag_code == CODE_16BIT)
|
||||
add_prefix (DATA_PREFIX_OPCODE);
|
||||
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
||||
}
|
||||
else
|
||||
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
||||
break;
|
||||
|
||||
case O_qword_ptr:
|
||||
i.types[this_operand].bitfield.qword = 1;
|
||||
if (current_templates->start->base_opcode == 0x62 /* bound */
|
||||
|| got_a_float == 1) /* "f..." */
|
||||
suffix = LONG_MNEM_SUFFIX;
|
||||
else
|
||||
suffix = QWORD_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_tbyte_ptr:
|
||||
i.types[this_operand].bitfield.tbyte = 1;
|
||||
if (got_a_float == 1)
|
||||
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
||||
else
|
||||
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
||||
break;
|
||||
|
||||
case O_oword_ptr:
|
||||
case O_xmmword_ptr:
|
||||
i.types[this_operand].bitfield.xmmword = 1;
|
||||
suffix = XMMWORD_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_ymmword_ptr:
|
||||
i.types[this_operand].bitfield.ymmword = 1;
|
||||
suffix = YMMWORD_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
case O_far_ptr:
|
||||
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
||||
/* FALLTHROUGH */
|
||||
case O_near_ptr:
|
||||
if (!current_templates->start->opcode_modifier.jump
|
||||
&& !current_templates->start->opcode_modifier.jumpdword)
|
||||
suffix = got_a_float /* so it will cause an error */
|
||||
? BYTE_MNEM_SUFFIX
|
||||
: LONG_DOUBLE_MNEM_SUFFIX;
|
||||
break;
|
||||
|
||||
default:
|
||||
BAD_CASE (intel_state.op_modifier);
|
||||
break;
|
||||
}
|
||||
|
||||
if (!i.suffix)
|
||||
i.suffix = suffix;
|
||||
else if (i.suffix != suffix)
|
||||
{
|
||||
as_bad (_("conflicting operand size modifiers"));
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Operands for jump/call need special consideration. */
|
||||
if (current_templates->start->opcode_modifier.jump
|
||||
|| current_templates->start->opcode_modifier.jumpdword
|
||||
|| current_templates->start->opcode_modifier.jumpintersegment)
|
||||
{
|
||||
if (i.op[this_operand].regs || intel_state.base || intel_state.index
|
||||
|| intel_state.is_mem > 1)
|
||||
i.types[this_operand].bitfield.jumpabsolute = 1;
|
||||
else
|
||||
switch (intel_state.op_modifier)
|
||||
{
|
||||
case O_near_ptr:
|
||||
if (intel_state.seg)
|
||||
i.types[this_operand].bitfield.jumpabsolute = 1;
|
||||
else
|
||||
intel_state.is_mem = 1;
|
||||
break;
|
||||
case O_far_ptr:
|
||||
case O_absent:
|
||||
if (!intel_state.seg)
|
||||
{
|
||||
intel_state.is_mem = 1;
|
||||
if (intel_state.op_modifier == O_absent)
|
||||
break;
|
||||
as_bad (_("cannot infer the segment part of the operand"));
|
||||
return 0;
|
||||
}
|
||||
else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
|
||||
i.types[this_operand].bitfield.jumpabsolute = 1;
|
||||
else
|
||||
{
|
||||
i386_operand_type types;
|
||||
|
||||
if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
|
||||
{
|
||||
as_bad (_("at most %d immediate operands are allowed"),
|
||||
MAX_IMMEDIATE_OPERANDS);
|
||||
return 0;
|
||||
}
|
||||
expP = &im_expressions[i.imm_operands++];
|
||||
memset (expP, 0, sizeof(*expP));
|
||||
expP->X_op = O_symbol;
|
||||
expP->X_add_symbol = intel_state.seg;
|
||||
i.op[this_operand].imms = expP;
|
||||
|
||||
resolve_expression (expP);
|
||||
operand_type_set (&types, ~0);
|
||||
if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
|
||||
expP, types, operand_string))
|
||||
return 0;
|
||||
if (i.operands < MAX_OPERANDS)
|
||||
{
|
||||
this_operand = i.operands++;
|
||||
i.types[this_operand].bitfield.unspecified = 1;
|
||||
}
|
||||
if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
|
||||
i.suffix = 0;
|
||||
intel_state.seg = NULL;
|
||||
intel_state.is_mem = 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
i.types[this_operand].bitfield.jumpabsolute = 1;
|
||||
break;
|
||||
}
|
||||
if (i.types[this_operand].bitfield.jumpabsolute)
|
||||
intel_state.is_mem |= 1;
|
||||
}
|
||||
else if (intel_state.seg)
|
||||
intel_state.is_mem |= 1;
|
||||
|
||||
if (i.op[this_operand].regs)
|
||||
{
|
||||
i386_operand_type temp;
|
||||
|
||||
/* Register operand. */
|
||||
if (intel_state.base || intel_state.index || intel_state.seg)
|
||||
{
|
||||
as_bad (_("invalid operand"));
|
||||
return 0;
|
||||
}
|
||||
|
||||
temp = i.op[this_operand].regs->reg_type;
|
||||
temp.bitfield.baseindex = 0;
|
||||
i.types[this_operand] = operand_type_or (i.types[this_operand], temp);
|
||||
i.types[this_operand].bitfield.unspecified = 0;
|
||||
++i.reg_operands;
|
||||
}
|
||||
else if (intel_state.base || intel_state.index || intel_state.seg
|
||||
|| intel_state.is_mem)
|
||||
{
|
||||
/* Memory operand. */
|
||||
if (i.mem_operands
|
||||
>= 2 - !current_templates->start->opcode_modifier.isstring)
|
||||
{
|
||||
as_bad (_("too many memory references for `%s'"),
|
||||
current_templates->start->name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
expP = &disp_expressions[i.disp_operands];
|
||||
memcpy (expP, &exp, sizeof(exp));
|
||||
resolve_expression (expP);
|
||||
|
||||
if (expP->X_op != O_constant || expP->X_add_number
|
||||
|| (!intel_state.base && !intel_state.index))
|
||||
{
|
||||
i.op[this_operand].disps = expP;
|
||||
i.disp_operands++;
|
||||
|
||||
if (flag_code == CODE_64BIT)
|
||||
{
|
||||
i.types[this_operand].bitfield.disp32 = 1;
|
||||
if (!i.prefix[ADDR_PREFIX])
|
||||
{
|
||||
i.types[this_operand].bitfield.disp64 = 1;
|
||||
i.types[this_operand].bitfield.disp32s = 1;
|
||||
}
|
||||
}
|
||||
else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
|
||||
i.types[this_operand].bitfield.disp32 = 1;
|
||||
else
|
||||
i.types[this_operand].bitfield.disp16 = 1;
|
||||
|
||||
#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
|
||||
/*
|
||||
* exp_seg is used only for verification in
|
||||
* i386_finalize_displacement, and we can end up seeing reg_section
|
||||
* here - but we know we removed all registers from the expression
|
||||
* (or error-ed on any remaining ones) in i386_intel_simplify. I
|
||||
* consider the check in i386_finalize_displacement bogus anyway, in
|
||||
* particular because it doesn't allow for expr_section, so I'd
|
||||
* rather see that check (and the similar one in
|
||||
* i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
|
||||
* expert I can't really say whether that would have other bad side
|
||||
* effects.
|
||||
*/
|
||||
if (OUTPUT_FLAVOR == bfd_target_aout_flavour
|
||||
&& exp_seg == reg_section)
|
||||
exp_seg = expP->X_op != O_constant ? undefined_section
|
||||
: absolute_section;
|
||||
#endif
|
||||
|
||||
if (!i386_finalize_displacement (exp_seg, expP,
|
||||
intel_state.reloc_types,
|
||||
operand_string))
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (intel_state.base || intel_state.index)
|
||||
i.types[this_operand].bitfield.baseindex = 1;
|
||||
|
||||
if (intel_state.seg)
|
||||
{
|
||||
for (;;)
|
||||
{
|
||||
expP = symbol_get_value_expression (intel_state.seg);
|
||||
if (expP->X_op != O_full_ptr)
|
||||
break;
|
||||
intel_state.seg = expP->X_add_symbol;
|
||||
}
|
||||
if (expP->X_op != O_register)
|
||||
{
|
||||
as_bad (_("segment register name expected"));
|
||||
return 0;
|
||||
}
|
||||
if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2
|
||||
&& !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3)
|
||||
{
|
||||
as_bad (_("invalid use of register"));
|
||||
return 0;
|
||||
}
|
||||
switch (i386_regtab[expP->X_add_number].reg_num)
|
||||
{
|
||||
case 0: i.seg[i.mem_operands] = &es; break;
|
||||
case 1: i.seg[i.mem_operands] = &cs; break;
|
||||
case 2: i.seg[i.mem_operands] = &ss; break;
|
||||
case 3: i.seg[i.mem_operands] = &ds; break;
|
||||
case 4: i.seg[i.mem_operands] = &fs; break;
|
||||
case 5: i.seg[i.mem_operands] = &gs; break;
|
||||
case RegFlat: i.seg[i.mem_operands] = NULL; break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Swap base and index in 16-bit memory operands like
|
||||
[si+bx]. Since i386_index_check is also used in AT&T
|
||||
mode we have to do that here. */
|
||||
if (intel_state.base
|
||||
&& intel_state.index
|
||||
&& intel_state.base->reg_type.bitfield.reg16
|
||||
&& intel_state.index->reg_type.bitfield.reg16
|
||||
&& intel_state.base->reg_num >= 6
|
||||
&& intel_state.index->reg_num < 6)
|
||||
{
|
||||
i.base_reg = intel_state.index;
|
||||
i.index_reg = intel_state.base;
|
||||
}
|
||||
else
|
||||
{
|
||||
i.base_reg = intel_state.base;
|
||||
i.index_reg = intel_state.index;
|
||||
}
|
||||
|
||||
if (!i386_index_check (operand_string))
|
||||
return 0;
|
||||
|
||||
i.types[this_operand].bitfield.mem = 1;
|
||||
++i.mem_operands;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Immediate. */
|
||||
if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
|
||||
{
|
||||
as_bad (_("at most %d immediate operands are allowed"),
|
||||
MAX_IMMEDIATE_OPERANDS);
|
||||
return 0;
|
||||
}
|
||||
|
||||
expP = &im_expressions[i.imm_operands++];
|
||||
i.op[this_operand].imms = expP;
|
||||
*expP = exp;
|
||||
|
||||
return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
|
||||
operand_string);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
1447
gas/config/tc-i386.c
1447
gas/config/tc-i386.c
File diff suppressed because it is too large
Load Diff
@ -157,6 +157,12 @@ extern int tc_i386_fix_adjustable (struct fix *);
|
||||
extern int i386_parse_name (char *, expressionS *, char *);
|
||||
#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c)
|
||||
|
||||
extern operatorT i386_operator (const char *name, unsigned int operands, char *);
|
||||
#define md_operator i386_operator
|
||||
|
||||
extern int i386_need_index_operator (void);
|
||||
#define md_need_index_operator i386_need_index_operator
|
||||
|
||||
#define md_register_arithmetic 0
|
||||
|
||||
extern const struct relax_type md_relax_table[];
|
||||
@ -281,4 +287,7 @@ void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
|
||||
|
||||
#endif /* TE_PE */
|
||||
|
||||
/* X_add_symbol:X_op_symbol (Intel mode only) */
|
||||
#define O_full_ptr O_md2
|
||||
|
||||
#endif /* TC_I386 */
|
||||
|
||||
@ -1,3 +1,26 @@
|
||||
2009-04-20 Jan Beulich <jbeulich@novell.com>
|
||||
|
||||
* gas/i386/equ.s: Adjust.
|
||||
* gas/i386/equ.d: Remove reference to equ.e.
|
||||
* gas/i386/equ.e: Delete.
|
||||
* gas/i386/intel-expr.s: New.
|
||||
* gas/i386/intel-expr.d: New.
|
||||
* gas/i386/i386.exp: Run new test.
|
||||
* gas/i386/intel.s: Adjust.
|
||||
* gas/i386/intel.e: Remove no longer valid warning messages.
|
||||
* gas/i386/intel16.s: Adjust.
|
||||
* gas/i386/intel16.d: Remove reference to intel16.e.
|
||||
* gas/i386/intel16.e: Delete.
|
||||
* gas/i386/intelbad.s: Add more tests.
|
||||
* gas/i386/intelbad.l: Adjust.
|
||||
* gas/i386/intelok.s: Remove now unneeded equates. Add more
|
||||
tests.
|
||||
* gas/i386/intelok.d: Remove reference to intelok.e. Adjust.
|
||||
* gas/i386/intelok.e: Delete.
|
||||
* gas/i386/x86_64.s: Adjust.
|
||||
* gas/i386/x86_64.d: Remove reference to x86_64.e.
|
||||
* gas/i386/x86_64.e: Delete.
|
||||
|
||||
2009-04-16 Alan Modra <amodra@bigpond.net.au>
|
||||
|
||||
* gas/all/gas.exp: Disable assign and assign-ok tests on blackfin.
|
||||
|
||||
@ -1,6 +1,5 @@
|
||||
#objdump: -drw
|
||||
#name: i386 equates
|
||||
#stderr: equ.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
@ -1,2 +0,0 @@
|
||||
.*: Assembler messages:
|
||||
.*:30: Warning: Treating .* as memory reference
|
||||
@ -27,7 +27,7 @@ _start:
|
||||
.equ r, -2
|
||||
.equ s, -2
|
||||
mov eax, r
|
||||
mov eax, [r]
|
||||
mov eax, FLAT:[r]
|
||||
.equ r, xtrn
|
||||
mov eax, offset r
|
||||
mov eax, [r]
|
||||
|
||||
@ -197,6 +197,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
|
||||
}
|
||||
|
||||
if [expr [istarget "i*86-*-*"] || [istarget "x86_64-*-*"]] then {
|
||||
run_dump_test "intel-expr"
|
||||
run_dump_test "string-ok"
|
||||
run_list_test "string-bad" ""
|
||||
}
|
||||
|
||||
@ -1,10 +1,4 @@
|
||||
.*: Assembler messages:
|
||||
.*:154: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:155: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:156: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:157: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:494: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:495: Warning: Treating `\[0x90909090\]' as memory reference
|
||||
.*:635: Warning: translating to `faddp'
|
||||
.*:644: Warning: translating to `fdivp'
|
||||
.*:653: Warning: translating to `fdivp st\(3\),st'
|
||||
|
||||
@ -145,16 +145,16 @@ foo:
|
||||
xchg edi, eax
|
||||
cwde
|
||||
cdq
|
||||
call 0x9090,0x90909090
|
||||
call 0x9090:0x90909090
|
||||
fwait
|
||||
pushf
|
||||
popf
|
||||
sahf
|
||||
lahf
|
||||
mov al, [0x90909090]
|
||||
mov eax, [0x90909090]
|
||||
mov [0x90909090], al
|
||||
mov [0x90909090], eax
|
||||
mov al, FLAT:[0x90909090]
|
||||
mov eax, FLAT:[0x90909090]
|
||||
mov FLAT:[0x90909090], al
|
||||
mov FLAT:[0x90909090], eax
|
||||
movs byte ptr es:[edi], byte ptr ds:[esi]
|
||||
movs dword ptr es:[edi], dword ptr ds:[esi]
|
||||
cmps byte ptr ds:[esi], byte ptr es:[edi]
|
||||
@ -226,7 +226,7 @@ foo:
|
||||
out 0x90, eax
|
||||
call .+5+0x90909090
|
||||
jmp .+5+0x90909090
|
||||
jmp 0x9090,0x90909090
|
||||
jmp 0x9090:0x90909090
|
||||
jmp .+2-0x70
|
||||
in al, dx
|
||||
in eax, dx
|
||||
@ -488,11 +488,11 @@ foo:
|
||||
xchg di, ax
|
||||
cbw
|
||||
cwd
|
||||
callw 0x9090,0x9090
|
||||
callw 0x9090:0x9090
|
||||
pushfw
|
||||
popfw
|
||||
mov ax, [0x90909090]
|
||||
mov [0x90909090], ax
|
||||
mov ax, FLAT:[0x90909090]
|
||||
mov FLAT:[0x90909090], ax
|
||||
movs word ptr es:[edi], word ptr ds:[esi]
|
||||
cmps word ptr ds:[esi], word ptr es:[edi]
|
||||
test ax, 0x9090
|
||||
@ -525,7 +525,7 @@ foo:
|
||||
in ax, 0x90
|
||||
out 0x90, ax
|
||||
callw .+3+0x9090
|
||||
jmpw 0x9090,0x9090
|
||||
jmpw 0x9090:0x9090
|
||||
in ax, dx
|
||||
out dx, ax
|
||||
not word ptr 0x90909090[eax]
|
||||
@ -599,7 +599,7 @@ rot5:
|
||||
mov eax, [ebx*2]
|
||||
adc BYTE PTR [eax*4+0x90909090], dl
|
||||
das
|
||||
jmp 0x9090,0x90909090
|
||||
jmp 0x9090:0x90909090
|
||||
movs WORD PTR es:[edi], WORD PTR ds:[esi]
|
||||
jo .+2-0x70
|
||||
|
||||
@ -617,7 +617,7 @@ rot5:
|
||||
mov ax, word ptr [ebx+2*eax+(2*(4095+1)*2)]
|
||||
jmp eax
|
||||
jmp [eax]
|
||||
jmp [bar]
|
||||
jmp FLAT:[bar]
|
||||
jmp bar
|
||||
|
||||
# Check arithmetic operators
|
||||
|
||||
@ -1,6 +1,5 @@
|
||||
#objdump: -dw -mi8086
|
||||
#name: i386 intel16
|
||||
#stderr: intel16.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
@ -1,7 +0,0 @@
|
||||
.*: Assembler messages:
|
||||
.*:5: Warning: Treating .word ptr \[0\]. as memory reference
|
||||
.*:6: Warning: Treating .byte ptr \[0\]. as memory reference
|
||||
.*:7: Warning: Treating .byte ptr \[0\]. as memory reference
|
||||
.*:8: Warning: Treating .word ptr \[0\]. as memory reference
|
||||
.*:9: Warning: Treating .byte ptr \[0\]. as memory reference
|
||||
.*:10: Warning: Treating .byte ptr \[0\]. as memory reference
|
||||
@ -2,12 +2,12 @@
|
||||
.code16
|
||||
.text
|
||||
|
||||
movsx eax,word ptr [0]
|
||||
movsx eax,byte ptr [0]
|
||||
movsx ax,byte ptr [0]
|
||||
movzx eax,word ptr [0]
|
||||
movzx eax,byte ptr [0]
|
||||
movzx ax,byte ptr [0]
|
||||
movsx eax,word ptr ds:[0]
|
||||
movsx eax,byte ptr ds:[0]
|
||||
movsx ax,byte ptr ds:[0]
|
||||
movzx eax,word ptr ds:[0]
|
||||
movzx eax,byte ptr ds:[0]
|
||||
movzx ax,byte ptr ds:[0]
|
||||
|
||||
lea ax, [si+bx]
|
||||
lea ax, [si+bp]
|
||||
|
||||
@ -76,8 +76,9 @@
|
||||
.*:79: Error: .*
|
||||
.*:80: Error: .*
|
||||
.*:91: Error: .*
|
||||
.*:92: Error: .*
|
||||
.*:92: (Warning|Error): .*
|
||||
.*:93: Error: .*
|
||||
#...
|
||||
.*:96: Error: .*
|
||||
.*:97: Error: .*
|
||||
.*:98: Error: .*
|
||||
@ -99,6 +100,7 @@
|
||||
.*:114: Error: .*
|
||||
.*:115: Error: .*
|
||||
.*:116: Error: .*
|
||||
#...
|
||||
.*:117: Error: .*
|
||||
.*:119: Error: .*
|
||||
.*:120: Error: .*
|
||||
@ -131,18 +133,23 @@
|
||||
.*:151: Error: .*
|
||||
.*:152: Error: .*
|
||||
.*:153: Error: .*
|
||||
#...
|
||||
.*:154: Error: .*
|
||||
#...
|
||||
.*:155: Error: .*
|
||||
.*:156: Error: .*
|
||||
.*:157: Error: .*
|
||||
.*:158: Error: .*
|
||||
#XXX? .*:157: Error: .*
|
||||
#XXX? .*:158: Error: .*
|
||||
.*:159: Error: .*
|
||||
#...
|
||||
.*:160: Error: .*
|
||||
.*:161: Error: .*
|
||||
.*:162: Error: .*
|
||||
.*:163: Warning: .*
|
||||
.*:164: Warning: .*
|
||||
.*:163: Error: .*
|
||||
.*:164: Error: .*
|
||||
.*:165: Error: .*
|
||||
.*:166: Error: .*
|
||||
.*:167: Warning: .*
|
||||
#...
|
||||
.*:167: Error: .*
|
||||
.*:168: Error: .*
|
||||
.*:169: Error: .*
|
||||
.*:170: Error: .*
|
||||
.*:172: Error: .*
|
||||
|
||||
@ -149,19 +149,24 @@ start:
|
||||
mov eax, [ah]
|
||||
mov eax, [ax]
|
||||
mov eax, [eax+bx]
|
||||
mov eax, offset [1*eax]
|
||||
mov eax, offset 1*eax
|
||||
mov eax, offset x[eax] # ugly diag
|
||||
mov eax, offset [x][eax] # ugly diag
|
||||
mov eax, flat x
|
||||
mov eax, flat [x]
|
||||
mov eax, es:eax
|
||||
|
||||
mov eax, offset [eax]
|
||||
mov eax, offset eax
|
||||
mov eax, offset offset eax
|
||||
mov eax, es:ss:[eax]
|
||||
mov eax, es:[eax]+ss:[eax]
|
||||
mov eax, offset [1*eax]
|
||||
mov eax, offset 1*eax
|
||||
#XXX? mov eax, offset x[eax]
|
||||
#XXX? mov eax, offset [x][eax]
|
||||
mov eax, flat x
|
||||
mov eax, flat [x]
|
||||
mov eax, es:eax
|
||||
mov eax, eax[ebp]
|
||||
movzx eax, 1 ptr [eax]
|
||||
movzx eax, byte word ptr [eax]
|
||||
movzx eax, [byte ptr eax]
|
||||
movzx eax, byte [ptr [eax]]
|
||||
movzx eax, byte ptr [gs:eax]
|
||||
movzx eax, byte gs:ptr [eax]
|
||||
movzx eax, byte ptr 1
|
||||
movzx eax, byte ptr [1]
|
||||
|
||||
mov eax, 3:5
|
||||
call 3:[5]
|
||||
|
||||
@ -1,7 +1,6 @@
|
||||
#as: -J --divide
|
||||
#objdump: -dwMintel
|
||||
#name: i386 intel-ok
|
||||
#stderr: intelok.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
@ -108,6 +107,19 @@ Disassembly of section .text:
|
||||
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+0x12\]
|
||||
[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
|
||||
[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
|
||||
[ ]*[0-9a-f]+: 0f b7 00[ ]+movzx[ ]+eax,WORD PTR \[eax\]
|
||||
[ ]*[0-9a-f]+: 0f b6 00[ ]+movzx[ ]+eax,BYTE PTR \[eax\]
|
||||
[ ]*[0-9a-f]+: 26 0f b7 00[ ]+movzx[ ]+eax,WORD PTR es:\[eax\]
|
||||
[ ]*[0-9a-f]+: 64 0f b6 00[ ]+movzx[ ]+eax,BYTE PTR fs:\[eax\]
|
||||
[ ]*[0-9a-f]+: 65 0f b7 00[ ]+movzx[ ]+eax,WORD PTR gs:\[eax\]
|
||||
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:(0x)?1
|
||||
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:(0x)?1
|
||||
[ ]*[0-9a-f]+: 65 a1 01 00 00 00[ ]+mov[ ]+eax,gs:(0x)?1
|
||||
[ ]*[0-9a-f]+: 65 a1 01 00 00 00[ ]+mov[ ]+eax,gs:(0x)?1
|
||||
[ ]*[0-9a-f]+: a1 00 00 00 00[ ]+mov[ ]+eax,ds:(0x)?0
|
||||
[ ]*[0-9a-f]+: a1 00 00 00 00[ ]+mov[ ]+eax,ds:(0x)?0
|
||||
[ ]*[0-9a-f]+: 65 a1 00 00 00 00[ ]+mov[ ]+eax,gs:(0x)?0
|
||||
[ ]*[0-9a-f]+: a1 00 00 00 00[ ]+mov[ ]+eax,ds:(0x)?0
|
||||
[ ]*[0-9a-f]+: 8b 04 05 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*1\+(0x)?0]
|
||||
[ ]*[0-9a-f]+: 8b 04 05 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*1\+(0x)?0]
|
||||
[ ]*[0-9a-f]+: 8b 04 05 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*1\+(0x)?0]
|
||||
@ -123,15 +135,20 @@ Disassembly of section .text:
|
||||
[ ]*[0-9a-f]+: 8b 40 10[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+0x10\]
|
||||
[ ]*[0-9a-f]+: 8b 40 10[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+0x10\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 10[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+0x10\]
|
||||
[ ]*[0-9a-f]+: 8b 04 08[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 02[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?2\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 03[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?3\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 04[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?4\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 05[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?5\]
|
||||
[ ]*[0-9a-f]+: 8b 44 08 06[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\+(0x)?6\]
|
||||
[ ]*[0-9a-f]+: 8b 44 88 07[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*4\+(0x)?7\]
|
||||
[ ]*[0-9a-f]+: 8b 44 88 08[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*4\+(0x)?8\]
|
||||
[ ]*[0-9a-f]+: 8b 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
|
||||
[ ]*[0-9a-f]+: 8b 04 08[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\]
|
||||
[ ]*[0-9a-f]+: 8b 04 08[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\*1\]
|
||||
[ ]*[0-9a-f]+: 26 8b 00[ ]+mov[ ]+eax,(DWORD PTR )?es:\[eax\]
|
||||
[ ]*[0-9a-f]+: 64 8b 00[ ]+mov[ ]+eax,(DWORD PTR )?fs:\[eax\]
|
||||
[ ]*[0-9a-f]+: 6a 01[ ]+push[ ]+0x1
|
||||
[ ]*[0-9a-f]+: 6a ff[ ]+push[ ]+0xffffffff
|
||||
[ ]*[0-9a-f]+: 6a fe[ ]+push[ ]+0xfffffffe
|
||||
@ -151,31 +168,40 @@ Disassembly of section .text:
|
||||
[ ]*[0-9a-f]+: 6a fb[ ]+push[ ]+0xfffffffb
|
||||
[ ]*[0-9a-f]+: 6a 03[ ]+push[ ]+0x3
|
||||
[ ]*[0-9a-f]+: 6a 04[ ]+push[ ]+0x4
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
|
||||
[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
|
||||
[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
|
||||
[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
|
||||
[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: a1 00 00 00 00[ ]+mov[ ]+eax,ds:(0x)?0
|
||||
[ ]*[0-9a-f]+: 65 a1 00 00 00 00[ ]+mov[ ]+eax,gs:(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
|
||||
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
|
||||
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1]
|
||||
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
|
||||
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1]
|
||||
[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
|
||||
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
|
||||
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:0x1
|
||||
[ ]*[0-9a-f]+: a1 ff ff ff ff[ ]+mov[ ]+eax,ds:0xffffffff
|
||||
[ ]*[0-9a-f]+: 26 a1 02 00 00 00[ ]+mov[ ]+eax,es:0x2
|
||||
#...
|
||||
[ ]*[0-9a-f]+: b8 03 00 00 00[ ]+mov[ ]+eax,0x3
|
||||
[ ]*[0-9a-f]+: a1 04 00 00 00[ ]+mov[ ]+eax,ds:0x4
|
||||
[ ]*[0-9a-f]+: a1 05 00 00 00[ ]+mov[ ]+eax,ds:0x5
|
||||
[ ]*[0-9a-f]+: 36 a1 06 00 00 00[ ]+mov[ ]+eax,ss:0x6
|
||||
[ ]*[0-9a-f]+: 36 a1 07 00 00 00[ ]+mov[ ]+eax,ss:0x7
|
||||
[ ]*[0-9a-f]+: a1 08 00 00 00[ ]+mov[ ]+eax,ds:0x8
|
||||
[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
|
||||
[ ]*[0-9a-f]+: b8 ff ff ff ff[ ]+mov[ ]+eax,(0xffffffff|-1)
|
||||
[ ]*[0-9a-f]+: 26 a1 02 00 00 00[ ]+mov[ ]+eax,es:(0x)?2
|
||||
[ ]*[0-9a-f]+: b8 03 00 00 00[ ]+mov[ ]+eax,(0x)?3
|
||||
[ ]*[0-9a-f]+: b8 04 00 00 00[ ]+mov[ ]+eax,(0x)?4
|
||||
[ ]*[0-9a-f]+: b8 05 00 00 00[ ]+mov[ ]+eax,(0x)?5
|
||||
[ ]*[0-9a-f]+: 36 a1 06 00 00 00[ ]+mov[ ]+eax,ss:(0x)?6
|
||||
[ ]*[0-9a-f]+: 36 a1 07 00 00 00[ ]+mov[ ]+eax,ss:(0x)?7
|
||||
[ ]*[0-9a-f]+: 9a 05 00 00 00 03 00[ ]+l?call[ ]+0x3[,:]0x5
|
||||
[ ]*[0-9a-f]+: ea 03 00 00 00 05 00[ ]+l?jmp[ ]+0x5[,:]0x3
|
||||
[ ]*[0-9a-f]+: ff 15 00 00 00 00[ ]+call[ ]+(DWORD PTR )?(ds:)?0x0
|
||||
[ ]*[0-9a-f]+: 66 ff 25 00 00 00 00[ ]+jmp[ ]+(WORD PTR )?(ds:)?0x0
|
||||
[ ]*[0-9a-f]+: ff 15 00 00 00 00[ ]+call[ ]+DWORD PTR (ds:)?(0x)?0
|
||||
[ ]*[0-9a-f]+: 66 ff 25 00 00 00 00[ ]+jmp[ ]+WORD PTR (ds:)?(0x)?0
|
||||
#pass
|
||||
|
||||
@ -1,8 +0,0 @@
|
||||
.*: Assembler messages:
|
||||
.*:175: Warning: .* taken to mean just .*
|
||||
.*:182: Warning: Treating .* as memory reference
|
||||
.*:183: Warning: .* taken to mean just .*
|
||||
.*:183: Warning: Treating .* as memory reference
|
||||
.*:186: Warning: Treating .* as memory reference
|
||||
.*:187: Warning: Treating .* as memory reference
|
||||
.*:190: Warning: Treating .* as memory reference
|
||||
@ -1,12 +1,4 @@
|
||||
.intel_syntax noprefix
|
||||
.equiv byte, 1
|
||||
.equiv word, 2
|
||||
.equiv dword, 4
|
||||
.equiv fword, 6
|
||||
.equiv qword, 8
|
||||
.equiv tbyte, 10
|
||||
.equiv oword, 16
|
||||
.equiv xmmword, 16
|
||||
.text
|
||||
start:
|
||||
|
||||
@ -115,6 +107,20 @@ start:
|
||||
mov eax, tbyte[eax+dword*2]
|
||||
mov eax, [word+eax*dword]
|
||||
mov eax, word[eax*dword]
|
||||
movzx eax, word ptr byte ptr [eax]
|
||||
movzx eax, byte ptr [word ptr [eax]]
|
||||
movzx eax, word ptr es:[eax]
|
||||
movzx eax, byte ptr [fs:[eax]]
|
||||
movzx eax, gs:word ptr [eax]
|
||||
|
||||
mov eax, FLAT:1
|
||||
mov eax, FLAT:[1]
|
||||
mov eax, gs:1
|
||||
mov eax, gs:[1]
|
||||
mov eax, x
|
||||
mov eax, FLAT:x
|
||||
mov eax, gs:x
|
||||
mov eax, [x]
|
||||
|
||||
mov eax, [eax*1]
|
||||
mov eax, [eax*+1]
|
||||
@ -127,19 +133,24 @@ start:
|
||||
mov eax, [eax]+1
|
||||
mov eax, [eax - 5 + ecx]
|
||||
mov eax, [eax + 5 and 3 + ecx]
|
||||
mov eax, [eax + 5*3 + ecx]
|
||||
mov eax, [eax + 5 * 3 + ecx]
|
||||
mov eax, [oword][eax]
|
||||
mov eax, [eax][oword]
|
||||
mov eax, xmmword[eax][ecx]
|
||||
mov eax, [eax]+[ecx]
|
||||
mov eax, [eax]+1[ecx]
|
||||
mov eax, [eax][ecx]+1
|
||||
mov eax, [1][eax][ecx]
|
||||
mov eax, [eax][1][ecx]
|
||||
mov eax, [eax][ecx][1]
|
||||
mov eax, [eax+2[ecx]]
|
||||
mov eax, [eax][ecx]+3
|
||||
mov eax, [4][eax][ecx]
|
||||
mov eax, [eax][5][ecx]
|
||||
mov eax, [eax][ecx][6]
|
||||
mov eax, [eax+ecx*(2+2)+7]
|
||||
mov eax, [eax+(ecx+2)*4]
|
||||
mov eax, [[eax]]
|
||||
mov eax, [eax[ecx]]
|
||||
mov eax, [[eax][ecx]]
|
||||
mov eax, es:[eax]
|
||||
mov eax, fs:gs:[eax]
|
||||
|
||||
# expressions
|
||||
|
||||
@ -166,6 +177,10 @@ start:
|
||||
|
||||
# offset expressions
|
||||
|
||||
mov eax, 1
|
||||
mov eax, [1]
|
||||
mov eax, dword ptr 1
|
||||
mov eax, dword ptr [1]
|
||||
mov eax, offset x
|
||||
mov eax, offset flat:x
|
||||
mov eax, offset gs:x
|
||||
@ -173,10 +188,17 @@ start:
|
||||
mov eax, offset flat:[x]
|
||||
mov eax, offset gs:[x]
|
||||
mov eax, [offset x]
|
||||
mov eax, [offset [x]]
|
||||
mov eax, dword ptr [offset [x]]
|
||||
mov eax, FLAT:[offset [x]]
|
||||
mov eax, gs:[offset [x]]
|
||||
mov eax, offset [dword ptr [x]]
|
||||
mov eax, offset [gs:[x]]
|
||||
mov eax, [eax + offset x]
|
||||
mov eax, [eax + offset 1]
|
||||
mov eax, [offset x + eax]
|
||||
mov eax, offset x+1[eax]
|
||||
mov eax, [offset 1 + eax]
|
||||
mov eax, offset x + 1[eax]
|
||||
mov eax, [eax] + offset x
|
||||
mov eax, [eax] + offset 1
|
||||
mov eax, offset x + [1]
|
||||
@ -187,11 +209,10 @@ start:
|
||||
mov eax, [5] + [offset x]
|
||||
mov eax, ss:[6] + offset x
|
||||
mov eax, ss:[7] + [offset x]
|
||||
mov eax, dword ptr [8]
|
||||
|
||||
# other operands
|
||||
call 3:5
|
||||
jmp 5:3
|
||||
jmp 5:[3]
|
||||
call dword ptr xtrn
|
||||
jmp word ptr xtrn
|
||||
|
||||
|
||||
@ -1,7 +1,6 @@
|
||||
#as: -J
|
||||
#objdump: -dw
|
||||
#name: x86_64
|
||||
#stderr: x86_64.e
|
||||
.*: +file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
@ -1,9 +0,0 @@
|
||||
.*.s: Assembler messages:
|
||||
.*:51: Warning: Treating .\[0x22222222\]. as memory reference
|
||||
.*:89: Warning: Treating .DWORD PTR \[0x22222222\]. as memory reference
|
||||
.*:91: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
.*:92: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
.*:93: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
.*:94: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
.*:95: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
.*:96: Warning: Treating .\[0x8877665544332211\]. as memory reference
|
||||
@ -48,7 +48,7 @@ ADD R8D,[R8]
|
||||
ADD RAX,[R8]
|
||||
ADD EAX,[0x22222222+RIP]
|
||||
ADD EAX,[RBP+0x00]
|
||||
ADD EAX,[0x22222222]
|
||||
ADD EAX,FLAT:[0x22222222]
|
||||
ADD EAX,[R13+0]
|
||||
ADD EAX,[RAX+RAX*4]
|
||||
ADD EAX,[R8+RAX*4]
|
||||
@ -86,14 +86,14 @@ ADD DWORD PTR [RAX*8+0x22222222],0x33
|
||||
ADD DWORD PTR [RAX+0x22222222],0x33
|
||||
ADD DWORD PTR [RAX+0x22222222],0x33
|
||||
ADD DWORD PTR [R8+RBP*8],0x33
|
||||
ADD DWORD PTR [0x22222222],0x33
|
||||
ADD DWORD PTR FLAT:[0x22222222],0x33
|
||||
#new instructions
|
||||
MOVABS AL,[0x8877665544332211]
|
||||
MOVABS EAX,[0x8877665544332211]
|
||||
MOVABS [0x8877665544332211],AL
|
||||
MOVABS [0x8877665544332211],EAX
|
||||
MOVABS RAX,[0x8877665544332211]
|
||||
MOVABS [0x8877665544332211],RAX
|
||||
MOVABS AL,FLAT:[0x8877665544332211]
|
||||
MOVABS EAX,FLAT:[0x8877665544332211]
|
||||
MOVABS FLAT:[0x8877665544332211],AL
|
||||
MOVABS FLAT:[0x8877665544332211],EAX
|
||||
MOVABS RAX,FLAT:[0x8877665544332211]
|
||||
MOVABS FLAT:[0x8877665544332211],RAX
|
||||
cqo
|
||||
cdqe
|
||||
movsx rax, eax
|
||||
|
||||
Loading…
Reference in New Issue
Block a user