Bye bye PPC_OPCODE_HTM and -mhtm
The -mhtm option is fairly useless too. include/ * opcode/ppc.h (PPC_OPCODE_HTM): Delete. gas/ * config/tc-ppc.c (md_show_usage): Delete mention of -mhtm. * testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8. opcodes/ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_HTM and "htm". * ppc-opc.c (PPCHTM): Define as PPC_OPCODE_POWER8.
This commit is contained in:
Alan Modra
parent
9570835e55
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ef85eab0ec
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@ -1,3 +1,8 @@
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2017-04-11 Alan Modra <amodra@gmail.com>
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* config/tc-ppc.c (md_show_usage): Delete mention of -mhtm.
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* testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8.
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2017-04-10 Max Filippov <jcmvbkbc@gmail.com>
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* config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag):
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@ -1346,7 +1346,6 @@ PowerPC options:\n\
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fprintf (stream, _("\
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-maltivec generate code for AltiVec\n\
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-mvsx generate code for Vector-Scalar (VSX) instructions\n\
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-mhtm generate code for Hardware Transactional Memory\n\
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-me300 generate code for PowerPC e300 family\n\
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-me500, -me500x2 generate code for Motorola e500 core complex\n\
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-me500mc, generate code for Freescale e500mc core complex\n\
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@ -1,5 +1,5 @@
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#as: -mhtm
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#objdump: -dr -Mhtm
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#as: -mpower8
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#objdump: -dr -Mpower8
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#name: Hardware Transactional Memory (HTM) tests
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.*
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@ -2,6 +2,7 @@
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* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
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(PPC_OPCODE_VSX3): Delete.
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(PPC_OPCODE_HTM): Delete.
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2017-04-06 Pip Cet <pipcet@gmail.com>
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@ -191,11 +191,6 @@ extern const int vle_num_opcodes;
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/* Opcode is only supported by Power8 architecture. */
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#define PPC_OPCODE_POWER8 0x2000000000ull
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/* Opcode which is supported by the Hardware Transactional Memory extension. */
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/* Currently, this is the same as the POWER8 mask. If another cpu comes out
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that isn't a superset of POWER8, we can define this to its own mask. */
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#define PPC_OPCODE_HTM PPC_OPCODE_POWER8
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/* Opcode is supported by ppc750cl. */
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#define PPC_OPCODE_750 0x4000000000ull
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@ -1,11 +1,12 @@
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2017-04-11 Alan Modra <amodra@gmail.com>
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* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2 and
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PPC_OPCODE_VSX3.
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* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2,
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PPC_OPCODE_VSX3, PPC_OPCODE_HTM and "htm".
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* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
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(PPCVEC3): Define as PPC_OPCODE_POWER9.
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(PPCVSX2): Define as PPC_OPCODE_POWER8.
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(PPCVSX3): Define as PPC_OPCODE_POWER9.
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(PPCHTM): Define as PPC_OPCODE_POWER8.
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2017-04-10 Alan Modra <amodra@gmail.com>
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@ -171,13 +171,13 @@ struct ppc_mopt ppc_opts[] = {
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0 },
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{ "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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0 },
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{ "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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0 },
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{ "ppc", PPC_OPCODE_PPC,
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0 },
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@ -214,13 +214,13 @@ struct ppc_mopt ppc_opts[] = {
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0 },
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{ "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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0 },
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{ "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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0 },
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{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
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0 },
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@ -238,8 +238,6 @@ struct ppc_mopt ppc_opts[] = {
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PPC_OPCODE_VLE },
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{ "vsx", PPC_OPCODE_PPC,
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PPC_OPCODE_VSX },
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{ "htm", PPC_OPCODE_PPC,
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PPC_OPCODE_HTM },
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};
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/* Switch between Booke and VLE dialects for interlinked dumps. */
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@ -3121,7 +3121,7 @@ extract_vleil (unsigned long insn,
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#define E500 PPC_OPCODE_E500
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#define E6500 PPC_OPCODE_E6500
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#define PPCVLE PPC_OPCODE_VLE
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#define PPCHTM PPC_OPCODE_HTM
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#define PPCHTM PPC_OPCODE_POWER8
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#define E200Z4 PPC_OPCODE_E200Z4
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/* The list of embedded processors that use the embedded operand ordering
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for the 3 operand dcbt and dcbtst instructions. */
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