gdb/
Fix size of FPSCR in Power 7 processors. * ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_linux_read_description): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR. gdbserver/ Fix size of FPSCR in Power 7 processors. * linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR.
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@ -1,3 +1,11 @@
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2009-03-25 Thiago Jung Bauermann <bauerman@br.ibm.com>
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Fix size of FPSCR in Power 7 processors.
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* ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define.
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(PPC_FEATURE_HAS_DFP): New #define.
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(ppc_linux_read_description): Check for DFP feature instead of
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ISA 2.05 to decide on size of the FPSCR.
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2009-03-25 Kevin Buettner <kevinb@redhat.com>
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* mn10300-tdep.c (trad-frame.h): Don't include.
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@ -1,3 +1,11 @@
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2009-03-25 Thiago Jung Bauermann <bauerman@br.ibm.com>
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Fix size of FPSCR in Power 7 processors.
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* linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define.
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(PPC_FEATURE_HAS_DFP): New #define.
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(ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on
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size of the FPSCR.
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2009-03-23 Pedro Alves <pedro@codesourcery.com>
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* server.c (handle_query) Whitespace and formatting.
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@ -28,7 +28,7 @@
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#define PPC_FEATURE_HAS_VSX 0x00000080
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#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
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#define PPC_FEATURE_HAS_SPE 0x00800000
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#define PPC_FEATURE_ARCH_2_05 0x00001000
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#define PPC_FEATURE_HAS_DFP 0x00000400
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static unsigned long ppc_hwcap;
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@ -274,14 +274,21 @@ ppc_arch_setup (void)
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ppc_get_hwcap (&ppc_hwcap);
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if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
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{
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if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
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/* Power ISA 2.05 (implemented by Power 6 and newer processors)
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increases the FPSCR from 32 bits to 64 bits. Even though Power 7
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supports this ISA version, it doesn't have PPC_FEATURE_ARCH_2_05
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set, only PPC_FEATURE_ARCH_2_06. Since for now the only bits
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used in the higher half of the register are for Decimal Floating
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Point, we check if that feature is available to decide the size
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of the FPSCR. */
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if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
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init_registers_powerpc_isa205_vsx64l ();
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else
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init_registers_powerpc_vsx64l ();
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}
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else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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{
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if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
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if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
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init_registers_powerpc_isa205_altivec64l ();
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else
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init_registers_powerpc_altivec64l ();
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@ -297,14 +304,14 @@ ppc_arch_setup (void)
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ppc_get_hwcap (&ppc_hwcap);
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if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
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{
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if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
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if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
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init_registers_powerpc_isa205_vsx32l ();
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else
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init_registers_powerpc_vsx32l ();
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}
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else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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{
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if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
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if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
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init_registers_powerpc_isa205_altivec32l ();
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else
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init_registers_powerpc_altivec32l ();
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@ -63,8 +63,8 @@
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#ifndef PPC_FEATURE_BOOKE
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#define PPC_FEATURE_BOOKE 0x00008000
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#endif
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#ifndef PPC_FEATURE_ARCH_2_05
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#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
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#ifndef PPC_FEATURE_HAS_DFP
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#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal Floating Point. */
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#endif
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/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
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@ -1290,7 +1290,13 @@ ppc_linux_read_description (struct target_ops *ops)
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perror_with_name (_("Unable to fetch AltiVec registers"));
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}
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if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05)
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/* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
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the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
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ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
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PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
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half of the register are for Decimal Floating Point, we check if that
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feature is available to decide the size of the FPSCR. */
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if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
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isa205 = 1;
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/* Check for 64-bit inferior process. This is the case when the host is
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