[GAS][AARCH64]Fix a typo for IP1 register alias.

This should be an obvious fix.
It corrects the register number for IP1 to 17.

gas/

2017-11-29  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reg_names): Fix IP1 register alias error.
	* testsuite/gas/aarch64/register_aliases.s: Add IP0 and IP1 tests.
	* testsuite/gas/aarch64/register_aliases.d: Update.
This commit is contained in:
Renlin Li 2017-11-29 16:00:47 +00:00
parent 4581a1c7d3
commit f10e937a1c
4 changed files with 12 additions and 2 deletions

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@ -1,3 +1,9 @@
2017-11-29 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reg_names): Fix IP1 register alias typo.
* testsuite/gas/aarch64/register_aliases.s: Add IP0 and IP1 tests.
* testsuite/gas/aarch64/register_aliases.d: Update.
2017-11-29 Stefan Stroe <stroestefan@gmail.com>
* po/Make-in (datadir): Define as @datadir@.

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@ -6804,7 +6804,7 @@ static const reg_entry reg_names[] = {
REGSET31 (w, R_32), REGSET31 (W, R_32),
REGDEF_ALIAS (ip0, 16, R_64), REGDEF_ALIAS (IP0, 16, R_64),
REGDEF_ALIAS (ip1, 17, R_64), REGDEF_ALIAS (IP1, 16, R_64),
REGDEF_ALIAS (ip1, 17, R_64), REGDEF_ALIAS (IP1, 17, R_64),
REGDEF_ALIAS (fp, 29, R_64), REGDEF_ALIAS (FP, 29, R_64),
REGDEF_ALIAS (lr, 30, R_64), REGDEF_ALIAS (LR, 30, R_64),
REGDEF (wsp, 31, SP_32), REGDEF (WSP, 31, SP_32),

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@ -7,4 +7,6 @@ Disassembly of section \.text:
0+ <.*>:
0: 8b1e0210 add x16, x16, x30
4: f90003b0 str x16, \[x29\]
8: f94003b1 ldr x17, \[x29\]
8: f94003b1 ldr x17, \[x29\]
c: f90003b0 str x16, \[x29\]
10: f94003b1 ldr x17, \[x29\]

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@ -6,4 +6,6 @@
add ip0, ip0, lr
str ip0, [fp]
ldr ip1, [fp]
str IP0, [fp]
ldr IP1, [fp]