sim/common: wire up new unordered comparisons
Define and wire up unordered floating point comparison operations for cgen targets. This patch depends on my posted cgen patches[0]. [0] https://www.sourceware.org/ml/cgen/2019-q2/msg00013.html sim/common/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * cgen-accfp.c (unorderedsf, unordereddf): New functions. (cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf. * cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.
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@ -1,3 +1,9 @@
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2019-06-13 Stafford Horne <shorne@gmail.com>
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* cgen-accfp.c (unorderedsf, unordereddf): New functions.
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(cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf.
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* cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.
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2019-06-13 Stafford Horne <shorne@gmail.com>
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2019-06-13 Stafford Horne <shorne@gmail.com>
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* cgen-accfp.c (floatdidf, fixdfdi): New functions.
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* cgen-accfp.c (floatdidf, fixdfdi): New functions.
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@ -303,6 +303,18 @@ gesf (CGEN_FPU* fpu, SF x, SF y)
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return sim_fpu_is_ge (&op1, &op2);
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return sim_fpu_is_ge (&op1, &op2);
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}
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}
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static int
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unorderedsf (CGEN_FPU* fpu, SF x, SF y)
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{
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sim_fpu op1;
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sim_fpu op2;
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sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
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}
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static DF
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static DF
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fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x)
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fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x)
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{
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{
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@ -703,6 +715,17 @@ gedf (CGEN_FPU* fpu, DF x, DF y)
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sim_fpu_64to (&op2, y);
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sim_fpu_64to (&op2, y);
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return sim_fpu_is_ge (&op1, &op2);
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return sim_fpu_is_ge (&op1, &op2);
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}
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}
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static int
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unordereddf (CGEN_FPU* fpu, DF x, DF y)
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{
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sim_fpu op1;
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sim_fpu op2;
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sim_fpu_64to (&op1, x);
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sim_fpu_64to (&op2, y);
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return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
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}
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/* Initialize FP_OPS to use accurate library. */
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/* Initialize FP_OPS to use accurate library. */
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@ -738,6 +761,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
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o->lesf = lesf;
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o->lesf = lesf;
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o->gtsf = gtsf;
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o->gtsf = gtsf;
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o->gesf = gesf;
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o->gesf = gesf;
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o->unorderedsf = unorderedsf;
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o->adddf = adddf;
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o->adddf = adddf;
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o->subdf = subdf;
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o->subdf = subdf;
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@ -757,6 +781,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
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o->ledf = ledf;
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o->ledf = ledf;
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o->gtdf = gtdf;
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o->gtdf = gtdf;
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o->gedf = gedf;
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o->gedf = gedf;
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o->unordereddf = unordereddf;
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o->fextsfdf = fextsfdf;
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o->fextsfdf = fextsfdf;
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o->ftruncdfsf = ftruncdfsf;
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o->ftruncdfsf = ftruncdfsf;
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o->floatsisf = floatsisf;
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o->floatsisf = floatsisf;
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@ -87,6 +87,7 @@ struct cgen_fp_ops {
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int (*lesf) (CGEN_FPU*, SF, SF);
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int (*lesf) (CGEN_FPU*, SF, SF);
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int (*gtsf) (CGEN_FPU*, SF, SF);
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int (*gtsf) (CGEN_FPU*, SF, SF);
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int (*gesf) (CGEN_FPU*, SF, SF);
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int (*gesf) (CGEN_FPU*, SF, SF);
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int (*unorderedsf) (CGEN_FPU*, SF, SF);
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/* basic DF ops */
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/* basic DF ops */
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@ -112,6 +113,7 @@ struct cgen_fp_ops {
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int (*ledf) (CGEN_FPU*, DF, DF);
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int (*ledf) (CGEN_FPU*, DF, DF);
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int (*gtdf) (CGEN_FPU*, DF, DF);
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int (*gtdf) (CGEN_FPU*, DF, DF);
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int (*gedf) (CGEN_FPU*, DF, DF);
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int (*gedf) (CGEN_FPU*, DF, DF);
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int (*unordereddf) (CGEN_FPU*, DF, DF);
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/* SF/DF conversion ops */
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/* SF/DF conversion ops */
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