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gas/testsuite/ 

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movq.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/i386.d Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.
This commit is contained in:
H.J. Lu 2008-01-03 03:28:35 +00:00
parent 615888ae9f
commit f2a9c676b7
7 changed files with 39 additions and 9 deletions
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8
gas/testsuite/ChangeLog
View File

@ -1,3 +1,11 @@
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add tests for movq.
* gas/i386/x86_64.s: Likewise.
* gas/i386/i386.d Updated.
* gas/i386/x86_64.d: Likewise.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534

5
gas/testsuite/gas/i386/i386.d
View File

@ -25,3 +25,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%eax\),%edx
[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%esp\),%xmm1
[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%esp\),%xmm1
[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%esp\)
[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%esp\)
#pass

5
gas/testsuite/gas/i386/i386.s
View File

@ -24,3 +24,8 @@
movzx edx,BYTE PTR [eax]
movzx dx,BYTE PTR [eax]
movzx edx,WORD PTR [eax]
movq xmm1,QWORD PTR [esp]
movq xmm1,[esp]
movq QWORD PTR [esp],xmm1
movq [esp],xmm1

5
gas/testsuite/gas/i386/x86_64.d
View File

@ -187,5 +187,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx
[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx
[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx
...
[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1
[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1
[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\)
[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\)
#pass

5
gas/testsuite/gas/i386/x86_64.s
View File

@ -228,5 +228,10 @@ cmpxchg16b oword ptr [rax]
movzx edx,WORD PTR [rax]
movzx rdx,WORD PTR [rax]
movq xmm1,QWORD PTR [rsp]
movq xmm1,[rsp]
movq QWORD PTR [rsp],xmm1
movq [rsp],xmm1
# Get a good alignment.
.p2align 4,0

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h: Update comments.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.

16
opcodes/i386-opc.h
View File

@ -175,7 +175,8 @@ typedef union i386_cpu_flags
#define Size32 (Size16 + 1)
/* needs size prefix if in 64-bit mode */
#define Size64 (Size32 + 1)
/* instruction ignores operand size prefix and mnemonic size suffix */
/* instruction ignores operand size prefix and in Intel mode ignores
mnemonic size suffix check. */
#define IgnoreSize (Size64 + 1)
/* default insn size depends on mode */
#define DefaultSize (IgnoreSize + 1)
@ -193,18 +194,17 @@ typedef union i386_cpu_flags
#define No_ldSuf (No_qSuf + 1)
/* x suffix on instruction illegal */
#define No_xSuf (No_ldSuf + 1)
/* check PTR size on instruction in Intel mode.
FIXME: Can it be merged with IgnoreSize? */
/* check memory size on instruction in Intel mode if it is specified. */
#define CheckSize (No_xSuf + 1)
/* BYTE PTR on instruction */
/* BYTE memory on instruction */
#define Byte (CheckSize + 1)
/* WORD PTR on instruction */
/* WORD memory on instruction */
#define Word (Byte + 1)
/* DWORD PTR on instruction */
/* DWORD memory on instruction */
#define Dword (Word + 1)
/* QWORD PTR on instruction */
/* QWORD memory on instruction */
#define Qword (Dword + 1)
/* XMMWORD PTR on instruction */
/* XMMWORD memory on instruction */
#define Xmmword (Qword + 1)
/* instruction needs FWAIT */
#define FWait (Xmmword + 1)