[AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension to the floating point and Adv.SIMD support. This patch adds FP16 instructions to the group Vector Two Register Misc, making them available when +simd+fp16 is enabled. The instructions added are: FCMGT, FCMGE, FCMEQ, FCMLE, FCMLT, FABS, FNEG, FRINTN, FRINTA, FRINTP, FRINTM, FRINTX, FRINTZ, FRINTI, FCVTNS, FCVTNU, FCVTPS, FCVTPU, FCVTMS, FCVTMU, FCVTZS, FCVTZU, FCVTAS, FCVTAU, SCVTF, UCVTF, FRECPE, FRSQRTE and FSQRT. The general form for these instructions is <OP> <Vd>.<T>, <Vs>.<T> where T is 4h or 8h. gas/testsuite/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/advsimd-fp16.d: Update expected output. * gas/aarch64/advsimd-fp16.s: Add tests for vector two register misc. instructions. opcodes/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-tbl.h (QL_V2SAMEH): New. (aarch64_opcode_table): Add fp16 versions of frintn, frintm, fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp, frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu, fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte and fsqrt to the vector register misc. group. Change-Id: I0267511a7f7ea14247504d29fe4752e84c9af9ad
This commit is contained in:
Matthew Wahab
parent
6b4680fbd0
commit
f3aa142b8b
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@ -1,3 +1,9 @@
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2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
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* gas/aarch64/advsimd-fp16.d: Update expected output.
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* gas/aarch64/advsimd-fp16.s: Add tests for vector two register
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misc. instructions.
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2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
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* gas/aarch64/advsimd-fp16.d: Update expected output.
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@ -203,3 +203,148 @@ Disassembly of section \.text:
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[0-9a-f]+: 5ea2fc20 frsqrts s0, s1, s2
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[0-9a-f]+: 5ec23c20 frsqrts h0, h1, h2
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[0-9a-f]+: 5ec03c00 frsqrts h0, h0, h0
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[0-9a-f]+: 4ee0c820 fcmgt v0.2d, v1.2d, #0.0
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[0-9a-f]+: 0ea0c820 fcmgt v0.2s, v1.2s, #0.0
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[0-9a-f]+: 4ea0c820 fcmgt v0.4s, v1.4s, #0.0
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[0-9a-f]+: 0ef8c820 fcmgt v0.4h, v1.4h, #0.0
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[0-9a-f]+: 4ef8c820 fcmgt v0.8h, v1.8h, #0.0
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[0-9a-f]+: 6ee0c820 fcmge v0.2d, v1.2d, #0.0
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[0-9a-f]+: 2ea0c820 fcmge v0.2s, v1.2s, #0.0
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[0-9a-f]+: 6ea0c820 fcmge v0.4s, v1.4s, #0.0
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[0-9a-f]+: 2ef8c820 fcmge v0.4h, v1.4h, #0.0
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[0-9a-f]+: 6ef8c820 fcmge v0.8h, v1.8h, #0.0
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[0-9a-f]+: 4ee0d820 fcmeq v0.2d, v1.2d, #0.0
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[0-9a-f]+: 0ea0d820 fcmeq v0.2s, v1.2s, #0.0
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[0-9a-f]+: 4ea0d820 fcmeq v0.4s, v1.4s, #0.0
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[0-9a-f]+: 0ef8d820 fcmeq v0.4h, v1.4h, #0.0
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[0-9a-f]+: 4ef8d820 fcmeq v0.8h, v1.8h, #0.0
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[0-9a-f]+: 6ee0d820 fcmle v0.2d, v1.2d, #0.0
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[0-9a-f]+: 2ea0d820 fcmle v0.2s, v1.2s, #0.0
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[0-9a-f]+: 6ea0d820 fcmle v0.4s, v1.4s, #0.0
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[0-9a-f]+: 2ef8d820 fcmle v0.4h, v1.4h, #0.0
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[0-9a-f]+: 6ef8d820 fcmle v0.8h, v1.8h, #0.0
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[0-9a-f]+: 4ee0e820 fcmlt v0.2d, v1.2d, #0.0
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[0-9a-f]+: 0ea0e820 fcmlt v0.2s, v1.2s, #0.0
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[0-9a-f]+: 4ea0e820 fcmlt v0.4s, v1.4s, #0.0
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[0-9a-f]+: 0ef8e820 fcmlt v0.4h, v1.4h, #0.0
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[0-9a-f]+: 4ef8e820 fcmlt v0.8h, v1.8h, #0.0
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[0-9a-f]+: 4ee0f820 fabs v0.2d, v1.2d
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[0-9a-f]+: 0ea0f820 fabs v0.2s, v1.2s
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[0-9a-f]+: 4ea0f820 fabs v0.4s, v1.4s
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[0-9a-f]+: 0ef8f820 fabs v0.4h, v1.4h
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[0-9a-f]+: 4ef8f820 fabs v0.8h, v1.8h
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[0-9a-f]+: 6ee0f820 fneg v0.2d, v1.2d
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[0-9a-f]+: 2ea0f820 fneg v0.2s, v1.2s
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[0-9a-f]+: 6ea0f820 fneg v0.4s, v1.4s
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[0-9a-f]+: 2ef8f820 fneg v0.4h, v1.4h
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[0-9a-f]+: 6ef8f820 fneg v0.8h, v1.8h
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[0-9a-f]+: 4e618820 frintn v0.2d, v1.2d
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[0-9a-f]+: 0e218820 frintn v0.2s, v1.2s
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[0-9a-f]+: 4e218820 frintn v0.4s, v1.4s
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[0-9a-f]+: 0e798820 frintn v0.4h, v1.4h
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[0-9a-f]+: 4e798820 frintn v0.8h, v1.8h
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[0-9a-f]+: 6e618820 frinta v0.2d, v1.2d
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[0-9a-f]+: 2e218820 frinta v0.2s, v1.2s
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[0-9a-f]+: 6e218820 frinta v0.4s, v1.4s
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[0-9a-f]+: 2e798820 frinta v0.4h, v1.4h
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[0-9a-f]+: 6e798820 frinta v0.8h, v1.8h
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[0-9a-f]+: 4ee18820 frintp v0.2d, v1.2d
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[0-9a-f]+: 0ea18820 frintp v0.2s, v1.2s
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[0-9a-f]+: 4ea18820 frintp v0.4s, v1.4s
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[0-9a-f]+: 0ef98820 frintp v0.4h, v1.4h
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[0-9a-f]+: 4ef98820 frintp v0.8h, v1.8h
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[0-9a-f]+: 4e619820 frintm v0.2d, v1.2d
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[0-9a-f]+: 0e219820 frintm v0.2s, v1.2s
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[0-9a-f]+: 4e219820 frintm v0.4s, v1.4s
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[0-9a-f]+: 0e799820 frintm v0.4h, v1.4h
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[0-9a-f]+: 4e799820 frintm v0.8h, v1.8h
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[0-9a-f]+: 6e619820 frintx v0.2d, v1.2d
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[0-9a-f]+: 2e219820 frintx v0.2s, v1.2s
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[0-9a-f]+: 6e219820 frintx v0.4s, v1.4s
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[0-9a-f]+: 2e799820 frintx v0.4h, v1.4h
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[0-9a-f]+: 6e799820 frintx v0.8h, v1.8h
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[0-9a-f]+: 4ee19820 frintz v0.2d, v1.2d
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[0-9a-f]+: 0ea19820 frintz v0.2s, v1.2s
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[0-9a-f]+: 4ea19820 frintz v0.4s, v1.4s
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[0-9a-f]+: 0ef99820 frintz v0.4h, v1.4h
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[0-9a-f]+: 4ef99820 frintz v0.8h, v1.8h
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[0-9a-f]+: 6ee19820 frinti v0.2d, v1.2d
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[0-9a-f]+: 2ea19820 frinti v0.2s, v1.2s
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[0-9a-f]+: 6ea19820 frinti v0.4s, v1.4s
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[0-9a-f]+: 2ef99820 frinti v0.4h, v1.4h
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[0-9a-f]+: 6ef99820 frinti v0.8h, v1.8h
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[0-9a-f]+: 4e61a820 fcvtns v0.2d, v1.2d
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[0-9a-f]+: 0e21a820 fcvtns v0.2s, v1.2s
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[0-9a-f]+: 4e21a820 fcvtns v0.4s, v1.4s
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[0-9a-f]+: 0e79a820 fcvtns v0.4h, v1.4h
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[0-9a-f]+: 4e79a820 fcvtns v0.8h, v1.8h
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[0-9a-f]+: 6e61a820 fcvtnu v0.2d, v1.2d
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[0-9a-f]+: 2e21a820 fcvtnu v0.2s, v1.2s
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[0-9a-f]+: 6e21a820 fcvtnu v0.4s, v1.4s
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[0-9a-f]+: 2e79a820 fcvtnu v0.4h, v1.4h
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[0-9a-f]+: 6e79a820 fcvtnu v0.8h, v1.8h
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[0-9a-f]+: 4ee1a820 fcvtps v0.2d, v1.2d
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[0-9a-f]+: 0ea1a820 fcvtps v0.2s, v1.2s
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[0-9a-f]+: 4ea1a820 fcvtps v0.4s, v1.4s
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[0-9a-f]+: 0ef9a820 fcvtps v0.4h, v1.4h
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[0-9a-f]+: 4ef9a820 fcvtps v0.8h, v1.8h
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[0-9a-f]+: 6ee1a820 fcvtpu v0.2d, v1.2d
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[0-9a-f]+: 2ea1a820 fcvtpu v0.2s, v1.2s
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[0-9a-f]+: 6ea1a820 fcvtpu v0.4s, v1.4s
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[0-9a-f]+: 2ef9a820 fcvtpu v0.4h, v1.4h
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[0-9a-f]+: 6ef9a820 fcvtpu v0.8h, v1.8h
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[0-9a-f]+: 4e61b820 fcvtms v0.2d, v1.2d
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[0-9a-f]+: 0e21b820 fcvtms v0.2s, v1.2s
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[0-9a-f]+: 4e21b820 fcvtms v0.4s, v1.4s
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[0-9a-f]+: 0e79b820 fcvtms v0.4h, v1.4h
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[0-9a-f]+: 4e79b820 fcvtms v0.8h, v1.8h
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[0-9a-f]+: 6e61b820 fcvtmu v0.2d, v1.2d
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[0-9a-f]+: 2e21b820 fcvtmu v0.2s, v1.2s
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[0-9a-f]+: 6e21b820 fcvtmu v0.4s, v1.4s
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[0-9a-f]+: 2e79b820 fcvtmu v0.4h, v1.4h
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[0-9a-f]+: 6e79b820 fcvtmu v0.8h, v1.8h
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[0-9a-f]+: 4ee1b820 fcvtzs v0.2d, v1.2d
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[0-9a-f]+: 0ea1b820 fcvtzs v0.2s, v1.2s
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[0-9a-f]+: 4ea1b820 fcvtzs v0.4s, v1.4s
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[0-9a-f]+: 0ef9b820 fcvtzs v0.4h, v1.4h
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[0-9a-f]+: 4ef9b820 fcvtzs v0.8h, v1.8h
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[0-9a-f]+: 6ee1b820 fcvtzu v0.2d, v1.2d
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[0-9a-f]+: 2ea1b820 fcvtzu v0.2s, v1.2s
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[0-9a-f]+: 6ea1b820 fcvtzu v0.4s, v1.4s
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[0-9a-f]+: 2ef9b820 fcvtzu v0.4h, v1.4h
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[0-9a-f]+: 6ef9b820 fcvtzu v0.8h, v1.8h
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[0-9a-f]+: 4e61c820 fcvtas v0.2d, v1.2d
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[0-9a-f]+: 0e21c820 fcvtas v0.2s, v1.2s
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[0-9a-f]+: 4e21c820 fcvtas v0.4s, v1.4s
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[0-9a-f]+: 0e79c820 fcvtas v0.4h, v1.4h
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[0-9a-f]+: 4e79c820 fcvtas v0.8h, v1.8h
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[0-9a-f]+: 6e61c820 fcvtau v0.2d, v1.2d
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[0-9a-f]+: 2e21c820 fcvtau v0.2s, v1.2s
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[0-9a-f]+: 6e21c820 fcvtau v0.4s, v1.4s
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[0-9a-f]+: 2e79c820 fcvtau v0.4h, v1.4h
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[0-9a-f]+: 6e79c820 fcvtau v0.8h, v1.8h
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[0-9a-f]+: 4e61d820 scvtf v0.2d, v1.2d
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[0-9a-f]+: 0e21d820 scvtf v0.2s, v1.2s
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[0-9a-f]+: 4e21d820 scvtf v0.4s, v1.4s
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[0-9a-f]+: 0e79d820 scvtf v0.4h, v1.4h
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[0-9a-f]+: 4e79d820 scvtf v0.8h, v1.8h
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[0-9a-f]+: 6e61d820 ucvtf v0.2d, v1.2d
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[0-9a-f]+: 2e21d820 ucvtf v0.2s, v1.2s
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[0-9a-f]+: 6e21d820 ucvtf v0.4s, v1.4s
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[0-9a-f]+: 2e79d820 ucvtf v0.4h, v1.4h
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[0-9a-f]+: 6e79d820 ucvtf v0.8h, v1.8h
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[0-9a-f]+: 4ee1d820 frecpe v0.2d, v1.2d
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[0-9a-f]+: 0ea1d820 frecpe v0.2s, v1.2s
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[0-9a-f]+: 4ea1d820 frecpe v0.4s, v1.4s
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[0-9a-f]+: 0ef9d820 frecpe v0.4h, v1.4h
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[0-9a-f]+: 4ef9d820 frecpe v0.8h, v1.8h
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[0-9a-f]+: 6ee1d820 frsqrte v0.2d, v1.2d
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[0-9a-f]+: 2ea1d820 frsqrte v0.2s, v1.2s
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[0-9a-f]+: 6ea1d820 frsqrte v0.4s, v1.4s
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[0-9a-f]+: 2ef9d820 frsqrte v0.4h, v1.4h
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[0-9a-f]+: 6ef9d820 frsqrte v0.8h, v1.8h
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[0-9a-f]+: 6ee1f820 fsqrt v0.2d, v1.2d
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[0-9a-f]+: 2ea1f820 fsqrt v0.2s, v1.2s
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[0-9a-f]+: 6ea1f820 fsqrt v0.4s, v1.4s
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[0-9a-f]+: 2ef9f820 fsqrt v0.4h, v1.4h
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[0-9a-f]+: 6ef9f820 fsqrt v0.8h, v1.8h
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@ -57,3 +57,58 @@
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sthree_same facgt
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sthree_same frecps
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sthree_same frsqrts
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/* Vector two-register misc. */
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.macro tworeg_zero, op
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\op v0.2d, v1.2d, #0.0
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\op v0.2s, v1.2s, #0.0
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\op v0.4s, v1.4s, #0.0
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\op v0.4h, v1.4h, #0.0
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\op v0.8h, v1.8h, #0.0
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.endm
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tworeg_zero fcmgt
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tworeg_zero fcmge
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tworeg_zero fcmeq
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tworeg_zero fcmle
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tworeg_zero fcmlt
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.macro tworeg_misc, op
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\op v0.2d, v1.2d
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\op v0.2s, v1.2s
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\op v0.4s, v1.4s
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\op v0.4h, v1.4h
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\op v0.8h, v1.8h
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.endm
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tworeg_misc fabs
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tworeg_misc fneg
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tworeg_misc frintn
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tworeg_misc frinta
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tworeg_misc frintp
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tworeg_misc frintm
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tworeg_misc frintx
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tworeg_misc frintz
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tworeg_misc frinti
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tworeg_misc fcvtns
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tworeg_misc fcvtnu
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tworeg_misc fcvtps
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tworeg_misc fcvtpu
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tworeg_misc fcvtms
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tworeg_misc fcvtmu
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tworeg_misc fcvtzs
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tworeg_misc fcvtzu
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tworeg_misc fcvtas
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tworeg_misc fcvtau
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tworeg_misc scvtf
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tworeg_misc ucvtf
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tworeg_misc frecpe
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tworeg_misc frsqrte
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tworeg_misc fsqrt
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@ -67,10 +67,9 @@
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[^:]*:22: Info: rev32 v4.8h,v5.8h
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[^:]*:24: Error: operand mismatch -- `frintn v6.8b,v7.8b'
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[^:]*:24: Info: did you mean this\?
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[^:]*:24: Info: frintn v6.2s,v7.2s
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[^:]*:24: Info: frintn v6.4h,v7.4h
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[^:]*:24: Info: other valid variant\(s\):
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[^:]*:24: Info: frintn v6.4s,v7.4s
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[^:]*:24: Info: frintn v6.2d,v7.2d
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[^:]*:24: Info: frintn v6.8h,v7.8h
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[^:]*:26: Error: operand mismatch -- `rev64 v8.2d,v9.2d'
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[^:]*:26: Info: did you mean this\?
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[^:]*:26: Info: rev64 v8.8b,v9.8b
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@ -1,3 +1,15 @@
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2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Regenerate.
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* aarch64-opc-2.c: Regenerate.
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* aarch64-tbl.h (QL_V2SAMEH): New.
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(aarch64_opcode_table): Add fp16 versions of frintn, frintm,
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fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp,
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frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu,
|
||||
fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte
|
||||
and fsqrt to the vector register misc. group.
|
||||
|
||||
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
|
||||
|
||||
* aarch64-asm-2.c: Regenerate.
|
||||
|
|
|
|||
|
|
@ -83,362 +83,362 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
|
|||
case 144: /* ins */
|
||||
value = 144; /* --> ins. */
|
||||
break;
|
||||
case 206: /* mvn */
|
||||
case 205: /* not */
|
||||
value = 205; /* --> not. */
|
||||
break;
|
||||
case 273: /* mov */
|
||||
case 272: /* orr */
|
||||
value = 272; /* --> orr. */
|
||||
break;
|
||||
case 342: /* sxtl */
|
||||
case 341: /* sshll */
|
||||
value = 341; /* --> sshll. */
|
||||
break;
|
||||
case 344: /* sxtl2 */
|
||||
case 343: /* sshll2 */
|
||||
value = 343; /* --> sshll2. */
|
||||
break;
|
||||
case 364: /* uxtl */
|
||||
case 363: /* ushll */
|
||||
value = 363; /* --> ushll. */
|
||||
break;
|
||||
case 366: /* uxtl2 */
|
||||
case 365: /* ushll2 */
|
||||
value = 365; /* --> ushll2. */
|
||||
break;
|
||||
case 461: /* mov */
|
||||
case 460: /* dup */
|
||||
value = 460; /* --> dup. */
|
||||
break;
|
||||
case 539: /* sxtw */
|
||||
case 538: /* sxth */
|
||||
case 537: /* sxtb */
|
||||
case 540: /* asr */
|
||||
case 536: /* sbfx */
|
||||
case 535: /* sbfiz */
|
||||
case 534: /* sbfm */
|
||||
value = 534; /* --> sbfm. */
|
||||
break;
|
||||
case 543: /* bfc */
|
||||
case 544: /* bfxil */
|
||||
case 542: /* bfi */
|
||||
case 541: /* bfm */
|
||||
value = 541; /* --> bfm. */
|
||||
break;
|
||||
case 549: /* uxth */
|
||||
case 548: /* uxtb */
|
||||
case 551: /* lsr */
|
||||
case 550: /* lsl */
|
||||
case 547: /* ubfx */
|
||||
case 546: /* ubfiz */
|
||||
case 545: /* ubfm */
|
||||
value = 545; /* --> ubfm. */
|
||||
break;
|
||||
case 569: /* cset */
|
||||
case 568: /* cinc */
|
||||
case 567: /* csinc */
|
||||
value = 567; /* --> csinc. */
|
||||
break;
|
||||
case 572: /* csetm */
|
||||
case 571: /* cinv */
|
||||
case 570: /* csinv */
|
||||
value = 570; /* --> csinv. */
|
||||
break;
|
||||
case 574: /* cneg */
|
||||
case 573: /* csneg */
|
||||
value = 573; /* --> csneg. */
|
||||
break;
|
||||
case 592: /* rev */
|
||||
case 593: /* rev64 */
|
||||
value = 592; /* --> rev. */
|
||||
break;
|
||||
case 600: /* lsl */
|
||||
case 599: /* lslv */
|
||||
value = 599; /* --> lslv. */
|
||||
break;
|
||||
case 602: /* lsr */
|
||||
case 601: /* lsrv */
|
||||
value = 601; /* --> lsrv. */
|
||||
break;
|
||||
case 604: /* asr */
|
||||
case 603: /* asrv */
|
||||
value = 603; /* --> asrv. */
|
||||
break;
|
||||
case 606: /* ror */
|
||||
case 605: /* rorv */
|
||||
value = 605; /* --> rorv. */
|
||||
break;
|
||||
case 616: /* mul */
|
||||
case 615: /* madd */
|
||||
value = 615; /* --> madd. */
|
||||
break;
|
||||
case 618: /* mneg */
|
||||
case 617: /* msub */
|
||||
value = 617; /* --> msub. */
|
||||
break;
|
||||
case 620: /* smull */
|
||||
case 619: /* smaddl */
|
||||
value = 619; /* --> smaddl. */
|
||||
break;
|
||||
case 622: /* smnegl */
|
||||
case 621: /* smsubl */
|
||||
value = 621; /* --> smsubl. */
|
||||
break;
|
||||
case 625: /* umull */
|
||||
case 624: /* umaddl */
|
||||
value = 624; /* --> umaddl. */
|
||||
break;
|
||||
case 627: /* umnegl */
|
||||
case 626: /* umsubl */
|
||||
value = 626; /* --> umsubl. */
|
||||
break;
|
||||
case 638: /* ror */
|
||||
case 637: /* extr */
|
||||
value = 637; /* --> extr. */
|
||||
break;
|
||||
case 845: /* bic */
|
||||
case 844: /* and */
|
||||
value = 844; /* --> and. */
|
||||
break;
|
||||
case 847: /* mov */
|
||||
case 846: /* orr */
|
||||
value = 846; /* --> orr. */
|
||||
break;
|
||||
case 850: /* tst */
|
||||
case 849: /* ands */
|
||||
value = 849; /* --> ands. */
|
||||
break;
|
||||
case 855: /* uxtw */
|
||||
case 854: /* mov */
|
||||
case 853: /* orr */
|
||||
value = 853; /* --> orr. */
|
||||
break;
|
||||
case 857: /* mvn */
|
||||
case 856: /* orn */
|
||||
value = 856; /* --> orn. */
|
||||
break;
|
||||
case 861: /* tst */
|
||||
case 860: /* ands */
|
||||
value = 860; /* --> ands. */
|
||||
break;
|
||||
case 987: /* staddb */
|
||||
case 891: /* ldaddb */
|
||||
value = 891; /* --> ldaddb. */
|
||||
break;
|
||||
case 988: /* staddh */
|
||||
case 892: /* ldaddh */
|
||||
value = 892; /* --> ldaddh. */
|
||||
break;
|
||||
case 989: /* stadd */
|
||||
case 893: /* ldadd */
|
||||
value = 893; /* --> ldadd. */
|
||||
case 227: /* mvn */
|
||||
case 226: /* not */
|
||||
value = 226; /* --> not. */
|
||||
break;
|
||||
case 302: /* mov */
|
||||
case 301: /* orr */
|
||||
value = 301; /* --> orr. */
|
||||
break;
|
||||
case 371: /* sxtl */
|
||||
case 370: /* sshll */
|
||||
value = 370; /* --> sshll. */
|
||||
break;
|
||||
case 373: /* sxtl2 */
|
||||
case 372: /* sshll2 */
|
||||
value = 372; /* --> sshll2. */
|
||||
break;
|
||||
case 393: /* uxtl */
|
||||
case 392: /* ushll */
|
||||
value = 392; /* --> ushll. */
|
||||
break;
|
||||
case 395: /* uxtl2 */
|
||||
case 394: /* ushll2 */
|
||||
value = 394; /* --> ushll2. */
|
||||
break;
|
||||
case 490: /* mov */
|
||||
case 489: /* dup */
|
||||
value = 489; /* --> dup. */
|
||||
break;
|
||||
case 568: /* sxtw */
|
||||
case 567: /* sxth */
|
||||
case 566: /* sxtb */
|
||||
case 569: /* asr */
|
||||
case 565: /* sbfx */
|
||||
case 564: /* sbfiz */
|
||||
case 563: /* sbfm */
|
||||
value = 563; /* --> sbfm. */
|
||||
break;
|
||||
case 572: /* bfc */
|
||||
case 573: /* bfxil */
|
||||
case 571: /* bfi */
|
||||
case 570: /* bfm */
|
||||
value = 570; /* --> bfm. */
|
||||
break;
|
||||
case 578: /* uxth */
|
||||
case 577: /* uxtb */
|
||||
case 580: /* lsr */
|
||||
case 579: /* lsl */
|
||||
case 576: /* ubfx */
|
||||
case 575: /* ubfiz */
|
||||
case 574: /* ubfm */
|
||||
value = 574; /* --> ubfm. */
|
||||
break;
|
||||
case 598: /* cset */
|
||||
case 597: /* cinc */
|
||||
case 596: /* csinc */
|
||||
value = 596; /* --> csinc. */
|
||||
break;
|
||||
case 601: /* csetm */
|
||||
case 600: /* cinv */
|
||||
case 599: /* csinv */
|
||||
value = 599; /* --> csinv. */
|
||||
break;
|
||||
case 603: /* cneg */
|
||||
case 602: /* csneg */
|
||||
value = 602; /* --> csneg. */
|
||||
break;
|
||||
case 621: /* rev */
|
||||
case 622: /* rev64 */
|
||||
value = 621; /* --> rev. */
|
||||
break;
|
||||
case 629: /* lsl */
|
||||
case 628: /* lslv */
|
||||
value = 628; /* --> lslv. */
|
||||
break;
|
||||
case 631: /* lsr */
|
||||
case 630: /* lsrv */
|
||||
value = 630; /* --> lsrv. */
|
||||
break;
|
||||
case 633: /* asr */
|
||||
case 632: /* asrv */
|
||||
value = 632; /* --> asrv. */
|
||||
break;
|
||||
case 635: /* ror */
|
||||
case 634: /* rorv */
|
||||
value = 634; /* --> rorv. */
|
||||
break;
|
||||
case 645: /* mul */
|
||||
case 644: /* madd */
|
||||
value = 644; /* --> madd. */
|
||||
break;
|
||||
case 647: /* mneg */
|
||||
case 646: /* msub */
|
||||
value = 646; /* --> msub. */
|
||||
break;
|
||||
case 649: /* smull */
|
||||
case 648: /* smaddl */
|
||||
value = 648; /* --> smaddl. */
|
||||
break;
|
||||
case 651: /* smnegl */
|
||||
case 650: /* smsubl */
|
||||
value = 650; /* --> smsubl. */
|
||||
break;
|
||||
case 654: /* umull */
|
||||
case 653: /* umaddl */
|
||||
value = 653; /* --> umaddl. */
|
||||
break;
|
||||
case 656: /* umnegl */
|
||||
case 655: /* umsubl */
|
||||
value = 655; /* --> umsubl. */
|
||||
break;
|
||||
case 667: /* ror */
|
||||
case 666: /* extr */
|
||||
value = 666; /* --> extr. */
|
||||
break;
|
||||
case 874: /* bic */
|
||||
case 873: /* and */
|
||||
value = 873; /* --> and. */
|
||||
break;
|
||||
case 876: /* mov */
|
||||
case 875: /* orr */
|
||||
value = 875; /* --> orr. */
|
||||
break;
|
||||
case 879: /* tst */
|
||||
case 878: /* ands */
|
||||
value = 878; /* --> ands. */
|
||||
break;
|
||||
case 884: /* uxtw */
|
||||
case 883: /* mov */
|
||||
case 882: /* orr */
|
||||
value = 882; /* --> orr. */
|
||||
break;
|
||||
case 886: /* mvn */
|
||||
case 885: /* orn */
|
||||
value = 885; /* --> orn. */
|
||||
break;
|
||||
case 890: /* tst */
|
||||
case 889: /* ands */
|
||||
value = 889; /* --> ands. */
|
||||
break;
|
||||
case 1016: /* staddb */
|
||||
case 920: /* ldaddb */
|
||||
value = 920; /* --> ldaddb. */
|
||||
break;
|
||||
case 1017: /* staddh */
|
||||
case 921: /* ldaddh */
|
||||
value = 921; /* --> ldaddh. */
|
||||
break;
|
||||
case 1018: /* stadd */
|
||||
case 922: /* ldadd */
|
||||
value = 922; /* --> ldadd. */
|
||||
break;
|
||||
case 990: /* staddlb */
|
||||
case 895: /* ldaddlb */
|
||||
value = 895; /* --> ldaddlb. */
|
||||
case 1019: /* staddlb */
|
||||
case 924: /* ldaddlb */
|
||||
value = 924; /* --> ldaddlb. */
|
||||
break;
|
||||
case 991: /* staddlh */
|
||||
case 898: /* ldaddlh */
|
||||
value = 898; /* --> ldaddlh. */
|
||||
case 1020: /* staddlh */
|
||||
case 927: /* ldaddlh */
|
||||
value = 927; /* --> ldaddlh. */
|
||||
break;
|
||||
case 992: /* staddl */
|
||||
case 901: /* ldaddl */
|
||||
value = 901; /* --> ldaddl. */
|
||||
case 1021: /* staddl */
|
||||
case 930: /* ldaddl */
|
||||
value = 930; /* --> ldaddl. */
|
||||
break;
|
||||
case 993: /* stclrb */
|
||||
case 903: /* ldclrb */
|
||||
value = 903; /* --> ldclrb. */
|
||||
case 1022: /* stclrb */
|
||||
case 932: /* ldclrb */
|
||||
value = 932; /* --> ldclrb. */
|
||||
break;
|
||||
case 994: /* stclrh */
|
||||
case 904: /* ldclrh */
|
||||
value = 904; /* --> ldclrh. */
|
||||
case 1023: /* stclrh */
|
||||
case 933: /* ldclrh */
|
||||
value = 933; /* --> ldclrh. */
|
||||
break;
|
||||
case 995: /* stclr */
|
||||
case 905: /* ldclr */
|
||||
value = 905; /* --> ldclr. */
|
||||
case 1024: /* stclr */
|
||||
case 934: /* ldclr */
|
||||
value = 934; /* --> ldclr. */
|
||||
break;
|
||||
case 996: /* stclrlb */
|
||||
case 907: /* ldclrlb */
|
||||
value = 907; /* --> ldclrlb. */
|
||||
case 1025: /* stclrlb */
|
||||
case 936: /* ldclrlb */
|
||||
value = 936; /* --> ldclrlb. */
|
||||
break;
|
||||
case 997: /* stclrlh */
|
||||
case 910: /* ldclrlh */
|
||||
value = 910; /* --> ldclrlh. */
|
||||
case 1026: /* stclrlh */
|
||||
case 939: /* ldclrlh */
|
||||
value = 939; /* --> ldclrlh. */
|
||||
break;
|
||||
case 998: /* stclrl */
|
||||
case 913: /* ldclrl */
|
||||
value = 913; /* --> ldclrl. */
|
||||
case 1027: /* stclrl */
|
||||
case 942: /* ldclrl */
|
||||
value = 942; /* --> ldclrl. */
|
||||
break;
|
||||
case 999: /* steorb */
|
||||
case 915: /* ldeorb */
|
||||
value = 915; /* --> ldeorb. */
|
||||
case 1028: /* steorb */
|
||||
case 944: /* ldeorb */
|
||||
value = 944; /* --> ldeorb. */
|
||||
break;
|
||||
case 1000: /* steorh */
|
||||
case 916: /* ldeorh */
|
||||
value = 916; /* --> ldeorh. */
|
||||
case 1029: /* steorh */
|
||||
case 945: /* ldeorh */
|
||||
value = 945; /* --> ldeorh. */
|
||||
break;
|
||||
case 1001: /* steor */
|
||||
case 917: /* ldeor */
|
||||
value = 917; /* --> ldeor. */
|
||||
case 1030: /* steor */
|
||||
case 946: /* ldeor */
|
||||
value = 946; /* --> ldeor. */
|
||||
break;
|
||||
case 1002: /* steorlb */
|
||||
case 919: /* ldeorlb */
|
||||
value = 919; /* --> ldeorlb. */
|
||||
case 1031: /* steorlb */
|
||||
case 948: /* ldeorlb */
|
||||
value = 948; /* --> ldeorlb. */
|
||||
break;
|
||||
case 1003: /* steorlh */
|
||||
case 922: /* ldeorlh */
|
||||
value = 922; /* --> ldeorlh. */
|
||||
case 1032: /* steorlh */
|
||||
case 951: /* ldeorlh */
|
||||
value = 951; /* --> ldeorlh. */
|
||||
break;
|
||||
case 1004: /* steorl */
|
||||
case 925: /* ldeorl */
|
||||
value = 925; /* --> ldeorl. */
|
||||
case 1033: /* steorl */
|
||||
case 954: /* ldeorl */
|
||||
value = 954; /* --> ldeorl. */
|
||||
break;
|
||||
case 1005: /* stsetb */
|
||||
case 927: /* ldsetb */
|
||||
value = 927; /* --> ldsetb. */
|
||||
case 1034: /* stsetb */
|
||||
case 956: /* ldsetb */
|
||||
value = 956; /* --> ldsetb. */
|
||||
break;
|
||||
case 1006: /* stseth */
|
||||
case 928: /* ldseth */
|
||||
value = 928; /* --> ldseth. */
|
||||
case 1035: /* stseth */
|
||||
case 957: /* ldseth */
|
||||
value = 957; /* --> ldseth. */
|
||||
break;
|
||||
case 1007: /* stset */
|
||||
case 929: /* ldset */
|
||||
value = 929; /* --> ldset. */
|
||||
case 1036: /* stset */
|
||||
case 958: /* ldset */
|
||||
value = 958; /* --> ldset. */
|
||||
break;
|
||||
case 1008: /* stsetlb */
|
||||
case 931: /* ldsetlb */
|
||||
value = 931; /* --> ldsetlb. */
|
||||
case 1037: /* stsetlb */
|
||||
case 960: /* ldsetlb */
|
||||
value = 960; /* --> ldsetlb. */
|
||||
break;
|
||||
case 1009: /* stsetlh */
|
||||
case 934: /* ldsetlh */
|
||||
value = 934; /* --> ldsetlh. */
|
||||
case 1038: /* stsetlh */
|
||||
case 963: /* ldsetlh */
|
||||
value = 963; /* --> ldsetlh. */
|
||||
break;
|
||||
case 1010: /* stsetl */
|
||||
case 937: /* ldsetl */
|
||||
value = 937; /* --> ldsetl. */
|
||||
case 1039: /* stsetl */
|
||||
case 966: /* ldsetl */
|
||||
value = 966; /* --> ldsetl. */
|
||||
break;
|
||||
case 1011: /* stsmaxb */
|
||||
case 939: /* ldsmaxb */
|
||||
value = 939; /* --> ldsmaxb. */
|
||||
case 1040: /* stsmaxb */
|
||||
case 968: /* ldsmaxb */
|
||||
value = 968; /* --> ldsmaxb. */
|
||||
break;
|
||||
case 1012: /* stsmaxh */
|
||||
case 940: /* ldsmaxh */
|
||||
value = 940; /* --> ldsmaxh. */
|
||||
case 1041: /* stsmaxh */
|
||||
case 969: /* ldsmaxh */
|
||||
value = 969; /* --> ldsmaxh. */
|
||||
break;
|
||||
case 1013: /* stsmax */
|
||||
case 941: /* ldsmax */
|
||||
value = 941; /* --> ldsmax. */
|
||||
break;
|
||||
case 1014: /* stsmaxlb */
|
||||
case 943: /* ldsmaxlb */
|
||||
value = 943; /* --> ldsmaxlb. */
|
||||
break;
|
||||
case 1015: /* stsmaxlh */
|
||||
case 946: /* ldsmaxlh */
|
||||
value = 946; /* --> ldsmaxlh. */
|
||||
break;
|
||||
case 1016: /* stsmaxl */
|
||||
case 949: /* ldsmaxl */
|
||||
value = 949; /* --> ldsmaxl. */
|
||||
break;
|
||||
case 1017: /* stsminb */
|
||||
case 951: /* ldsminb */
|
||||
value = 951; /* --> ldsminb. */
|
||||
break;
|
||||
case 1018: /* stsminh */
|
||||
case 952: /* ldsminh */
|
||||
value = 952; /* --> ldsminh. */
|
||||
break;
|
||||
case 1019: /* stsmin */
|
||||
case 953: /* ldsmin */
|
||||
value = 953; /* --> ldsmin. */
|
||||
break;
|
||||
case 1020: /* stsminlb */
|
||||
case 955: /* ldsminlb */
|
||||
value = 955; /* --> ldsminlb. */
|
||||
break;
|
||||
case 1021: /* stsminlh */
|
||||
case 958: /* ldsminlh */
|
||||
value = 958; /* --> ldsminlh. */
|
||||
break;
|
||||
case 1022: /* stsminl */
|
||||
case 961: /* ldsminl */
|
||||
value = 961; /* --> ldsminl. */
|
||||
break;
|
||||
case 1023: /* stumaxb */
|
||||
case 963: /* ldumaxb */
|
||||
value = 963; /* --> ldumaxb. */
|
||||
break;
|
||||
case 1024: /* stumaxh */
|
||||
case 964: /* ldumaxh */
|
||||
value = 964; /* --> ldumaxh. */
|
||||
break;
|
||||
case 1025: /* stumax */
|
||||
case 965: /* ldumax */
|
||||
value = 965; /* --> ldumax. */
|
||||
break;
|
||||
case 1026: /* stumaxlb */
|
||||
case 967: /* ldumaxlb */
|
||||
value = 967; /* --> ldumaxlb. */
|
||||
break;
|
||||
case 1027: /* stumaxlh */
|
||||
case 970: /* ldumaxlh */
|
||||
value = 970; /* --> ldumaxlh. */
|
||||
break;
|
||||
case 1028: /* stumaxl */
|
||||
case 973: /* ldumaxl */
|
||||
value = 973; /* --> ldumaxl. */
|
||||
break;
|
||||
case 1029: /* stuminb */
|
||||
case 975: /* lduminb */
|
||||
value = 975; /* --> lduminb. */
|
||||
break;
|
||||
case 1030: /* stuminh */
|
||||
case 976: /* lduminh */
|
||||
value = 976; /* --> lduminh. */
|
||||
break;
|
||||
case 1031: /* stumin */
|
||||
case 977: /* ldumin */
|
||||
value = 977; /* --> ldumin. */
|
||||
break;
|
||||
case 1032: /* stuminlb */
|
||||
case 979: /* lduminlb */
|
||||
value = 979; /* --> lduminlb. */
|
||||
break;
|
||||
case 1033: /* stuminlh */
|
||||
case 982: /* lduminlh */
|
||||
value = 982; /* --> lduminlh. */
|
||||
break;
|
||||
case 1034: /* stuminl */
|
||||
case 985: /* lduminl */
|
||||
value = 985; /* --> lduminl. */
|
||||
break;
|
||||
case 1036: /* mov */
|
||||
case 1035: /* movn */
|
||||
value = 1035; /* --> movn. */
|
||||
break;
|
||||
case 1038: /* mov */
|
||||
case 1037: /* movz */
|
||||
value = 1037; /* --> movz. */
|
||||
break;
|
||||
case 1051: /* psb */
|
||||
case 1050: /* esb */
|
||||
case 1049: /* sevl */
|
||||
case 1048: /* sev */
|
||||
case 1047: /* wfi */
|
||||
case 1046: /* wfe */
|
||||
case 1045: /* yield */
|
||||
case 1044: /* nop */
|
||||
case 1043: /* hint */
|
||||
value = 1043; /* --> hint. */
|
||||
break;
|
||||
case 1060: /* tlbi */
|
||||
case 1059: /* ic */
|
||||
case 1058: /* dc */
|
||||
case 1057: /* at */
|
||||
case 1056: /* sys */
|
||||
value = 1056; /* --> sys. */
|
||||
case 1042: /* stsmax */
|
||||
case 970: /* ldsmax */
|
||||
value = 970; /* --> ldsmax. */
|
||||
break;
|
||||
case 1043: /* stsmaxlb */
|
||||
case 972: /* ldsmaxlb */
|
||||
value = 972; /* --> ldsmaxlb. */
|
||||
break;
|
||||
case 1044: /* stsmaxlh */
|
||||
case 975: /* ldsmaxlh */
|
||||
value = 975; /* --> ldsmaxlh. */
|
||||
break;
|
||||
case 1045: /* stsmaxl */
|
||||
case 978: /* ldsmaxl */
|
||||
value = 978; /* --> ldsmaxl. */
|
||||
break;
|
||||
case 1046: /* stsminb */
|
||||
case 980: /* ldsminb */
|
||||
value = 980; /* --> ldsminb. */
|
||||
break;
|
||||
case 1047: /* stsminh */
|
||||
case 981: /* ldsminh */
|
||||
value = 981; /* --> ldsminh. */
|
||||
break;
|
||||
case 1048: /* stsmin */
|
||||
case 982: /* ldsmin */
|
||||
value = 982; /* --> ldsmin. */
|
||||
break;
|
||||
case 1049: /* stsminlb */
|
||||
case 984: /* ldsminlb */
|
||||
value = 984; /* --> ldsminlb. */
|
||||
break;
|
||||
case 1050: /* stsminlh */
|
||||
case 987: /* ldsminlh */
|
||||
value = 987; /* --> ldsminlh. */
|
||||
break;
|
||||
case 1051: /* stsminl */
|
||||
case 990: /* ldsminl */
|
||||
value = 990; /* --> ldsminl. */
|
||||
break;
|
||||
case 1052: /* stumaxb */
|
||||
case 992: /* ldumaxb */
|
||||
value = 992; /* --> ldumaxb. */
|
||||
break;
|
||||
case 1053: /* stumaxh */
|
||||
case 993: /* ldumaxh */
|
||||
value = 993; /* --> ldumaxh. */
|
||||
break;
|
||||
case 1054: /* stumax */
|
||||
case 994: /* ldumax */
|
||||
value = 994; /* --> ldumax. */
|
||||
break;
|
||||
case 1055: /* stumaxlb */
|
||||
case 996: /* ldumaxlb */
|
||||
value = 996; /* --> ldumaxlb. */
|
||||
break;
|
||||
case 1056: /* stumaxlh */
|
||||
case 999: /* ldumaxlh */
|
||||
value = 999; /* --> ldumaxlh. */
|
||||
break;
|
||||
case 1057: /* stumaxl */
|
||||
case 1002: /* ldumaxl */
|
||||
value = 1002; /* --> ldumaxl. */
|
||||
break;
|
||||
case 1058: /* stuminb */
|
||||
case 1004: /* lduminb */
|
||||
value = 1004; /* --> lduminb. */
|
||||
break;
|
||||
case 1059: /* stuminh */
|
||||
case 1005: /* lduminh */
|
||||
value = 1005; /* --> lduminh. */
|
||||
break;
|
||||
case 1060: /* stumin */
|
||||
case 1006: /* ldumin */
|
||||
value = 1006; /* --> ldumin. */
|
||||
break;
|
||||
case 1061: /* stuminlb */
|
||||
case 1008: /* lduminlb */
|
||||
value = 1008; /* --> lduminlb. */
|
||||
break;
|
||||
case 1062: /* stuminlh */
|
||||
case 1011: /* lduminlh */
|
||||
value = 1011; /* --> lduminlh. */
|
||||
break;
|
||||
case 1063: /* stuminl */
|
||||
case 1014: /* lduminl */
|
||||
value = 1014; /* --> lduminl. */
|
||||
break;
|
||||
case 1065: /* mov */
|
||||
case 1064: /* movn */
|
||||
value = 1064; /* --> movn. */
|
||||
break;
|
||||
case 1067: /* mov */
|
||||
case 1066: /* movz */
|
||||
value = 1066; /* --> movz. */
|
||||
break;
|
||||
case 1080: /* psb */
|
||||
case 1079: /* esb */
|
||||
case 1078: /* sevl */
|
||||
case 1077: /* sev */
|
||||
case 1076: /* wfi */
|
||||
case 1075: /* wfe */
|
||||
case 1074: /* yield */
|
||||
case 1073: /* nop */
|
||||
case 1072: /* hint */
|
||||
value = 1072; /* --> hint. */
|
||||
break;
|
||||
case 1089: /* tlbi */
|
||||
case 1088: /* ic */
|
||||
case 1087: /* dc */
|
||||
case 1086: /* at */
|
||||
case 1085: /* sys */
|
||||
value = 1085; /* --> sys. */
|
||||
break;
|
||||
default: return NULL;
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -122,74 +122,74 @@ const struct aarch64_operand aarch64_operands[] =
|
|||
static const unsigned op_enum_table [] =
|
||||
{
|
||||
0,
|
||||
753,
|
||||
754,
|
||||
755,
|
||||
758,
|
||||
759,
|
||||
760,
|
||||
761,
|
||||
762,
|
||||
756,
|
||||
757,
|
||||
763,
|
||||
764,
|
||||
786,
|
||||
782,
|
||||
783,
|
||||
784,
|
||||
787,
|
||||
788,
|
||||
791,
|
||||
792,
|
||||
793,
|
||||
794,
|
||||
795,
|
||||
789,
|
||||
790,
|
||||
796,
|
||||
797,
|
||||
840,
|
||||
841,
|
||||
842,
|
||||
843,
|
||||
791,
|
||||
785,
|
||||
786,
|
||||
792,
|
||||
793,
|
||||
815,
|
||||
816,
|
||||
817,
|
||||
820,
|
||||
821,
|
||||
822,
|
||||
823,
|
||||
824,
|
||||
818,
|
||||
819,
|
||||
825,
|
||||
826,
|
||||
869,
|
||||
870,
|
||||
871,
|
||||
872,
|
||||
12,
|
||||
552,
|
||||
553,
|
||||
1035,
|
||||
1037,
|
||||
1039,
|
||||
847,
|
||||
1038,
|
||||
1036,
|
||||
273,
|
||||
540,
|
||||
551,
|
||||
550,
|
||||
845,
|
||||
547,
|
||||
544,
|
||||
536,
|
||||
535,
|
||||
542,
|
||||
543,
|
||||
546,
|
||||
548,
|
||||
549,
|
||||
855,
|
||||
568,
|
||||
571,
|
||||
574,
|
||||
581,
|
||||
582,
|
||||
1064,
|
||||
1066,
|
||||
1068,
|
||||
876,
|
||||
1067,
|
||||
1065,
|
||||
302,
|
||||
569,
|
||||
580,
|
||||
579,
|
||||
874,
|
||||
576,
|
||||
573,
|
||||
565,
|
||||
564,
|
||||
571,
|
||||
572,
|
||||
697,
|
||||
575,
|
||||
577,
|
||||
578,
|
||||
884,
|
||||
597,
|
||||
600,
|
||||
603,
|
||||
598,
|
||||
601,
|
||||
726,
|
||||
162,
|
||||
163,
|
||||
164,
|
||||
165,
|
||||
450,
|
||||
638,
|
||||
342,
|
||||
344,
|
||||
364,
|
||||
366,
|
||||
479,
|
||||
667,
|
||||
371,
|
||||
373,
|
||||
393,
|
||||
395,
|
||||
};
|
||||
|
||||
/* Given the opcode enumerator OP, return the pointer to the corresponding
|
||||
|
|
|
|||
|
|
@ -752,6 +752,13 @@
|
|||
QLF2(V_4S , V_4S ), \
|
||||
}
|
||||
|
||||
/* e.g. FCMGT <Vd>.<T>, <Vd>.<T>>, #0.0. */
|
||||
#define QL_V2SAMEH \
|
||||
{ \
|
||||
QLF2 (V_4H, V_4H), \
|
||||
QLF2 (V_8H, V_8H), \
|
||||
}
|
||||
|
||||
/* e.g. REV16 <Vd>.<T>, <Vn>.<T>. */
|
||||
#define QL_V2SAMEB \
|
||||
{ \
|
||||
|
|
@ -1509,21 +1516,51 @@ struct aarch64_opcode aarch64_opcode_table[] =
|
|||
{"fcvtl", 0xe217800, 0xffbffc00, asimdmisc, OP_FCVTL, SIMD, OP2 (Vd, Vn), QL_V2LONGHS, F_MISC},
|
||||
{"fcvtl2", 0x4e217800, 0xffbffc00, asimdmisc, OP_FCVTL2, SIMD, OP2 (Vd, Vn), QL_V2LONGHS2, F_MISC},
|
||||
{"frintn", 0xe218800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frintn", 0xe798800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"frintm", 0xe219800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frintm", 0xe799800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtns", 0xe21a800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtns", 0xe79a800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtms", 0xe21b800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtms", 0xe79b800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtas", 0xe21c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtas", 0xe79c800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"scvtf", 0xe21d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"scvtf", 0xe79d800, 0xbfbffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcmgt", 0xea0c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP3 (Vd, Vn, FPIMM0), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcmgt", 0xef8c800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP3 (Vd, Vn, FPIMM0), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcmeq", 0xea0d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP3 (Vd, Vn, FPIMM0), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcmeq", 0xef8d800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP3 (Vd, Vn, FPIMM0), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcmlt", 0xea0e800, 0xbfbffc00, asimdmisc, 0, SIMD, OP3 (Vd, Vn, FPIMM0), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcmlt", 0xef8e800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP3 (Vd, Vn, FPIMM0), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fabs", 0xea0f800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fabs", 0xef8f800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"frintp", 0xea18800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frintp", 0xef98800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"frintz", 0xea19800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frintz", 0xef99800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtps", 0xea1a800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtps", 0xef9a800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtzs", 0xea1b800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtzs", 0xef9b800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"urecpe", 0xea1c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMES, F_SIZEQ},
|
||||
{"frecpe", 0xea1d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frecpe", 0xef9d800, 0xbfbffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"rev32", 0x2e200800, 0xbf3ffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMEBH, F_SIZEQ},
|
||||
{"uaddlp", 0x2e202800, 0xbf3ffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2PAIRWISELONGBHS, F_SIZEQ},
|
||||
{"usqadd", 0x2e203800, 0xbf3ffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAME, F_SIZEQ},
|
||||
|
|
@ -1542,23 +1579,51 @@ struct aarch64_opcode aarch64_opcode_table[] =
|
|||
{"fcvtxn", 0x2e616800, 0xfffffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2NARRS, 0},
|
||||
{"fcvtxn2", 0x6e616800, 0xfffffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2NARRS2, 0},
|
||||
{"frinta", 0x2e218800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frinta", 0x2e798800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"frintx", 0x2e219800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frintx", 0x2e799800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtnu", 0x2e21a800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtnu", 0x2e79a800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtmu", 0x2e21b800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtmu", 0x2e79b800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtau", 0x2e21c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtau", 0x2e79c800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"ucvtf", 0x2e21d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"ucvtf", 0x2e79d800, 0xbfbffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"not", 0x2e205800, 0xbffffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMEB, F_SIZEQ | F_HAS_ALIAS},
|
||||
{"mvn", 0x2e205800, 0xbffffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMEB, F_SIZEQ | F_ALIAS},
|
||||
{"rbit", 0x2e605800, 0xbffffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMEB, F_SIZEQ},
|
||||
{"fcmge", 0x2ea0c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP3 (Vd, Vn, FPIMM0), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcmge", 0x2ef8c800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP3 (Vd, Vn, FPIMM0), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcmle", 0x2ea0d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP3 (Vd, Vn, FPIMM0), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcmle", 0x2ef8d800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP3 (Vd, Vn, FPIMM0), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fneg", 0x2ea0f800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fneg", 0x2ef8f800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"frinti", 0x2ea19800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frinti", 0x2ef99800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtpu", 0x2ea1a800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtpu", 0x2ef9a800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fcvtzu", 0x2ea1b800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fcvtzu", 0x2ef9b800, 0xbffffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"ursqrte", 0x2ea1c800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMES, F_SIZEQ},
|
||||
{"frsqrte", 0x2ea1d800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"frsqrte", 0x2ef9d800, 0xbfbffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
{"fsqrt", 0x2ea1f800, 0xbfbffc00, asimdmisc, 0, SIMD, OP2 (Vd, Vn), QL_V2SAMESD, F_SIZEQ},
|
||||
{"fsqrt", 0x2ef9f800, 0xbfbffc00, asimdmisc, 0, SIMD_F16,
|
||||
OP2 (Vd, Vn), QL_V2SAMEH, F_SIZEQ},
|
||||
/* AdvSIMD ZIP/UZP/TRN. */
|
||||
{"uzp1", 0xe001800, 0xbf20fc00, asimdperm, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAME, F_SIZEQ},
|
||||
{"trn1", 0xe002800, 0xbf20fc00, asimdperm, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAME, F_SIZEQ},
|
||||
|
|
|
|||
Loading…
Reference in New Issue