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* sim/m32r/addx.cgs: Add another test.

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* sim/m32r/jmp.cgs: Add another test.
	* sim/m32r/bra8-2.cgs: New testcase.
	* sim/m32r/hello.ms: Run on m32rx too.
This commit is contained in:
Doug Evans 1998-06-10 17:56:18 +00:00
parent c488e9b543
commit f3c7eb69df
3 changed files with 49 additions and 0 deletions
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9
sim/testsuite/ChangeLog
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@ -1,3 +1,12 @@
Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
* sim/m32r/addx.cgs: Add another test.
* sim/m32r/jmp.cgs: Add another test.
start-sanitize-m32rx
* sim/m32r/bra8-2.cgs: New testcase.
* sim/m32r/hello.ms: Run on m32rx too.
end-sanitize-m32rx
start-sanitize-sky
Tue Jun 9 08:55:05 1998 Doug Evans <devans@canuck.cygnus.com>

1
sim/testsuite/sim/m32r/.Sanitize
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@ -20,6 +20,7 @@ bcl24.cgs
bcl8.cgs
bncl24.cgs
bncl8.cgs
bra8-2.cgs
cmpeq.cgs
cmpz.cgs
divh.cgs

39
sim/testsuite/sim/m32r/addx.cgs Normal file
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@ -0,0 +1,39 @@
# m32r testcase for addx $dr,$sr
# mach(): m32r m32rx
.include "testutils.inc"
start
.global addx
addx:
mvi_h_condbit 1
mvi_h_gr r4, 1
mvi_h_gr r5, 2
addx r4, r5
bc not_ok
test_h_gr r4, 4
mvi_h_gr r4, 0xfffffffe
addx r4, r5
bnc not_ok
test_h_gr r4, 0
mvi_h_gr r4, -1
mvi_h_gr r5, -1
mvi_h_condbit 1
addx r4,r5
bnc not_ok
test_h_gr r4, -1
mvi_h_gr r4,-1
mvi_h_gr r5,0x7fffffff
mvi_h_condbit 1
addx r5,r4
bnc not_ok
test_h_gr r5,0x7fffffff
pass
not_ok:
fail