Recognize and skip 64-bit PowerPC Linux linkage functions.
* ppc-linux-tdep.c (insn_d, insn_ds, insn_xfx, read_insn, struct insn_pattern, insns_match_pattern, d_field, ds_field): New functions, macros, and types for working with PPC instructions. (ppc64_standard_linkage, PPC64_STANDARD_LINKAGE_LEN, ppc64_in_solib_call_trampoline, ppc64_standard_linkage_target, ppc64_skip_trampoline_code): New functions, variables, and macros for recognizing and skipping linkage functions. (ppc_linux_init_abi): Use ppc64_in_solib_call_trampoline and ppc64_skip_trampoline_code for the 64-bit PowerPC Linux ABI.
This commit is contained in:
Jim Blandy
parent
49ff75ad91
commit
f470a70ae3
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@ -1,5 +1,16 @@
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2003-06-12 Jim Blandy <jimb@redhat.com>
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Recognize and skip 64-bit PowerPC Linux linkage functions.
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* ppc-linux-tdep.c (insn_d, insn_ds, insn_xfx, read_insn, struct
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insn_pattern, insns_match_pattern, d_field, ds_field): New
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functions, macros, and types for working with PPC instructions.
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(ppc64_standard_linkage, PPC64_STANDARD_LINKAGE_LEN,
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ppc64_in_solib_call_trampoline, ppc64_standard_linkage_target,
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ppc64_skip_trampoline_code): New functions, variables, and macros
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for recognizing and skipping linkage functions.
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(ppc_linux_init_abi): Use ppc64_in_solib_call_trampoline and
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ppc64_skip_trampoline_code for the 64-bit PowerPC Linux ABI.
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* ppc-linux-nat.c (ppc_register_u_addr): Correctly compute u-area
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register offsets for both the 32- and 64-bit interfaces.
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@ -632,6 +632,258 @@ ppc_linux_svr4_fetch_link_map_offsets (void)
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return lmp;
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}
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/* Macros for matching instructions. Note that, since all the
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operands are masked off before they're or-ed into the instruction,
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you can use -1 to make masks. */
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#define insn_d(opcd, rts, ra, d) \
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((((opcd) & 0x3f) << 26) \
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| (((rts) & 0x1f) << 21) \
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| (((ra) & 0x1f) << 16) \
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| ((d) & 0xffff))
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#define insn_ds(opcd, rts, ra, d, xo) \
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((((opcd) & 0x3f) << 26) \
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| (((rts) & 0x1f) << 21) \
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| (((ra) & 0x1f) << 16) \
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| ((d) & 0xfffc) \
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| ((xo) & 0x3))
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#define insn_xfx(opcd, rts, spr, xo) \
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((((opcd) & 0x3f) << 26) \
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| (((rts) & 0x1f) << 21) \
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| (((spr) & 0x1f) << 16) \
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| (((spr) & 0x3e0) << 6) \
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| (((xo) & 0x3ff) << 1))
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/* Read a PPC instruction from memory. PPC instructions are always
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big-endian, no matter what endianness the program is running in, so
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we can't use read_memory_integer or one of its friends here. */
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static unsigned int
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read_insn (CORE_ADDR pc)
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{
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unsigned char buf[4];
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read_memory (pc, buf, 4);
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return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
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}
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/* An instruction to match. */
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struct insn_pattern
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{
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unsigned int mask; /* mask the insn with this... */
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unsigned int data; /* ...and see if it matches this. */
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int optional; /* If non-zero, this insn may be absent. */
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};
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/* Return non-zero if the instructions at PC match the series
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described in PATTERN, or zero otherwise. PATTERN is an array of
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'struct insn_pattern' objects, terminated by an entry whose mask is
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zero.
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When the match is successful, fill INSN[i] with what PATTERN[i]
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matched. If PATTERN[i] is optional, and the instruction wasn't
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present, set INSN[i] to 0 (which is not a valid PPC instruction).
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INSN should have as many elements as PATTERN. Note that, if
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PATTERN contains optional instructions which aren't present in
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memory, then INSN will have holes, so INSN[i] isn't necessarily the
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i'th instruction in memory. */
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static int
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insns_match_pattern (CORE_ADDR pc,
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struct insn_pattern *pattern,
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unsigned int *insn)
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{
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int i;
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for (i = 0; pattern[i].mask; i++)
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{
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insn[i] = read_insn (pc);
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if ((insn[i] & pattern[i].mask) == pattern[i].data)
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pc += 4;
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else if (pattern[i].optional)
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insn[i] = 0;
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else
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return 0;
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}
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return 1;
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}
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/* Return the 'd' field of the d-form instruction INSN, properly
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sign-extended. */
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static CORE_ADDR
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insn_d_field (unsigned int insn)
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{
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return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
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}
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/* Return the 'ds' field of the ds-form instruction INSN, with the two
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zero bits concatenated at the right, and properly
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sign-extended. */
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static CORE_ADDR
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insn_ds_field (unsigned int insn)
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{
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return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
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}
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/* Pattern for the standard linkage function. These are built by
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build_plt_stub in elf64-ppc.c, whose GLINK argument is always
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zero. */
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static struct insn_pattern ppc64_standard_linkage[] =
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{
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/* addis r12, r2, <any> */
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{ insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
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/* std r2, 40(r1) */
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{ -1, insn_ds (62, 2, 1, 40, 0), 0 },
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/* ld r11, <any>(r12) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
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/* addis r12, r12, 1 <optional> */
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{ insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
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/* ld r2, <any>(r12) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
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/* addis r12, r12, 1 <optional> */
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{ insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
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/* mtctr r11 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467),
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0 },
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/* ld r11, <any>(r12) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
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/* bctr */
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{ -1, 0x4e800420, 0 },
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{ 0, 0, 0 }
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};
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#define PPC64_STANDARD_LINKAGE_LEN \
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(sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0]))
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/* Recognize a 64-bit PowerPC Linux linkage function --- what GDB
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calls a "solib trampoline". */
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static int
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ppc64_in_solib_call_trampoline (CORE_ADDR pc, char *name)
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{
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/* Detecting solib call trampolines on PPC64 Linux is a pain.
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It's not specifically solib call trampolines that are the issue.
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Any call from one function to another function that uses a
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different TOC requires a trampoline, to save the caller's TOC
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pointer and then load the callee's TOC. An executable or shared
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library may have more than one TOC, so even intra-object calls
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may require a trampoline. Since executable and shared libraries
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will all have their own distinct TOCs, every inter-object call is
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also an inter-TOC call, and requires a trampoline --- so "solib
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call trampolines" are just a special case.
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The 64-bit PowerPC Linux ABI calls these call trampolines
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"linkage functions". Since they need to be near the functions
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that call them, they all appear in .text, not in any special
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section. The .plt section just contains an array of function
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descriptors, from which the linkage functions load the callee's
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entry point, TOC value, and environment pointer. So
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in_plt_section is useless. The linkage functions don't have any
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special linker symbols to name them, either.
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The only way I can see to recognize them is to actually look at
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their code. They're generated by ppc_build_one_stub and some
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other functions in bfd/elf64-ppc.c, so that should show us all
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the instruction sequences we need to recognize. */
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unsigned int insn[PPC64_STANDARD_LINKAGE_LEN];
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return insns_match_pattern (pc, ppc64_standard_linkage, insn);
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}
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/* When the dynamic linker is doing lazy symbol resolution, the first
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call to a function in another object will go like this:
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- The user's function calls the linkage function:
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100007c4: 4b ff fc d5 bl 10000498
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100007c8: e8 41 00 28 ld r2,40(r1)
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- The linkage function loads the entry point (and other stuff) from
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the function descriptor in the PLT, and jumps to it:
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10000498: 3d 82 00 00 addis r12,r2,0
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1000049c: f8 41 00 28 std r2,40(r1)
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100004a0: e9 6c 80 98 ld r11,-32616(r12)
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100004a4: e8 4c 80 a0 ld r2,-32608(r12)
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100004a8: 7d 69 03 a6 mtctr r11
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100004ac: e9 6c 80 a8 ld r11,-32600(r12)
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100004b0: 4e 80 04 20 bctr
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- But since this is the first time that PLT entry has been used, it
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sends control to its glink entry. That loads the number of the
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PLT entry and jumps to the common glink0 code:
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10000c98: 38 00 00 00 li r0,0
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10000c9c: 4b ff ff dc b 10000c78
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- The common glink0 code then transfers control to the dynamic
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linker's fixup code:
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10000c78: e8 41 00 28 ld r2,40(r1)
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10000c7c: 3d 82 00 00 addis r12,r2,0
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10000c80: e9 6c 80 80 ld r11,-32640(r12)
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10000c84: e8 4c 80 88 ld r2,-32632(r12)
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10000c88: 7d 69 03 a6 mtctr r11
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10000c8c: e9 6c 80 90 ld r11,-32624(r12)
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10000c90: 4e 80 04 20 bctr
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Eventually, this code will figure out how to skip all of this,
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including the dynamic linker. At the moment, we just get through
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the linkage function. */
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/* If the current thread is about to execute a series of instructions
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at PC matching the ppc64_standard_linkage pattern, and INSN is the result
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from that pattern match, return the code address to which the
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standard linkage function will send them. (This doesn't deal with
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dynamic linker lazy symbol resolution stubs.) */
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static CORE_ADDR
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ppc64_standard_linkage_target (CORE_ADDR pc, unsigned int *insn)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* The address of the function descriptor this linkage function
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references. */
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CORE_ADDR desc
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= ((CORE_ADDR) read_register (tdep->ppc_gp0_regnum + 2)
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+ (insn_d_field (insn[0]) << 16)
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+ insn_ds_field (insn[2]));
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/* The first word of the descriptor is the entry point. Return that. */
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return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
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}
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/* Given that we've begun executing a call trampoline at PC, return
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the entry point of the function the trampoline will go to. */
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static CORE_ADDR
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ppc64_skip_trampoline_code (CORE_ADDR pc)
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{
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unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN];
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if (insns_match_pattern (pc, ppc64_standard_linkage,
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ppc64_standard_linkage_insn))
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return ppc64_standard_linkage_target (pc, ppc64_standard_linkage_insn);
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else
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return 0;
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}
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enum {
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ELF_NGREG = 48,
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ELF_NFPREG = 33,
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@ -743,13 +995,20 @@ ppc_linux_init_abi (struct gdbarch_info info,
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set_gdbarch_memory_remove_breakpoint (gdbarch,
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ppc_linux_memory_remove_breakpoint);
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/* Shared library handling. */
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set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
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set_gdbarch_skip_trampoline_code (gdbarch,
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ppc_linux_skip_trampoline_code);
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, ppc_linux_svr4_fetch_link_map_offsets);
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}
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/* Shared library handling. */
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set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
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set_gdbarch_skip_trampoline_code (gdbarch, ppc_linux_skip_trampoline_code);
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if (tdep->wordsize == 8)
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{
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set_gdbarch_in_solib_call_trampoline
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(gdbarch, ppc64_in_solib_call_trampoline);
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set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
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}
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}
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void
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