Fix problems in setting the carry bit
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286f83b430
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@ -3,6 +3,9 @@ Thu Mar 13 10:29:04 1997 Michael Meissner <meissner@cygnus.com>
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* simops.c (trace_{input,output}_func): Call flush_stdout from the
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callback functions.
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(OP_5F00): Ditto.
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(OP_6{4,6,C,A}01): Test for post decrement on the stack pointer.
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(OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in
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setting the carry bit after an add or a subtract.
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Wed Feb 12 16:04:15 1997 Michael Meissner <meissner@cygnus.com>
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@ -605,15 +605,12 @@ void
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OP_1200 ()
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{
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uint32 tmp;
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uint32 tmp1 = (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
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uint32 tmp2 = (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1];
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uint32 a = (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
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uint32 b = (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1];
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trace_input ("add2w", OP_DREG, OP_DREG, OP_VOID);
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tmp = tmp1 + tmp2;
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if ( (tmp < tmp1) || (tmp < tmp2) )
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State.C = 1;
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else
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State.C = 0;
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tmp = a + b;
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State.C = (tmp < a);
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State.regs[OP[0]] = tmp >> 16;
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State.regs[OP[0]+1] = tmp & 0xFFFF;
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trace_output (OP_DREG);
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@ -623,14 +620,11 @@ OP_1200 ()
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void
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OP_1000000 ()
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{
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uint16 tmp = State.regs[OP[0]];
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State.regs[OP[0]] = State.regs[OP[1]] + OP[2];
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uint16 tmp = State.regs[OP[1]];
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State.regs[OP[0]] = tmp + OP[2];
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trace_input ("add3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
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if ( tmp > State.regs[OP[0]])
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State.C = 1;
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else
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State.C = 0;
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State.C = (State.regs[OP[0]] < tmp);
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trace_output (OP_REG);
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}
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@ -727,12 +721,10 @@ OP_201 ()
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uint tmp = State.regs[OP[0]];
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if (OP[1] == 0)
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OP[1] = 16;
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trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID);
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State.regs[OP[0]] += OP[1];
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if (tmp > State.regs[OP[0]])
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State.C = 1;
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else
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State.C = 0;
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State.C = (State.regs[OP[0]] < tmp);
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trace_output (OP_REG);
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}
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@ -2435,12 +2427,12 @@ OP_5FE0 ()
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void
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OP_0 ()
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{
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int32 tmp;
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uint16 tmp;
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trace_input ("sub", OP_REG, OP_REG, OP_VOID);
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tmp = (int16)State.regs[OP[0]]- (int16)State.regs[OP[1]];
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State.C = (tmp & 0xffff0000) ? 1 : 0;
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State.regs[OP[0]] = tmp & 0xffff;
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tmp = State.regs[OP[0]] - State.regs[OP[1]];
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State.C = (tmp > State.regs[OP[0]]);
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State.regs[OP[0]] = tmp;
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trace_output (OP_REG);
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}
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@ -2495,14 +2487,13 @@ OP_1003 ()
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void
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OP_1000 ()
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{
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int64 tmp;
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uint32 a,b;
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uint32 tmp,a,b;
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trace_input ("sub2w", OP_DREG, OP_DREG, OP_VOID);
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a = (int32)((State.regs[OP[0]] << 16) | State.regs[OP[0]+1]);
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b = (int32)((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
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tmp = (int64)a-b;
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State.C = (tmp & 0xffffffff00000000LL) ? 1 : 0;
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a = (uint32)((State.regs[OP[0]] << 16) | State.regs[OP[0]+1]);
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b = (uint32)((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
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tmp = a-b;
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State.C = (tmp > a);
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State.regs[OP[0]] = (tmp >> 16) & 0xffff;
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State.regs[OP[0]+1] = tmp & 0xffff;
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trace_output (OP_DREG);
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@ -2598,14 +2589,14 @@ OP_17001002 ()
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void
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OP_1 ()
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{
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int32 tmp;
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uint16 tmp;
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if (OP[1] == 0)
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OP[1] = 16;
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trace_input ("subi", OP_REG, OP_CONSTANT16, OP_VOID);
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tmp = (int16)State.regs[OP[0]] - OP[1];
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State.C = (tmp & 0xffff0000) ? 1 : 0;
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State.regs[OP[0]] = tmp & 0xffff;
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tmp = State.regs[OP[0]] - OP[1];
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State.C = (tmp > State.regs[OP[0]]);
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State.regs[OP[0]] = tmp;
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trace_output (OP_REG);
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}
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