ChangeLog:

* features/Makefile: Allow sub-platform specific expedite settings.
	(WHICH): Add rs6000/powerpc-cell32l and rs6000/powerpc-cell64l.
	(rs6000/powerpc-cell32l-expedite): Define.
	(rs6000/powerpc-cell64l-expedite): Likewise.
	* features/rs6000/powerpc-cell32l.xml: New file.
	* features/rs6000/powerpc-cell64l.xml: New file.
	* features/rs6000/powerpc-cell32l.c: New generated file.
	* features/rs6000/powerpc-cell64l.c: New generated file.

	* regformats/rs6000/powerpc-cell32l.dat: New generated file.
	* regformats/rs6000/powerpc-cell64l.dat: New generated file.

	* config/djgpp/fnchange.lst: Add mappings for new files.

	* ppc-linux-tdep.h (tdesc_powerpc_cell32l): Add prototype.
	(tdesc_powerpc_cell64l): Likewise.
	* ppc-linux-tdep.c: Include "features/rs6000/powerpc-cell32l.c"
	and "features/rs6000/powerpc-cell64l.c".
	(_initialize_ppc_linux_tdep): Initialize target descriptions.
	(ppc_linux_spu_section): New function.
	(ppc_linux_core_read_description): Detect Cell/B.E. core files.
	* ppc-linux-nat.c (PPC_FEATURE_CELL): Define.
	(ppc_linux_read_description): Detect Cell/B.E. architecture.

	* rs6000-tdep.c (rs6000_gdbarch_init): Do not trust BFD wordsize
	if exec file is not PowerPC architecture.

gdbserver/ChangeLog:

	* configure.srv (powerpc*-*-linux*): Add powerpc-cell32l.o
	and powerpc-cell64l.o to srv_regobj.  Add rs6000/powerpc-cell32l.xml
	and rs6000/powerpc-cell64l.xml to srv_xmlfiles.
	* Makefile.in (powerpc-cell32l.o, powerpc-cell32l.c): New rules.
	(powerpc-cell64l.o, powerpc-cell64l.c): Likewise.
	(clean): Handle powerpc-cell32l.c and powerpc-cell64l.c.
	* linux-ppc-low.c (PPC_FEATURE_CELL): Define.
	(init_registers_powerpc_cell32l): Add prototype.
	(init_registers_powerpc_cell64l): Likewise.
	(ppc_arch_setup): Detect Cell/B.E. architecture.
This commit is contained in:
Ulrich Weigand 2009-07-31 15:23:21 +00:00
parent e35359c551
commit f4d9badee6
17 changed files with 694 additions and 10 deletions

View File

@ -1,3 +1,32 @@
2009-07-31 Ulrich Weigand <uweigand@de.ibm.com>
* features/Makefile: Allow sub-platform specific expedite settings.
(WHICH): Add rs6000/powerpc-cell32l and rs6000/powerpc-cell64l.
(rs6000/powerpc-cell32l-expedite): Define.
(rs6000/powerpc-cell64l-expedite): Likewise.
* features/rs6000/powerpc-cell32l.xml: New file.
* features/rs6000/powerpc-cell64l.xml: New file.
* features/rs6000/powerpc-cell32l.c: New generated file.
* features/rs6000/powerpc-cell64l.c: New generated file.
* regformats/rs6000/powerpc-cell32l.dat: New generated file.
* regformats/rs6000/powerpc-cell64l.dat: New generated file.
* config/djgpp/fnchange.lst: Add mappings for new files.
* ppc-linux-tdep.h (tdesc_powerpc_cell32l): Add prototype.
(tdesc_powerpc_cell64l): Likewise.
* ppc-linux-tdep.c: Include "features/rs6000/powerpc-cell32l.c"
and "features/rs6000/powerpc-cell64l.c".
(_initialize_ppc_linux_tdep): Initialize target descriptions.
(ppc_linux_spu_section): New function.
(ppc_linux_core_read_description): Detect Cell/B.E. core files.
* ppc-linux-nat.c (PPC_FEATURE_CELL): Define.
(ppc_linux_read_description): Detect Cell/B.E. architecture.
* rs6000-tdep.c (rs6000_gdbarch_init): Do not trust BFD wordsize
if exec file is not PowerPC architecture.
2009-07-31 Ulrich Weigand <uweigand@de.ibm.com>
* features/gdb-target.dtd (target): Accept optional

View File

@ -172,6 +172,8 @@
@V@/gdb/features/rs6000/powerpc-vsx32l.c @V@/gdb/features/rs6000/ppc-v32l.c
@V@/gdb/features/rs6000/powerpc-vsx64.c @V@/gdb/features/rs6000/ppc-v64.c
@V@/gdb/features/rs6000/powerpc-vsx64l.c @V@/gdb/features/rs6000/ppc-v64l.c
@V@/gdb/features/rs6000/powerpc-cell32l.c @V@/gdb/features/rs6000/ppc-c32l.c
@V@/gdb/features/rs6000/powerpc-cell64l.c @V@/gdb/features/rs6000/ppc-c64l.c
@V@/gdb/features/rs6000/powerpc-32.xml @V@/gdb/features/rs6000/ppc-32.xml
@V@/gdb/features/rs6000/powerpc-32l.xml @V@/gdb/features/rs6000/ppc-32l.xml
@V@/gdb/features/rs6000/powerpc-403.xml @V@/gdb/features/rs6000/ppc-403.xml
@ -202,6 +204,8 @@
@V@/gdb/features/rs6000/powerpc-vsx32l.xml @V@/gdb/features/rs6000/ppc-v32l.xml
@V@/gdb/features/rs6000/powerpc-vsx64.xml @V@/gdb/features/rs6000/ppc-v64.xml
@V@/gdb/features/rs6000/powerpc-vsx64l.xml @V@/gdb/features/rs6000/ppc-v64l.xml
@V@/gdb/features/rs6000/powerpc-cell32l.xml @V@/gdb/features/rs6000/ppc-c32l.xml
@V@/gdb/features/rs6000/powerpc-cell64l.xml @V@/gdb/features/rs6000/ppc-c64l.xml
@V@/gdb/f-exp.tab.c @V@/gdb/f-exp_tab.c
@V@/gdb/gdbserver/linux-cris-low.c @V@/gdb/gdbserver/lx-cris.c
@V@/gdb/gdbserver/linux-crisv32-low.c @V@/gdb/gdbserver/lx-cris32.c
@ -293,6 +297,8 @@
@V@/gdb/regformats/rs6000/powerpc-isa205-vsx64l.dat @V@/gdb/regformats/rs6000/ppciv64l.dat
@V@/gdb/regformats/rs6000/powerpc-vsx32l.dat @V@/gdb/regformats/rs6000/ppc-v32l.dat
@V@/gdb/regformats/rs6000/powerpc-vsx64l.dat @V@/gdb/regformats/rs6000/ppc-v64l.dat
@V@/gdb/regformats/rs6000/powerpc-cell32l.dat @V@/gdb/regformats/rs6000/ppc-c32l.dat
@V@/gdb/regformats/rs6000/powerpc-cell64l.dat @V@/gdb/regformats/rs6000/ppc-c64l.dat
@V@/gdb/remote-e7000.c @V@/gdb/rmt-e7000.c
@V@/gdb/remote-est.c @V@/gdb/rmt-est.c
@V@/gdb/remote-mips.c @V@/gdb/rmt-mips.c

View File

@ -35,13 +35,15 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
mips-linux mips64-linux \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
mips-expedite = r29,pc
mips64-expedite = r29,pc
powerpc-expedite = r1,pc
rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4
rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
XSLTPROC = xsltproc
@ -58,7 +60,8 @@ $(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl
echo "# DO NOT EDIT: generated from $<" > $(outdir)/$*.tmp
echo "name:`echo $(notdir $*) | sed 's/-/_/g'`" >> $(outdir)/$*.tmp
echo "xmltarget:$(<F)" >> $(outdir)/$*.tmp
echo "expedite:$($(firstword $(subst -, ,$(notdir $*)))-expedite)" >> $(outdir)/$*.tmp
echo "expedite:$(if $($*-expedite),$($*-expedite),$($(firstword $(subst -, ,$(notdir $*)))-expedite))" \
>> $(outdir)/$*.tmp
$(XSLTPROC) --path "$(PWD)" --xinclude number-regs.xsl $< | \
$(XSLTPROC) sort-regs.xsl - | \
$(XSLTPROC) gdbserver-regs.xsl - >> $(outdir)/$*.tmp

View File

@ -0,0 +1,158 @@
/* THIS FILE IS GENERATED. Original: powerpc-cell32l.xml */
#include "defs.h"
#include "target-descriptions.h"
struct target_desc *tdesc_powerpc_cell32l;
static void
initialize_tdesc_powerpc_cell32l (void)
{
struct target_desc *result = allocate_target_description ();
struct tdesc_feature *feature;
struct tdesc_type *field_type, *type;
set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common"));
tdesc_add_compatible (result, bfd_scan_arch ("spu:256K"));
feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux");
tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int");
tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
field_type = tdesc_named_type (feature, "ieee_single");
tdesc_create_vector (feature, "v4f", field_type, 4);
field_type = tdesc_named_type (feature, "int32");
tdesc_create_vector (feature, "v4i32", field_type, 4);
field_type = tdesc_named_type (feature, "int16");
tdesc_create_vector (feature, "v8i16", field_type, 8);
field_type = tdesc_named_type (feature, "int8");
tdesc_create_vector (feature, "v16i8", field_type, 16);
type = tdesc_create_union (feature, "vec128");
field_type = tdesc_named_type (feature, "uint128");
tdesc_add_field (type, "uint128", field_type);
field_type = tdesc_named_type (feature, "v4f");
tdesc_add_field (type, "v4_float", field_type);
field_type = tdesc_named_type (feature, "v4i32");
tdesc_add_field (type, "v4_int32", field_type);
field_type = tdesc_named_type (feature, "v8i16");
tdesc_add_field (type, "v8_int16", field_type);
field_type = tdesc_named_type (feature, "v16i8");
tdesc_add_field (type, "v16_int8", field_type);
tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int");
tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int");
tdesc_powerpc_cell32l = result;
}

View File

@ -0,0 +1,19 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2009 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- Cell/B.E. architecture. Identical to the PowerPC 32-bit Linux UISA,
but adds support for the SPU as compatible architecture. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<target>
<architecture>powerpc:common</architecture>
<compatible>spu</compatible>
<xi:include href="power-core.xml"/>
<xi:include href="power-fpu.xml"/>
<xi:include href="power-linux.xml"/>
<xi:include href="power-altivec.xml"/>
</target>

View File

@ -0,0 +1,158 @@
/* THIS FILE IS GENERATED. Original: powerpc-cell64l.xml */
#include "defs.h"
#include "target-descriptions.h"
struct target_desc *tdesc_powerpc_cell64l;
static void
initialize_tdesc_powerpc_cell64l (void)
{
struct target_desc *result = allocate_target_description ();
struct tdesc_feature *feature;
struct tdesc_type *field_type, *type;
set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64"));
tdesc_add_compatible (result, bfd_scan_arch ("spu:256K"));
feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr");
tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr");
tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64");
tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux");
tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int");
tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int");
feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
field_type = tdesc_named_type (feature, "ieee_single");
tdesc_create_vector (feature, "v4f", field_type, 4);
field_type = tdesc_named_type (feature, "int32");
tdesc_create_vector (feature, "v4i32", field_type, 4);
field_type = tdesc_named_type (feature, "int16");
tdesc_create_vector (feature, "v8i16", field_type, 8);
field_type = tdesc_named_type (feature, "int8");
tdesc_create_vector (feature, "v16i8", field_type, 16);
type = tdesc_create_union (feature, "vec128");
field_type = tdesc_named_type (feature, "uint128");
tdesc_add_field (type, "uint128", field_type);
field_type = tdesc_named_type (feature, "v4f");
tdesc_add_field (type, "v4_float", field_type);
field_type = tdesc_named_type (feature, "v4i32");
tdesc_add_field (type, "v4_int32", field_type);
field_type = tdesc_named_type (feature, "v8i16");
tdesc_add_field (type, "v8_int16", field_type);
field_type = tdesc_named_type (feature, "v16i8");
tdesc_add_field (type, "v16_int8", field_type);
tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128");
tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int");
tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int");
tdesc_powerpc_cell64l = result;
}

View File

@ -0,0 +1,19 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2009 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- Cell/B.E. architecture. Identical to the PowerPC 64-bit Linux UISA,
but adds support for the SPU as compatible architecture. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<target>
<architecture>powerpc:common64</architecture>
<compatible>spu</compatible>
<xi:include href="power64-core.xml"/>
<xi:include href="power-fpu.xml"/>
<xi:include href="power64-linux.xml"/>
<xi:include href="power-altivec.xml"/>
</target>

View File

@ -1,3 +1,16 @@
2009-07-31 Ulrich Weigand <uweigand@de.ibm.com>
* configure.srv (powerpc*-*-linux*): Add powerpc-cell32l.o
and powerpc-cell64l.o to srv_regobj. Add rs6000/powerpc-cell32l.xml
and rs6000/powerpc-cell64l.xml to srv_xmlfiles.
* Makefile.in (powerpc-cell32l.o, powerpc-cell32l.c): New rules.
(powerpc-cell64l.o, powerpc-cell64l.c): Likewise.
(clean): Handle powerpc-cell32l.c and powerpc-cell64l.c.
* linux-ppc-low.c (PPC_FEATURE_CELL): Define.
(init_registers_powerpc_cell32l): Add prototype.
(init_registers_powerpc_cell64l): Likewise.
(ppc_arch_setup): Detect Cell/B.E. architecture.
2009-07-30 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.in (datarootdir): New variable.

View File

@ -210,8 +210,8 @@ clean:
rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c
rm -f mips-linux.c mips64-linux.c
rm -f powerpc-32l.c powerpc-64l.c powerpc-e500l.c
rm -f powerpc-altivec32l.c powerpc-vsx32l.c powerpc-altivec64l.c
rm -f powerpc-vsx64l.c
rm -f powerpc-altivec32l.c powerpc-cell32l.c powerpc-vsx32l.c
rm -f powerpc-altivec64l.c powerpc-cell64l.c powerpc-vsx64l.c
rm -f powerpc-isa205-32l.c powerpc-isa205-64l.c
rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
rm -f powerpc-isa205-vsx64l.c
@ -371,6 +371,9 @@ powerpc-32l.c : $(srcdir)/../regformats/rs6000/powerpc-32l.dat $(regdat_sh)
powerpc-altivec32l.o : powerpc-altivec32l.c $(regdef_h)
powerpc-altivec32l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat powerpc-altivec32l.c
powerpc-cell32l.o : powerpc-cell32l.c $(regdef_h)
powerpc-cell32l.c : $(srcdir)/../regformats/rs6000/powerpc-cell32l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-cell32l.dat powerpc-cell32l.c
powerpc-vsx32l.o : powerpc-vsx32l.c $(regdef_h)
powerpc-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat powerpc-vsx32l.c
@ -392,6 +395,9 @@ powerpc-64l.c : $(srcdir)/../regformats/rs6000/powerpc-64l.dat $(regdat_sh)
powerpc-altivec64l.o : powerpc-altivec64l.c $(regdef_h)
powerpc-altivec64l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat powerpc-altivec64l.c
powerpc-cell64l.o : powerpc-cell64l.c $(regdef_h)
powerpc-cell64l.c : $(srcdir)/../regformats/rs6000/powerpc-cell64l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-cell64l.dat powerpc-cell64l.c
powerpc-vsx64l.o : powerpc-vsx64l.c $(regdef_h)
powerpc-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat powerpc-vsx64l.c

View File

@ -123,6 +123,7 @@ case "${target}" in
;;
powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
srv_regobj="${srv_regobj} powerpc-altivec32l.o"
srv_regobj="${srv_regobj} powerpc-cell32l.o"
srv_regobj="${srv_regobj} powerpc-vsx32l.o"
srv_regobj="${srv_regobj} powerpc-isa205-32l.o"
srv_regobj="${srv_regobj} powerpc-isa205-altivec32l.o"
@ -130,6 +131,7 @@ case "${target}" in
srv_regobj="${srv_regobj} powerpc-e500l.o"
srv_regobj="${srv_regobj} powerpc-64l.o"
srv_regobj="${srv_regobj} powerpc-altivec64l.o"
srv_regobj="${srv_regobj} powerpc-cell64l.o"
srv_regobj="${srv_regobj} powerpc-vsx64l.o"
srv_regobj="${srv_regobj} powerpc-isa205-64l.o"
srv_regobj="${srv_regobj} powerpc-isa205-altivec64l.o"
@ -137,6 +139,7 @@ case "${target}" in
srv_tgtobj="linux-low.o linux-ppc-low.o"
srv_xmlfiles="rs6000/powerpc-32l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec32l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell32l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx32l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-32l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec32l.xml"
@ -151,6 +154,7 @@ case "${target}" in
srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec64l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell64l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx64l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-64l.xml"
srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec64l.xml"

View File

@ -28,6 +28,7 @@
#define PPC_FEATURE_HAS_VSX 0x00000080
#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
#define PPC_FEATURE_HAS_SPE 0x00800000
#define PPC_FEATURE_CELL 0x00010000
#define PPC_FEATURE_HAS_DFP 0x00000400
static unsigned long ppc_hwcap;
@ -37,6 +38,8 @@ static unsigned long ppc_hwcap;
void init_registers_powerpc_32l (void);
/* Defined in auto-generated file powerpc-altivec32l.c. */
void init_registers_powerpc_altivec32l (void);
/* Defined in auto-generated file powerpc-cell32l.c. */
void init_registers_powerpc_cell32l (void);
/* Defined in auto-generated file powerpc-vsx32l.c. */
void init_registers_powerpc_vsx32l (void);
/* Defined in auto-generated file powerpc-isa205-32l.c. */
@ -51,6 +54,8 @@ void init_registers_powerpc_e500l (void);
void init_registers_powerpc_64l (void);
/* Defined in auto-generated file powerpc-altivec64l.c. */
void init_registers_powerpc_altivec64l (void);
/* Defined in auto-generated file powerpc-cell64l.c. */
void init_registers_powerpc_cell64l (void);
/* Defined in auto-generated file powerpc-vsx64l.c. */
void init_registers_powerpc_vsx64l (void);
/* Defined in auto-generated file powerpc-isa205-64l.c. */
@ -272,7 +277,9 @@ ppc_arch_setup (void)
if (msr < 0)
{
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
if (ppc_hwcap & PPC_FEATURE_CELL)
init_registers_powerpc_cell64l ();
else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
/* Power ISA 2.05 (implemented by Power 6 and newer processors)
increases the FPSCR from 32 bits to 64 bits. Even though Power 7
@ -302,7 +309,9 @@ ppc_arch_setup (void)
init_registers_powerpc_32l ();
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
if (ppc_hwcap & PPC_FEATURE_CELL)
init_registers_powerpc_cell32l ();
else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_vsx32l ();

View File

@ -60,6 +60,9 @@
If they aren't, we can provide them ourselves (their values are fixed
because they are part of the kernel ABI). They are used in the AT_HWCAP
entry of the AUXV. */
#ifndef PPC_FEATURE_CELL
#define PPC_FEATURE_CELL 0x00010000
#endif
#ifndef PPC_FEATURE_BOOKE
#define PPC_FEATURE_BOOKE 0x00008000
#endif
@ -1547,6 +1550,7 @@ ppc_linux_read_description (struct target_ops *ops)
int altivec = 0;
int vsx = 0;
int isa205 = 0;
int cell = 0;
int tid = TIDGET (inferior_ptid);
if (tid == 0)
@ -1600,9 +1604,14 @@ ppc_linux_read_description (struct target_ops *ops)
if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
isa205 = 1;
if (ppc_linux_get_hwcap () & PPC_FEATURE_CELL)
cell = 1;
if (ppc_linux_target_wordsize () == 8)
{
if (vsx)
if (cell)
return tdesc_powerpc_cell64l;
else if (vsx)
return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
else if (altivec)
return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
@ -1610,7 +1619,9 @@ ppc_linux_read_description (struct target_ops *ops)
return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
}
if (vsx)
if (cell)
return tdesc_powerpc_cell32l;
else if (vsx)
return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l;
else if (altivec)
return isa205? tdesc_powerpc_isa205_altivec32l : tdesc_powerpc_altivec32l;

View File

@ -41,12 +41,14 @@
#include "features/rs6000/powerpc-32l.c"
#include "features/rs6000/powerpc-altivec32l.c"
#include "features/rs6000/powerpc-cell32l.c"
#include "features/rs6000/powerpc-vsx32l.c"
#include "features/rs6000/powerpc-isa205-32l.c"
#include "features/rs6000/powerpc-isa205-altivec32l.c"
#include "features/rs6000/powerpc-isa205-vsx32l.c"
#include "features/rs6000/powerpc-64l.c"
#include "features/rs6000/powerpc-altivec64l.c"
#include "features/rs6000/powerpc-cell64l.c"
#include "features/rs6000/powerpc-vsx64l.c"
#include "features/rs6000/powerpc-isa205-64l.c"
#include "features/rs6000/powerpc-isa205-altivec64l.c"
@ -1034,11 +1036,18 @@ ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
}
static int
ppc_linux_spu_section (bfd *abfd, asection *asect, void *user_data)
{
return strncmp (bfd_section_name (abfd, asect), "SPU/", 4) == 0;
}
static const struct target_desc *
ppc_linux_core_read_description (struct gdbarch *gdbarch,
struct target_ops *target,
bfd *abfd)
{
asection *cell = bfd_sections_find_if (abfd, ppc_linux_spu_section, NULL);
asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
asection *section = bfd_get_section_by_name (abfd, ".reg");
@ -1048,7 +1057,9 @@ ppc_linux_core_read_description (struct gdbarch *gdbarch,
switch (bfd_section_size (abfd, section))
{
case 48 * 4:
if (vsx)
if (cell)
return tdesc_powerpc_cell32l;
else if (vsx)
return tdesc_powerpc_vsx32l;
else if (altivec)
return tdesc_powerpc_altivec32l;
@ -1056,7 +1067,9 @@ ppc_linux_core_read_description (struct gdbarch *gdbarch,
return tdesc_powerpc_32l;
case 48 * 8:
if (vsx)
if (cell)
return tdesc_powerpc_cell64l;
else if (vsx)
return tdesc_powerpc_vsx64l;
else if (altivec)
return tdesc_powerpc_altivec64l;
@ -1196,12 +1209,14 @@ _initialize_ppc_linux_tdep (void)
/* Initialize the Linux target descriptions. */
initialize_tdesc_powerpc_32l ();
initialize_tdesc_powerpc_altivec32l ();
initialize_tdesc_powerpc_cell32l ();
initialize_tdesc_powerpc_vsx32l ();
initialize_tdesc_powerpc_isa205_32l ();
initialize_tdesc_powerpc_isa205_altivec32l ();
initialize_tdesc_powerpc_isa205_vsx32l ();
initialize_tdesc_powerpc_64l ();
initialize_tdesc_powerpc_altivec64l ();
initialize_tdesc_powerpc_cell64l ();
initialize_tdesc_powerpc_vsx64l ();
initialize_tdesc_powerpc_isa205_64l ();
initialize_tdesc_powerpc_isa205_altivec64l ();

View File

@ -41,6 +41,7 @@ int ppc_linux_trap_reg_p (struct gdbarch *gdbarch);
/* Linux target descriptions. */
extern struct target_desc *tdesc_powerpc_32l;
extern struct target_desc *tdesc_powerpc_altivec32l;
extern struct target_desc *tdesc_powerpc_cell32l;
extern struct target_desc *tdesc_powerpc_vsx32l;
extern struct target_desc *tdesc_powerpc_isa205_32l;
extern struct target_desc *tdesc_powerpc_isa205_altivec32l;
@ -48,6 +49,7 @@ extern struct target_desc *tdesc_powerpc_isa205_vsx32l;
extern struct target_desc *tdesc_powerpc_e500l;
extern struct target_desc *tdesc_powerpc_64l;
extern struct target_desc *tdesc_powerpc_altivec64l;
extern struct target_desc *tdesc_powerpc_cell64l;
extern struct target_desc *tdesc_powerpc_vsx64l;
extern struct target_desc *tdesc_powerpc_isa205_64l;
extern struct target_desc *tdesc_powerpc_isa205_altivec64l;

View File

@ -0,0 +1,111 @@
# DO NOT EDIT: generated from rs6000/powerpc-cell32l.xml
name:powerpc_cell32l
xmltarget:powerpc-cell32l.xml
expedite:r1,pc,r0,orig_r3,r4
32:r0
32:r1
32:r2
32:r3
32:r4
32:r5
32:r6
32:r7
32:r8
32:r9
32:r10
32:r11
32:r12
32:r13
32:r14
32:r15
32:r16
32:r17
32:r18
32:r19
32:r20
32:r21
32:r22
32:r23
32:r24
32:r25
32:r26
32:r27
32:r28
32:r29
32:r30
32:r31
64:f0
64:f1
64:f2
64:f3
64:f4
64:f5
64:f6
64:f7
64:f8
64:f9
64:f10
64:f11
64:f12
64:f13
64:f14
64:f15
64:f16
64:f17
64:f18
64:f19
64:f20
64:f21
64:f22
64:f23
64:f24
64:f25
64:f26
64:f27
64:f28
64:f29
64:f30
64:f31
32:pc
32:msr
32:cr
32:lr
32:ctr
32:xer
32:fpscr
32:orig_r3
32:trap
128:vr0
128:vr1
128:vr2
128:vr3
128:vr4
128:vr5
128:vr6
128:vr7
128:vr8
128:vr9
128:vr10
128:vr11
128:vr12
128:vr13
128:vr14
128:vr15
128:vr16
128:vr17
128:vr18
128:vr19
128:vr20
128:vr21
128:vr22
128:vr23
128:vr24
128:vr25
128:vr26
128:vr27
128:vr28
128:vr29
128:vr30
128:vr31
32:vscr
32:vrsave

View File

@ -0,0 +1,111 @@
# DO NOT EDIT: generated from rs6000/powerpc-cell64l.xml
name:powerpc_cell64l
xmltarget:powerpc-cell64l.xml
expedite:r1,pc,r0,orig_r3,r4
64:r0
64:r1
64:r2
64:r3
64:r4
64:r5
64:r6
64:r7
64:r8
64:r9
64:r10
64:r11
64:r12
64:r13
64:r14
64:r15
64:r16
64:r17
64:r18
64:r19
64:r20
64:r21
64:r22
64:r23
64:r24
64:r25
64:r26
64:r27
64:r28
64:r29
64:r30
64:r31
64:f0
64:f1
64:f2
64:f3
64:f4
64:f5
64:f6
64:f7
64:f8
64:f9
64:f10
64:f11
64:f12
64:f13
64:f14
64:f15
64:f16
64:f17
64:f18
64:f19
64:f20
64:f21
64:f22
64:f23
64:f24
64:f25
64:f26
64:f27
64:f28
64:f29
64:f30
64:f31
64:pc
64:msr
32:cr
64:lr
64:ctr
32:xer
32:fpscr
64:orig_r3
64:trap
128:vr0
128:vr1
128:vr2
128:vr3
128:vr4
128:vr5
128:vr6
128:vr7
128:vr8
128:vr9
128:vr10
128:vr11
128:vr12
128:vr13
128:vr14
128:vr15
128:vr16
128:vr17
128:vr18
128:vr19
128:vr20
128:vr21
128:vr22
128:vr23
128:vr24
128:vr25
128:vr26
128:vr27
128:vr28
128:vr29
128:vr30
128:vr31
32:vscr
32:vrsave

View File

@ -3360,6 +3360,16 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
int num_pseudoregs = 0;
int cur_reg;
/* INFO may refer to a binary that is not of the PowerPC architecture,
e.g. when debugging a stand-alone SPE executable on a Cell/B.E. system.
In this case, we must not attempt to infer properties of the (PowerPC
side) of the target system from properties of that executable. Trust
the target description instead. */
if (info.abfd
&& bfd_get_arch (info.abfd) != bfd_arch_powerpc
&& bfd_get_arch (info.abfd) != bfd_arch_rs6000)
info.abfd = NULL;
from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;