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gas/testsuite/ 

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: Add cmpxchg16b.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CMPXCHG8B_Fixup): New.
	(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
This commit is contained in:
H.J. Lu 2006-12-14 20:13:28 +00:00
parent 6008641eec
commit f5804c90c7
7 changed files with 40 additions and 1 deletions
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7
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-inval.s: Add cmpxchg16b.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.l: Updated.
* gas/i386/x86_64.d: Likewise.
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712

3
gas/testsuite/gas/i386/x86-64-inval.l
View File

@ -49,6 +49,7 @@
.*:50: Error: .*
.*:51: Error: .*
.*:52: Error: .*
.*:54: Error: .*
GAS LISTING .*
@ -104,3 +105,5 @@ GAS LISTING .*
50 [ ]*popfl # can't have 32-bit stack operands
51 [ ]*retl # can't have 32-bit stack operands
52 [ ]*insertq \$4,\$2,%xmm2,%ebx # The last operand must be XMM register.
53 [ ]*.intel_syntax noprefix
54 [ ]*cmpxchg16b dword ptr \[rax\] # Must be xmmword

2
gas/testsuite/gas/i386/x86-64-inval.s
View File

@ -50,3 +50,5 @@ foo: jcxz foo # No prefix exists to select CX as a counter
popfl # can't have 32-bit stack operands
retl # can't have 32-bit stack operands
insertq $4,$2,%xmm2,%ebx # The last operand must be XMM register.
.intel_syntax noprefix
cmpxchg16b dword ptr [rax] # Must be xmmword

2
gas/testsuite/gas/i386/x86_64.d
View File

@ -156,4 +156,6 @@ Disassembly of section .text:
2fc: 66 89 04 25 11 22 33 ff mov[ ]+%ax,0xffffffffff332211
304: 89 04 25 11 22 33 ff mov[ ]+%eax,0xffffffffff332211
30b: 48 89 04 25 11 22 33 ff mov[ ]+%rax,0xffffffffff332211
313: 48 0f c7 08[ ]+cmpxchg16b \(%rax\)
317: 48 0f c7 08[ ]+cmpxchg16b \(%rax\)
#pass

5
gas/testsuite/gas/i386/x86_64.s
View File

@ -188,5 +188,10 @@ movw %ax,0xffffffffff332211
movl %eax,0xffffffffff332211
movq %rax,0xffffffffff332211
cmpxchg16b (%rax)
.intel_syntax noprefix
cmpxchg16b xmmword ptr [rax]
# Get a good alignment.
.p2align 4,0

5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CMPXCHG8B_Fixup): New.
(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
2006-12-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Eq): Replaced by ...

17
opcodes/i386-dis.c
View File

@ -104,6 +104,7 @@ static void INVLPG_Fixup (int, int);
static void BadOp (void);
static void VMX_Fixup (int, int);
static void REP_Fixup (int, int);
static void CMPXCHG8B_Fixup (int, int);
struct dis_private {
/* Points to first byte not fetched. */
@ -1638,7 +1639,7 @@ static const struct dis386 grps[][8] = {
/* GRP9 */
{
{ "(bad)", XX, XX, XX, XX },
{ "cmpxchg8b", Mq, XX, XX, XX },
{ "cmpxchg8b", CMPXCHG8B_Fixup, q_mode, XX, XX, XX },
{ "(bad)", XX, XX, XX, XX },
{ "(bad)", XX, XX, XX, XX },
{ "(bad)", XX, XX, XX, XX },
@ -5767,3 +5768,17 @@ REP_Fixup (int bytemode, int sizeflag)
break;
}
}
static void
CMPXCHG8B_Fixup (int bytemode, int sizeflag)
{
USED_REX (REX_MODE64);
if (rex & REX_MODE64)
{
/* Change cmpxchg8b to cmpxchg16b. */
char *p = obuf + strlen (obuf) - 2;
strcpy (p, "16b");
bytemode = x_mode;
}
OP_M (bytemode, sizeflag);
}