Fix arm-aout failures
This commit is contained in:
Nick Clifton
parent
6c0c456d87
commit
f598fd5e7a
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@ -1,3 +1,20 @@
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2002-08-22 Nick Clifton <nickc@redhat.com>
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* gas/arm/arch5tej.s: Add nops to align output.
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* gas/arm/arch5tej.d: Expect nops.
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* gas/arm/arm7t.s: Add nops, remove thumb instructions.
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* gas/arm/arm7t.d: Expect nops.
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* gas/arm/armv1.s: Add nops.
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* gas/arm/armv1.d: Expect nops.
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* gas/arm/fpa-mem.s: Add nops.
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* gas/arm/fpa-mem.d: Expext nops.
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* gas/arm/vfp1.s: Add nops.
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* gas/arm/vfp1.d: Expect nops.
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* gas/arm/xscale.s: Add nops.
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* gas/arm/xscale.d: Expect nops.
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* gas/arm/arm.exp: Do not run thumb tests for arm-aout
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toolchain.
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2002-08-22 Alan Modra <amodra@bigpond.net.au>
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* gas/ppc/ppc.exp: Don't run e500 test on xcoff targets.
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@ -13,3 +13,5 @@ Disassembly of section .text:
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0+0c <[^>]*> 012fff20 ? bxjeq r0
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0+10 <[^>]*> 412fff20 ? bxjmi r0
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0+14 <[^>]*> 512fff27 ? bxjpl r7
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0+18 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+1c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -7,3 +7,8 @@ label:
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bxjeq r0
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bxjmi r0
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bxjpl r7
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# Add two nop instructions to ensure that the output
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# is aligned as will automatically be done for arm-aout.
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nop
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nop
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@ -31,7 +31,10 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
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run_dump_test "arm7t"
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gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions"
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if {! [istarget arm*-*-aout]} then {
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# The arm-aout port does not support Thumb mode.
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gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions"
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}
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gas_test "arch4t.s" "-march=armv4t" $stdoptlist "Arm architecture 4t instructions"
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@ -66,5 +66,5 @@ Disassembly of section .text:
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[ ]*dc:.*fred
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0+e0 <[^>]*> 0000c0de ? .*
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0+e4 <[^>]*> 0000dead ? .*
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0+e8 <[^>]*> 3800 sub r0, #0
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0+ea <[^>]*> 3000 add r0, #0
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0+e8 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+ec <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -74,9 +74,8 @@ misc:
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.word fred
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.ltorg
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.thumb
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.global thumb_tests
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.thumb_func
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thumb_tests:
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sub r0, #0
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add r0, #0
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# Add two nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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@ -68,3 +68,6 @@ Disassembly of section .text:
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0+e8 <[^>]*> e8100001 ? ldmda r0, {r0}
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0+ec <[^>]*> e9100001 ? ldmdb r0, {r0}
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0+f0 <[^>]*> e9900001 ? ldmib r0, {r0}
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0+f4 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+f8 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+fc <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -68,3 +68,9 @@ entry:
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ldmfa r0, {r0}
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ldmea r0, {r0}
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ldmed r0, {r0}
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# Add three nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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nop
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@ -30,3 +30,5 @@ Disassembly of section .text:
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0+4c <[^>]*> ed800200 ? sfm f0, 4, \[r0\]
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0+50 <[^>]*> ed00020c ? sfm f0, 4, \[r0, -#48\]
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0+54 <[^>]*> ed800200 ? sfm f0, 4, \[r0\]
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0+58 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+5c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -24,3 +24,8 @@ F:
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sfm f0, 4, [r0]
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sfmfd f0, 4, [r0]
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sfmea f0, 4, [r0]
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# Add two nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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@ -188,3 +188,6 @@ Disassembly of section .text:
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0+2c8 <[^>]*> 0e1f7b10 fmrdleq r7, d15
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0+2cc <[^>]*> 0e21fb10 fmdhreq d1, pc
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0+2d0 <[^>]*> 0e0f1b10 fmdlreq d15, r1
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0+2d4 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+2d8 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+2dc <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -276,3 +276,9 @@ F:
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fmdhreq d1, r15
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fmdlreq d15, r1
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# Add three nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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nop
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@ -33,3 +33,5 @@ Disassembly of section .text:
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0+5c <[^>]*> e5910000 ldr r0, \[r1\]
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0+60 <[^>]*> e5832000 str r2, \[r3\]
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0+64 <[^>]*> e321f011 msr CPSR_c, #17 ; 0x11
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0+68 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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0+6c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
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@ -35,3 +35,8 @@ foo:
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str r2, [r3]
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msr cpsr_ctl, #0x11
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# Add two nop instructions to ensure that the
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# output is 32-byte aligned as required for arm-aout.
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nop
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nop
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